From: notaz Date: Mon, 24 Feb 2025 23:35:57 +0000 (+0200) Subject: drc: update patches X-Git-Tag: r25~4 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=254b3eec73dc590d90bf24305d1a3707aa22320f;p=pcsx_rearmed.git drc: update patches --- diff --git a/libpcsxcore/new_dynarec/patches/trace_drc_chk b/libpcsxcore/new_dynarec/patches/trace_drc_chk index c8fc23b8..99d1fde8 100644 --- a/libpcsxcore/new_dynarec/patches/trace_drc_chk +++ b/libpcsxcore/new_dynarec/patches/trace_drc_chk @@ -1,17 +1,17 @@ diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c -index dad7625d..ad8dc383 100644 +index 300a84c8..e4343533 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c -@@ -334,7 +334,7 @@ static struct compile_info +@@ -345,7 +345,7 @@ static struct compile_info #define stat_clear(s) #endif - #define HACK_ENABLED(x) ((ndrc_g.hacks | ndrc_g.hacks_pergame) & (x)) -+ #define HACK_ENABLED(x) ((NDHACK_NO_STALLS) & (x)) ++ #define HACK_ENABLED(x) ((NDHACK_NO_STALLS|NDHACK_NO_COMPAT_HACKS) & (x)) /* registers that may be allocated */ /* 1-31 gpr */ -@@ -603,6 +603,7 @@ static int cycle_multiplier_active; +@@ -626,6 +626,7 @@ static int cycle_multiplier_active; static int CLOCK_ADJUST(int x) { @@ -19,9 +19,9 @@ index dad7625d..ad8dc383 100644 int m = cycle_multiplier_active; int s = (x >> 31) | 1; return (x * m + s * 50) / 100; -@@ -808,6 +809,9 @@ static noinline u_int generate_exception(u_int pc) - // This is called from the recompiled JR/JALR instructions - static void noinline *get_addr(const u_int vaddr, enum ndrc_compile_mode compile_mode) +@@ -837,6 +838,9 @@ static noinline u_int generate_exception(u_int pc) + static void noinline *get_addr(struct ht_entry *ht, const u_int vaddr, + enum ndrc_compile_mode compile_mode) { +#ifdef DRC_DBG +printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc); @@ -29,7 +29,7 @@ index dad7625d..ad8dc383 100644 u_int start_page = get_page_prev(vaddr); u_int i, page, end_page = get_page(vaddr); void *found_clean = NULL; -@@ -7258,7 +7262,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r) +@@ -7421,7 +7425,7 @@ static noinline void pass2b_unneeded_regs(int istart, int iend, int r) // R0 is always unneeded u|=1; // Save it @@ -38,7 +38,7 @@ index dad7625d..ad8dc383 100644 gte_unneeded[i]=gte_u; /* printf("ur (%d,%d) %x: ",istart,iend,start+i*4); -@@ -8399,6 +8403,7 @@ static noinline void pass5a_preallocate1(void) +@@ -8574,6 +8578,7 @@ static noinline void pass5a_preallocate1(void) // to use, which can avoid a load-use penalty on certain CPUs. static noinline void pass5b_preallocate2(void) { @@ -46,7 +46,7 @@ index dad7625d..ad8dc383 100644 int i, hr, limit = min(slen - 1, MAXBLOCK - 2); for (i = 0; i < limit; i++) { -@@ -9425,6 +9430,10 @@ static int new_recompile_block(u_int addr) +@@ -9602,6 +9607,10 @@ static int noinline new_recompile_block(u_int addr) #ifdef ASSEM_PRINT fflush(stdout); @@ -58,10 +58,10 @@ index dad7625d..ad8dc383 100644 stat_inc(stat_bc_direct); return 0; diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c -index 151fb4bb..0238f30f 100644 +index 98e2c6be..edba031e 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c -@@ -242,6 +242,8 @@ static void write_biu(u32 value) +@@ -238,6 +238,8 @@ static void write_biu(u32 value) return; } @@ -71,10 +71,10 @@ index 151fb4bb..0238f30f 100644 psxRegs.biuReg = value; } diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c -index 9ff295e0..dcd0022b 100644 +index 064c06b6..07e2afb5 100644 --- a/libpcsxcore/psxcounters.c +++ b/libpcsxcore/psxcounters.c -@@ -457,9 +457,12 @@ void psxRcntUpdate() +@@ -455,9 +455,12 @@ void psxRcntUpdate() /******************************************************************************/ @@ -87,7 +87,7 @@ index 9ff295e0..dcd0022b 100644 _psxRcntWcount( index, value ); psxRcntSet(); -@@ -468,6 +471,7 @@ void psxRcntWcount( u32 index, u32 value ) +@@ -466,6 +469,7 @@ void psxRcntWcount( u32 index, u32 value ) void psxRcntWmode( u32 index, u32 value ) { verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value ); @@ -95,7 +95,7 @@ index 9ff295e0..dcd0022b 100644 _psxRcntWmode( index, value ); _psxRcntWcount( index, 0 ); -@@ -479,6 +483,7 @@ void psxRcntWmode( u32 index, u32 value ) +@@ -477,6 +481,7 @@ void psxRcntWmode( u32 index, u32 value ) void psxRcntWtarget( u32 index, u32 value ) { verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value ); @@ -103,7 +103,7 @@ index 9ff295e0..dcd0022b 100644 rcnts[index].target = value; -@@ -492,6 +497,7 @@ u32 psxRcntRcount0() +@@ -490,6 +495,7 @@ u32 psxRcntRcount0() { u32 index = 0; u32 count; @@ -112,10 +112,10 @@ index 9ff295e0..dcd0022b 100644 if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) || (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2)) diff --git a/libpcsxcore/psxevents.c b/libpcsxcore/psxevents.c -index 28c1b5df..fdcf98eb 100644 +index 1e2d01f6..0ee15974 100644 --- a/libpcsxcore/psxevents.c +++ b/libpcsxcore/psxevents.c -@@ -70,10 +70,11 @@ void irq_test(psxCP0Regs *cp0) +@@ -77,11 +77,13 @@ void irq_test(psxCP0Regs *cp0) } } @@ -123,18 +123,20 @@ index 28c1b5df..fdcf98eb 100644 + u32 c2 = cp0->n.Cause & ~0x400; if (psxHu32(0x1070) & psxHu32(0x1074)) - cp0->n.Cause |= 0x400; -- if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) { +- if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) + c2 |= 0x400; + if (((c2 | 1) & cp0->n.SR & 0x401) == 0x401) { + cp0->n.Cause = c2; psxException(0, 0, cp0); - pending_exception = 1; - } ++ } + } + + void gen_interupt(psxCP0Regs *cp0) diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c -index f979d5c7..9bb1df07 100644 +index 68d79321..50a38f8d 100644 --- a/libpcsxcore/psxinterpreter.c +++ b/libpcsxcore/psxinterpreter.c -@@ -245,7 +245,7 @@ static inline void addCycle(psxRegisters *regs) +@@ -243,7 +243,7 @@ static inline void addCycle(psxRegisters *regs) { assert(regs->subCycleStep >= 0x10000); regs->subCycle += regs->subCycleStep; @@ -143,7 +145,7 @@ index f979d5c7..9bb1df07 100644 regs->subCycle &= 0xffff; } -@@ -442,7 +442,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) { +@@ -440,7 +440,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) { regs->CP0.n.Target = pc_final; regs->branching = 0; @@ -153,7 +155,7 @@ index f979d5c7..9bb1df07 100644 } static void doBranchReg(psxRegisters *regs, u32 tar) { -@@ -971,7 +973,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { +@@ -973,7 +975,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { } } @@ -162,15 +164,15 @@ index f979d5c7..9bb1df07 100644 // no exception static inline void psxNULLne(psxRegisters *regs) { -@@ -1130,6 +1132,7 @@ OP(psxHLE) { +@@ -1132,6 +1134,7 @@ OP(psxHLE) { dloadFlush(regs_); psxHLEt[hleCode](); - branchSeen = 1; -+ psxRegs.cycle -= 2; + regs_->branchSeen = 1; ++ regs_->cycle -= 2; } static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = { -@@ -1179,18 +1182,20 @@ static void intReset() { +@@ -1182,18 +1185,20 @@ static void intReset() { static inline void execI_(u8 **memRLUT, psxRegisters *regs) { u32 pc = regs->pc; @@ -193,7 +195,7 @@ index f979d5c7..9bb1df07 100644 dloadStep(regs); if (execBreakCheck(regs, pc)) -@@ -1199,6 +1204,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { +@@ -1202,6 +1207,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { regs->pc += 4; regs->code = fetch(regs, memRLUT, pc); psxBSC[regs->code >> 26](regs, regs->code); @@ -201,41 +203,39 @@ index f979d5c7..9bb1df07 100644 + fetchNoCache(regs, memRLUT, regs->pc); // bus err check } - static void intExecute() { -@@ -1219,22 +1226,30 @@ static void intExecuteBp() { - execIbp(memRLUT, regs_); + static void intExecute(psxRegisters *regs) { +@@ -1218,20 +1225,28 @@ static void intExecuteBp(psxRegisters *regs) { + execIbp(memRLUT, regs); } + extern int last_count; + void do_insn_cmp(void); - void intExecuteBlock(enum blockExecCaller caller) { - psxRegisters *regs_ = &psxRegs; + static void intExecuteBlock(psxRegisters *regs, enum blockExecCaller caller) { u8 **memRLUT = psxMemRLUT; + last_count = 0; - branchSeen = 0; -- while (!branchSeen || (regs_->dloadReg[0] || regs_->dloadReg[1])) -+ while (!branchSeen || (regs_->dloadReg[0] || regs_->dloadReg[1])) { + regs->branchSeen = 0; +- while (!regs->branchSeen) ++ while (!regs->branchSeen || (regs->dloadReg[0] || regs->dloadReg[1])) { + do_insn_cmp(); - execI_(memRLUT, regs_); + execI_(memRLUT, regs); + } } - static void intExecuteBlockBp(enum blockExecCaller caller) { - psxRegisters *regs_ = &psxRegs; + static void intExecuteBlockBp(psxRegisters *regs, enum blockExecCaller caller) { u8 **memRLUT = psxMemRLUT; + last_count = 0; - branchSeen = 0; -- while (!branchSeen || (regs_->dloadReg[0] || regs_->dloadReg[1])) -+ while (!branchSeen || (regs_->dloadReg[0] || regs_->dloadReg[1])) { + regs->branchSeen = 0; +- while (!regs->branchSeen) ++ while (!regs->branchSeen || (regs->dloadReg[0] || regs->dloadReg[1])) { + do_insn_cmp(); - execIbp(memRLUT, regs_); + execIbp(memRLUT, regs); + } } static void intClear(u32 Addr, u32 Size) { -@@ -1265,7 +1280,7 @@ static void setupCop(u32 sr) +@@ -1263,7 +1278,7 @@ static void setupCop(u32 sr) else psxBSC[17] = psxCOPd; if (sr & (1u << 30)) @@ -244,7 +244,7 @@ index f979d5c7..9bb1df07 100644 else psxBSC[18] = psxCOPd; if (sr & (1u << 31)) -@@ -1284,7 +1299,7 @@ void intApplyConfig() { +@@ -1282,7 +1297,7 @@ void intApplyConfig() { assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall); assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall); @@ -253,12 +253,11 @@ index f979d5c7..9bb1df07 100644 psxBSC[18] = psxCOP2; psxBSC[50] = gteLWC2; psxBSC[58] = gteSWC2; -@@ -1365,8 +1380,13 @@ static void intShutdown() { +@@ -1365,8 +1380,12 @@ static void intShutdown() { // single step (may do several ops in case of a branch or load delay) // called by asm/dynarec void execI(psxRegisters *regs) { -+ extern u32 next_interupt; -+ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, next_interupt); ++ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, regs->next_interupt); + last_count = 0; do { execIbp(psxMemRLUT, regs); diff --git a/libpcsxcore/new_dynarec/patches/trace_intr b/libpcsxcore/new_dynarec/patches/trace_intr index f81a0965..09fc65ff 100644 --- a/libpcsxcore/new_dynarec/patches/trace_intr +++ b/libpcsxcore/new_dynarec/patches/trace_intr @@ -1,5 +1,5 @@ diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c -index 3ab83ddf..514e349e 100644 +index cefadd21..63a5c1b1 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -5,6 +5,7 @@ @@ -10,7 +10,7 @@ index 3ab83ddf..514e349e 100644 #include #include "emu_if.h" -@@ -578,13 +579,18 @@ static void ari64_shutdown() +@@ -631,13 +632,18 @@ static void ari64_shutdown() ari64_thread_shutdown(); new_dynarec_cleanup(); new_dyna_pcsx_mem_shutdown(); @@ -18,8 +18,8 @@ index 3ab83ddf..514e349e 100644 + (void)ari64_execute_block; } -+extern void intExecuteT(); -+extern void intExecuteBlockT(); ++extern void intExecuteT(psxRegisters *regs); ++extern void intExecuteBlockT(psxRegisters *regs, enum blockExecCaller caller); + R3000Acpu psxRec = { ari64_init, @@ -31,7 +31,7 @@ index 3ab83ddf..514e349e 100644 ari64_clear, ari64_notify, ari64_apply_config, -@@ -654,7 +660,7 @@ static u32 memcheck_read(u32 a) +@@ -699,7 +705,7 @@ static u32 memcheck_read(u32 a) return *(u32 *)(psxM + (a & 0x1ffffc)); } @@ -41,10 +41,10 @@ index 3ab83ddf..514e349e 100644 { static psxRegisters oldregs; diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c -index 151fb4bb..0238f30f 100644 +index 98e2c6be..edba031e 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c -@@ -242,6 +242,8 @@ static void write_biu(u32 value) +@@ -238,6 +238,8 @@ static void write_biu(u32 value) return; } @@ -54,10 +54,10 @@ index 151fb4bb..0238f30f 100644 psxRegs.biuReg = value; } diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c -index 9ff295e0..dcd0022b 100644 +index 064c06b6..07e2afb5 100644 --- a/libpcsxcore/psxcounters.c +++ b/libpcsxcore/psxcounters.c -@@ -457,9 +457,12 @@ void psxRcntUpdate() +@@ -455,9 +455,12 @@ void psxRcntUpdate() /******************************************************************************/ @@ -70,7 +70,7 @@ index 9ff295e0..dcd0022b 100644 _psxRcntWcount( index, value ); psxRcntSet(); -@@ -468,6 +471,7 @@ void psxRcntWcount( u32 index, u32 value ) +@@ -466,6 +469,7 @@ void psxRcntWcount( u32 index, u32 value ) void psxRcntWmode( u32 index, u32 value ) { verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value ); @@ -78,7 +78,7 @@ index 9ff295e0..dcd0022b 100644 _psxRcntWmode( index, value ); _psxRcntWcount( index, 0 ); -@@ -479,6 +483,7 @@ void psxRcntWmode( u32 index, u32 value ) +@@ -477,6 +481,7 @@ void psxRcntWmode( u32 index, u32 value ) void psxRcntWtarget( u32 index, u32 value ) { verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value ); @@ -86,7 +86,7 @@ index 9ff295e0..dcd0022b 100644 rcnts[index].target = value; -@@ -492,6 +497,7 @@ u32 psxRcntRcount0() +@@ -490,6 +495,7 @@ u32 psxRcntRcount0() { u32 index = 0; u32 count; @@ -95,10 +95,10 @@ index 9ff295e0..dcd0022b 100644 if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) || (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2)) diff --git a/libpcsxcore/psxevents.c b/libpcsxcore/psxevents.c -index 28c1b5df..fdcf98eb 100644 +index 1e2d01f6..0ee15974 100644 --- a/libpcsxcore/psxevents.c +++ b/libpcsxcore/psxevents.c -@@ -70,10 +70,11 @@ void irq_test(psxCP0Regs *cp0) +@@ -77,11 +77,13 @@ void irq_test(psxCP0Regs *cp0) } } @@ -106,18 +106,20 @@ index 28c1b5df..fdcf98eb 100644 + u32 c2 = cp0->n.Cause & ~0x400; if (psxHu32(0x1070) & psxHu32(0x1074)) - cp0->n.Cause |= 0x400; -- if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) { +- if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) + c2 |= 0x400; + if (((c2 | 1) & cp0->n.SR & 0x401) == 0x401) { + cp0->n.Cause = c2; psxException(0, 0, cp0); - pending_exception = 1; - } ++ } + } + + void gen_interupt(psxCP0Regs *cp0) diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c -index b96db97a..12ac2b80 100644 +index c487b02d..171c447f 100644 --- a/libpcsxcore/psxhw.c +++ b/libpcsxcore/psxhw.c -@@ -301,6 +301,7 @@ void psxHwWrite8(u32 add, u32 value) { +@@ -323,6 +323,7 @@ void psxHwWrite8(u32 add, u32 value) { log_unhandled("unhandled w8 %08x %08x @%08x\n", add, value, psxRegs.pc); } @@ -125,7 +127,7 @@ index b96db97a..12ac2b80 100644 psxHu8(add) = value; } -@@ -374,6 +375,7 @@ void psxHwWrite16(u32 add, u32 value) { +@@ -396,6 +397,7 @@ void psxHwWrite16(u32 add, u32 value) { log_unhandled("unhandled w16 %08x %08x @%08x\n", add, value, psxRegs.pc); } @@ -133,7 +135,7 @@ index b96db97a..12ac2b80 100644 psxHu16ref(add) = SWAPu16(value); } -@@ -429,6 +431,7 @@ void psxHwWrite32(u32 add, u32 value) { +@@ -452,6 +454,7 @@ void psxHwWrite32(u32 add, u32 value) { return; } } @@ -142,10 +144,10 @@ index b96db97a..12ac2b80 100644 } diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c -index f979d5c7..583aed2f 100644 +index 68d79321..2e3d14ab 100644 --- a/libpcsxcore/psxinterpreter.c +++ b/libpcsxcore/psxinterpreter.c -@@ -245,7 +245,7 @@ static inline void addCycle(psxRegisters *regs) +@@ -243,7 +243,7 @@ static inline void addCycle(psxRegisters *regs) { assert(regs->subCycleStep >= 0x10000); regs->subCycle += regs->subCycleStep; @@ -154,7 +156,7 @@ index f979d5c7..583aed2f 100644 regs->subCycle &= 0xffff; } -@@ -442,7 +442,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) { +@@ -440,7 +440,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) { regs->CP0.n.Target = pc_final; regs->branching = 0; @@ -164,7 +166,7 @@ index f979d5c7..583aed2f 100644 } static void doBranchReg(psxRegisters *regs, u32 tar) { -@@ -971,7 +973,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { +@@ -973,7 +975,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { } } @@ -173,15 +175,7 @@ index f979d5c7..583aed2f 100644 // no exception static inline void psxNULLne(psxRegisters *regs) { -@@ -1130,6 +1132,7 @@ OP(psxHLE) { - dloadFlush(regs_); - psxHLEt[hleCode](); - branchSeen = 1; -+ psxRegs.cycle -= 2; - } - - static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = { -@@ -1179,18 +1182,20 @@ static void intReset() { +@@ -1182,18 +1184,20 @@ static void intReset() { static inline void execI_(u8 **memRLUT, psxRegisters *regs) { u32 pc = regs->pc; @@ -204,7 +198,7 @@ index f979d5c7..583aed2f 100644 dloadStep(regs); if (execBreakCheck(regs, pc)) -@@ -1199,6 +1204,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { +@@ -1202,6 +1206,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { regs->pc += 4; regs->code = fetch(regs, memRLUT, pc); psxBSC[regs->code >> 26](regs, regs->code); @@ -212,39 +206,36 @@ index f979d5c7..583aed2f 100644 + fetchNoCache(regs, memRLUT, regs->pc); // bus err check } - static void intExecute() { -@@ -1237,6 +1244,30 @@ static void intExecuteBlockBp(enum blockExecCaller caller) { - execIbp(memRLUT, regs_); + static void intExecute(psxRegisters *regs) { +@@ -1234,6 +1240,27 @@ static void intExecuteBlockBp(psxRegisters *regs, enum blockExecCaller caller) { + execIbp(memRLUT, regs); } +extern void do_insn_trace(void); + -+void intExecuteT() { -+ psxRegisters *regs_ = &psxRegs; ++void intExecuteT(psxRegisters *regs) { + u8 **memRLUT = psxMemRLUT; -+ extern int stop; + -+ while (!stop) { ++ while (!regs->stop) { + do_insn_trace(); -+ execIbp(memRLUT, regs_); ++ execIbp(memRLUT, regs); + } +} + -+void intExecuteBlockT() { -+ psxRegisters *regs_ = &psxRegs; ++void intExecuteBlockT(psxRegisters *regs, enum blockExecCaller caller) { + u8 **memRLUT = psxMemRLUT; + -+ branchSeen = 0; -+ while (!branchSeen) { ++ regs->branchSeen = 0; ++ while (!regs->branchSeen) { + do_insn_trace(); -+ execIbp(memRLUT, regs_); ++ execIbp(memRLUT, regs); + } +} + static void intClear(u32 Addr, u32 Size) { } -@@ -1265,7 +1296,7 @@ static void setupCop(u32 sr) +@@ -1263,7 +1290,7 @@ static void setupCop(u32 sr) else psxBSC[17] = psxCOPd; if (sr & (1u << 30)) @@ -253,7 +244,7 @@ index f979d5c7..583aed2f 100644 else psxBSC[18] = psxCOPd; if (sr & (1u << 31)) -@@ -1284,7 +1315,7 @@ void intApplyConfig() { +@@ -1282,7 +1309,7 @@ void intApplyConfig() { assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall); assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall); @@ -263,10 +254,10 @@ index f979d5c7..583aed2f 100644 psxBSC[50] = gteLWC2; psxBSC[58] = gteSWC2; diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c -index e08bd895..8ffb882c 100644 +index 13301992..2ccdea74 100644 --- a/libpcsxcore/psxmem.c +++ b/libpcsxcore/psxmem.c -@@ -315,10 +315,13 @@ void psxMemOnIsolate(int enable) +@@ -316,10 +316,13 @@ void psxMemOnIsolate(int enable) : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); } @@ -280,7 +271,7 @@ index e08bd895..8ffb882c 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -344,6 +347,7 @@ u16 psxMemRead16(u32 mem) { +@@ -345,6 +348,7 @@ u16 psxMemRead16(u32 mem) { char *p; u32 t; @@ -288,7 +279,7 @@ index e08bd895..8ffb882c 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -369,6 +373,7 @@ u32 psxMemRead32(u32 mem) { +@@ -370,6 +374,7 @@ u32 psxMemRead32(u32 mem) { char *p; u32 t; @@ -296,7 +287,7 @@ index e08bd895..8ffb882c 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -396,6 +401,7 @@ void psxMemWrite8(u32 mem, u32 value) { +@@ -397,6 +402,7 @@ void psxMemWrite8(u32 mem, u32 value) { char *p; u32 t; @@ -304,7 +295,7 @@ index e08bd895..8ffb882c 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -423,6 +429,7 @@ void psxMemWrite16(u32 mem, u32 value) { +@@ -424,6 +430,7 @@ void psxMemWrite16(u32 mem, u32 value) { char *p; u32 t; @@ -312,7 +303,7 @@ index e08bd895..8ffb882c 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -450,6 +457,7 @@ void psxMemWrite32(u32 mem, u32 value) { +@@ -451,6 +458,7 @@ void psxMemWrite32(u32 mem, u32 value) { char *p; u32 t; @@ -320,7 +311,7 @@ index e08bd895..8ffb882c 100644 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n"); t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { -@@ -468,6 +476,8 @@ void psxMemWrite32(u32 mem, u32 value) { +@@ -469,6 +477,8 @@ void psxMemWrite32(u32 mem, u32 value) { #endif } else { if (mem == 0xfffe0130) { @@ -330,10 +321,10 @@ index e08bd895..8ffb882c 100644 return; } diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c -index 0c29dba7..3af7e156 100644 +index cfd1ab09..724167e0 100644 --- a/libpcsxcore/r3000a.c +++ b/libpcsxcore/r3000a.c -@@ -126,6 +126,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) { +@@ -141,6 +141,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) { } void psxBranchTest() {