From: notaz Date: Mon, 18 Feb 2008 21:19:11 +0000 (+0000) Subject: svp compiler, early stage, works X-Git-Tag: v1.85~571 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=259ed0ea6635845527a3da94a67a6260463861e6;p=picodrive.git svp compiler, early stage, works git-svn-id: file:///home/notaz/opt/svn/PicoDrive@359 be3aeb3a-fb24-0410-a615-afba39da0efa --- diff --git a/Pico/carthw/svp/compiler.c b/Pico/carthw/svp/compiler.c index 69b5f406..dac52851 100644 --- a/Pico/carthw/svp/compiler.c +++ b/Pico/carthw/svp/compiler.c @@ -3,7 +3,7 @@ #include "../../PicoInt.h" -#define TCACHE_SIZE (256*1024) +#define TCACHE_SIZE (1024*1024) static unsigned int *block_table[0x5090/2]; static unsigned int *block_table_iram[15][0x800/2]; static unsigned int *tcache = NULL; @@ -33,7 +33,7 @@ static int iram_context = 0; static void op00(unsigned int op, unsigned int imm) { unsigned int tmpv; - PC = ((unsigned short *)&op) + 1; /* FIXME: needed for interpreter */ + PC = ((unsigned short *)(void *)&op) + 1; /* FIXME: needed for interpreter */ if (op == 0) return; // nop if (op == ((SSP_A<<4)|SSP_P)) { // A <- P // not sure. MAME claims that only hi word is transfered. @@ -111,7 +111,7 @@ static void op24(unsigned int op, unsigned int imm) int cond = 0; do { COND_CHECK - if (cond) { int new_PC = imm; write_STACK(GET_PC()); write_PC(new_PC); } + if (cond) { int new_PC = imm; write_STACK(GET_PC()); SET_PC(new_PC); } } while (0); } @@ -130,9 +130,9 @@ static void op26(unsigned int op, unsigned int imm) { int cond = 0; COND_CHECK - if (cond) write_PC(imm); + if (cond) SET_PC(imm); } - while(0); + while (0); } // mod cond, op @@ -527,22 +527,23 @@ static void *translate_block(int pc) *tcache_ptr++ = (u32) &ssp->gr[SSP_PC].v; // -2 ptr to rPC *tcache_ptr++ = (u32) in_funcs; // -1 func pool + printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<2); block_start = tcache_ptr; emit_block_prologue(); - //printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<1); - for (;;) + for (; icount < 100;) { icount++; + //printf(" insn #%i\n", icount); op = PROGRAM(pc++); op1 = op >> 9; - emit_mov_const16(0, op); + emit_mov_const(0, op); // need immediate? if ((op1 & 0xf) == 4 || (op1 & 0xf) == 6) { - emit_mov_const16(1, PROGRAM(pc++)); // immediate + emit_mov_const(1, PROGRAM(pc++)); // immediate } // dump PC @@ -575,6 +576,7 @@ static void *translate_block(int pc) nblocks++; //if (pc >= 0x400) printf("%i blocks, %i bytes\n", nblocks, (tcache_ptr - tcache)*4); + //printf("%p %p\n", tcache_ptr, emit_block_epilogue); #if 0 { @@ -584,6 +586,9 @@ static void *translate_block(int pc) } exit(0); #endif + + handle_caches(); + return block_start; } @@ -612,18 +617,6 @@ void ssp1601_dyn_reset(ssp1601_t *ssp) ssp1601_reset_local(ssp); } -static void handle_caches() -{ -#ifdef ARM - extern void flush_inval_dcache(const void *start_addr, const void *end_addr); - extern void flush_inval_icache(const void *start_addr, const void *end_addr); - flush_inval_dcache(tcache, tcache_ptr); - flush_inval_icache(tcache, tcache_ptr); -#else -#error wth -#endif -} - void ssp1601_dyn_run(int cycles) { while (cycles > 0) @@ -650,8 +643,9 @@ void ssp1601_dyn_run(int cycles) //printf("enter @ %04x, PC=%04x\n", (PC - tcache)<<1, rPC<<1); g_cycles = 0; - handle_caches(); + //printf("enter %04x\n", rPC); trans_entry(); + //printf("leave %04x\n", rPC); cycles -= g_cycles; /* if (!had_jump) { diff --git a/Pico/carthw/svp/gen_arm.c b/Pico/carthw/svp/gen_arm.c index 30e8f848..30364136 100644 --- a/Pico/carthw/svp/gen_arm.c +++ b/Pico/carthw/svp/gen_arm.c @@ -53,15 +53,30 @@ #define EOP_BX(rm) EOP_C_BX(A_COND_AL,rm) -static void emit_mov_const16(int d, unsigned int val) +static void emit_mov_const(int d, unsigned int val) { int need_or = 0; - if (val & 0xff00) { - EOP_MOV_IMM(0, d, 24/2, (val>>8)&0xff); + if (val & 0xff000000) { + EOP_MOV_IMM(0, d, 8/2, (val>>24)&0xff); need_or = 1; } - if ((val & 0xff) || !need_or) - EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, d, d, 0, val&0xff); + if (val & 0x00ff0000) { + EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 16/2, (val>>16)&0xff); + need_or = 1; + } + if (val & 0x0000ff00) { + EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 24/2, (val>>8)&0xff); + need_or = 1; + } + if ((val &0x000000ff) || !need_or) + EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 0, val&0xff); +} + +static void check_offset_12(unsigned int val) +{ + if (!(val & ~0xfff)) return; + printf("offset_12 overflow %04x\n", val); + exit(1); } static void emit_block_prologue(void) @@ -74,8 +89,10 @@ static void emit_block_epilogue(unsigned int *block_start, int icount) { int back = (tcache_ptr - block_start) + 2; back += 3; // g_cycles + check_offset_12(back<<2); + EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back] - emit_mov_const16(3, icount); + emit_mov_const(3, icount); EOP_STR_SIMPLE(3,2); // str r3,[r2] EOP_LDMFD_ST(A_R14M); // ldmfd r13!, {r14} @@ -86,8 +103,10 @@ static void emit_pc_inc(unsigned int *block_start, int pc) { int back = (tcache_ptr - block_start) + 2; back += 2; // rPC ptr + check_offset_12(back<<2); + EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back] - emit_mov_const16(3, pc); + emit_mov_const(3, pc<<16); EOP_STR_SIMPLE(3,2); // str r3,[r2] } @@ -95,9 +114,21 @@ static void emit_call(unsigned int *block_start, unsigned int op1) { int back = (tcache_ptr - block_start) + 2; back += 1; // func table + check_offset_12(back<<2); + EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back] EOP_MOV_REG_SIMPLE(14,15); // mov lr,pc EOP_LDR_IMM(15,2,op1<<2); // ldr pc,[r2,#op1] } +static void handle_caches() +{ +#ifdef ARM + extern void flush_inval_caches(const void *start_addr, const void *end_addr); + flush_inval_caches(tcache, tcache_ptr); +#else +#error wth +#endif +} + diff --git a/Pico/carthw/svp/stub_arm.s b/Pico/carthw/svp/stub_arm.s index fee118e7..18a202c3 100644 --- a/Pico/carthw/svp/stub_arm.s +++ b/Pico/carthw/svp/stub_arm.s @@ -10,19 +10,14 @@ @ r9: r4-r6 @ r10: P -.global flush_inval_dcache -.global flush_inval_icache +.global flush_inval_caches .text .align 4 -flush_inval_dcache: - mov r2, #0x0 @ ?? +flush_inval_caches: + mov r2, #0x0 @ must be 0 swi 0x9f0002 bx lr -flush_inval_icache: - mov r2, #0x1 - swi 0x9f0002 - bx lr