From: notaz <notasas@gmail.com>
Date: Tue, 20 Sep 2016 23:21:27 +0000 (+0300)
Subject: partially revert c4052f4d79cf
X-Git-Tag: r24l~832
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=38b1da12aade33bf94bdbe71a3988db6f57fb012;p=pcsx_rearmed.git

partially revert c4052f4d79cf

See github issue #74 for details.
---

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 3cc3737d..708c8aea 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -30,9 +30,7 @@
 #endif
 #include "arm_features.h"
 
-#ifdef VITA
-char* translation_cache = 0;
-#elif !BASE_ADDR_FIXED
+#if !BASE_ADDR_FIXED
 char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #endif
 
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index da4144dc..22546386 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -64,10 +64,6 @@ extern char *invc_ptr;
 // "round" address helpful for debug
 #define BASE_ADDR 0x1000000
 #else
-#if defined(VITA)
-extern char* translation_cache;
-#else
 extern char translation_cache[1 << TARGET_SIZE_2];
-#endif
 #define BASE_ADDR (u_int)translation_cache
 #endif