From: notaz Date: Sun, 1 Jul 2007 14:59:15 +0000 (+0000) Subject: some more optimizations X-Git-Tag: v1.85~714 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3a5e6cf8477084dd63ab1eeadef88db3d218caea;p=picodrive.git some more optimizations git-svn-id: file:///home/notaz/opt/svn/PicoDrive@179 be3aeb3a-fb24-0410-a615-afba39da0efa --- diff --git a/cpu/Cyclone/Ea.cpp b/cpu/Cyclone/Ea.cpp index 22e59395..642a42b9 100644 --- a/cpu/Cyclone/Ea.cpp +++ b/cpu/Cyclone/Ea.cpp @@ -284,27 +284,29 @@ int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend) { char text[32]=""; int shift=0; - + shift=32-(8<=2||(size==0&&(top||!sign_extend))) { if(mask) for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is lsl=2-low; // Having a lsl #2 here saves one opcode } + if (top) nsarm=3; + ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v); - if (lsl>0) ot(" ldr%s r%d,[r7,r%d,lsl #%i]\n",Narm[size&3],v,a,lsl); - else if (lsl<0) ot(" ldr%s r%d,[r7,r%d,lsr #%i]\n",Narm[size&3],v,a,-lsl); - else ot(" ldr%s r%d,[r7,r%d]\n",Sarm[size&3],v,a); + if (lsl>0) ot(" ldr%s r%d,[r7,r%d,lsl #%i]\n",Narm[nsarm],v,a,lsl); + else if (lsl<0) ot(" ldr%s r%d,[r7,r%d,lsr #%i]\n",Narm[nsarm],v,a,-lsl); + else ot(" ldr%s r%d,[r7,r%d]\n",Sarm[nsarm],v,a); - if (top && shift) ot(" mov r%d,r%d,asl #%d\n",v,v,shift); + if (top&&shift) ot(" mov r%d,r%d,asl #%d\n",v,v,shift); ot("\n"); return 0; } diff --git a/cpu/Cyclone/OpArith.cpp b/cpu/Cyclone/OpArith.cpp index 9e956c04..74673b8f 100644 --- a/cpu/Cyclone/OpArith.cpp +++ b/cpu/Cyclone/OpArith.cpp @@ -113,15 +113,17 @@ int OpAddq(int op) { int lsr=9-shift; - if (lsr>=0) ot(" mov r2,r8,lsr #%d ;@ Get quick value\n", lsr); - else ot(" mov r2,r8,lsl #%d ;@ Get quick value\n",-lsr); + ot(" and r2,r8,#0x0e00 ;@ Get quick value\n"); + + if (lsr>=0) sprintf(count,"r2,lsr #%d", lsr); + else sprintf(count,"r2,lsl #%d", -lsr); - ot(" and r2,r2,#0x%.4x\n",7<=2) + switch (cc) { - ot(";@ Is the condition true?\n"); - if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n"); - ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n"); - if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n"); - ot(";@ If so, don't dbra\n"); - ot(" b%s DbraTrue%.4x\n",Cond[cc],op); - ot("\n"); + case 0: // T + case 1: // F + break; + case 2: // hi + ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n"); + ot(" beq DbraTrue%.4x\n\n",op); + break; + case 3: // ls + ot(" tst r9,#0x60000000 ;@ ls: C || Z\n"); + ot(" bne DbraTrue%.4x\n\n",op); + break; + default: + ot(";@ Is the condition true?\n"); + ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n"); + ot(";@ If so, don't dbra\n"); + ot(" b%s DbraTrue%.4x\n\n",Cond[cc],op); + break; } - ot(";@ Decrement Dn.w\n"); - ot(" and r1,r8,#0x0007\n"); - ot(" mov r1,r1,lsl #2\n"); - ot(" ldrsh r0,[r7,r1]\n"); - ot(" sub r0,r0,#1\n"); - ot(" strh r0,[r7,r1]\n"); - ot("\n"); + if (cc!=0) + { + ot(";@ Decrement Dn.w\n"); + ot(" and r1,r8,#0x0007\n"); + ot(" mov r1,r1,lsl #2\n"); + ot(" ldrsh r0,[r7,r1]\n"); + ot(" sub r0,r0,#1\n"); + ot(" strh r0,[r7,r1]\n"); + ot("\n"); - ot(";@ Check if Dn.w is -1\n"); - ot(" cmps r0,#-1\n"); - ot(" beq DbraMin1%.4x\n",op); - ot("\n"); + ot(";@ Check if Dn.w is -1\n"); + ot(" cmn r0,#1\n"); + ot("\n"); - ot(";@ Get Branch offset:\n"); - ot(" ldrsh r0,[r4]\n"); - ot(" add r4,r4,r0 ;@ r4 = New PC\n"); - ot("\n"); - Cycles=12-2; - OpEnd(); + ot(";@ Get Branch offset:\n"); + ot(" ldrnesh r0,[r4]\n"); + ot(" addeq r4,r4,#2 ;@ Skip branch offset\n"); + ot(" subeq r5,r5,#4 ;@ additional cycles\n"); + ot(" addne r4,r4,r0 ;@ r4 = New PC\n"); + ot("\n"); + Cycles=12-2; + OpEnd(); + } - ot(";@ Dn.w is -1:\n"); - ot("DbraMin1%.4x%s\n", op, ms?"":":"); - ot(" add r4,r4,#2 ;@ Skip branch offset\n"); - ot("\n"); - Cycles=12+2; - OpEnd(); - - ot(";@ condition true:\n"); - ot("DbraTrue%.4x%s\n", op, ms?"":":"); - ot(" add r4,r4,#2 ;@ Skip branch offset\n"); - ot("\n"); - Cycles=12; - OpEnd(); + if (cc==0||cc>=2) + { + ot(";@ condition true:\n"); + ot("DbraTrue%.4x%s\n", op, ms?"":":"); + ot(" add r4,r4,#2 ;@ Skip branch offset\n"); + ot("\n"); + Cycles=12; + OpEnd(); + } return 0; } diff --git a/cpu/Cyclone/OpLogic.cpp b/cpu/Cyclone/OpLogic.cpp index 207ff456..33be8c94 100644 --- a/cpu/Cyclone/OpLogic.cpp +++ b/cpu/Cyclone/OpLogic.cpp @@ -346,7 +346,7 @@ int OpSet(int op) case 1: // F break; case 2: // hi - ot(" ands r0,r9,#0x60000000 ;@ hi: !C && !Z\n"); + ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n"); ot(" mvneq r1,r1\n"); if (ea<8) ot(" subeq r5,r5,#2 ;@ Extra cycles\n"); break; diff --git a/cpu/Cyclone/OpMove.cpp b/cpu/Cyclone/OpMove.cpp index 8dc5be69..7d317b07 100644 --- a/cpu/Cyclone/OpMove.cpp +++ b/cpu/Cyclone/OpMove.cpp @@ -406,8 +406,8 @@ int OpMovem(int op) Cycles+=Ea_add_ns(g_movem_cycle_table,ea); OpEnd(ea); - ot("\n"); ltorg(); + ot("\n"); return 0; } diff --git a/cpu/Cyclone/tests/test_misc.bin b/cpu/Cyclone/tests/test_misc.bin index 1b67d37f..b21b05dd 100755 Binary files a/cpu/Cyclone/tests/test_misc.bin and b/cpu/Cyclone/tests/test_misc.bin differ