From: notaz <notasas@gmail.com>
Date: Tue, 4 Oct 2011 21:36:03 +0000 (+0300)
Subject: try to support more compilers
X-Git-Tag: r10~15
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4600ba0381ea86bdfdcba8f4f762c89f5c51af5b;p=pcsx_rearmed.git

try to support more compilers
---

diff --git a/Makefile b/Makefile
index 25cd3e98..a0b96c04 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,11 @@
 #CROSS_COMPILE=
-AS = $(CROSS_COMPILE)as
-CC = $(CROSS_COMPILE)gcc
-LD = $(CROSS_COMPILE)ld
+AS  = $(CROSS_COMPILE)as
+GCC = $(CROSS_COMPILE)gcc
+CC  = $(CROSS_COMPILE)gcc
+LD  = $(CROSS_COMPILE)ld
+ifdef CC_OVERRIDE
+CC = $(CC_OVERRIDE)
+endif
 
 ARM926 ?= 0
 ARM_CORTEXA8 ?= 1
@@ -14,7 +18,7 @@ TARGET = pcsx
 
 -include Makefile.local
 
-ARCH = $(shell $(CC) -v 2>&1 | grep -i 'target:' | awk '{print $$2}' | awk -F '-' '{print $$1}')
+ARCH = $(shell $(GCC) -v 2>&1 | grep -i 'target:' | awk '{print $$2}' | awk -F '-' '{print $$1}')
 
 CFLAGS += -Wall -ggdb -Ifrontend -ffast-math
 LDFLAGS += -lz -lpthread -ldl -lpng
@@ -25,18 +29,19 @@ CFLAGS += $(EXTRA_CFLAGS)
 
 ifeq "$(ARCH)" "arm"
 ifeq "$(ARM_CORTEXA8)" "1"
-CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -mfloat-abi=softfp
+GCC_CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -mfloat-abi=softfp
 ASFLAGS += -mcpu=cortex-a8 -mfpu=neon
 endif
 ifeq "$(ARM926)" "1"
-CFLAGS += -mcpu=arm926ej-s -mtune=arm926ej-s
+GCC_CFLAGS += -mcpu=arm926ej-s -mtune=arm926ej-s
 ASFLAGS += -mcpu=arm926ej-s
 endif
 endif
+CFLAGS += $(GCC_CFLAGS)
 
 # detect armv7 and NEON from the specified CPU
-HAVE_NEON = $(shell $(CC) -E -dD $(CFLAGS) frontend/config.h | grep -q '__ARM_NEON__ 1' && echo 1)
-HAVE_ARMV7 = $(shell $(CC) -E -dD $(CFLAGS) frontend/config.h | grep -q '__ARM_ARCH_7A__ 1' && echo 1)
+HAVE_NEON = $(shell $(GCC) -E -dD $(GCC_CFLAGS) frontend/config.h | grep -q '__ARM_NEON__ 1' && echo 1)
+HAVE_ARMV7 = $(shell $(GCC) -E -dD $(GCC_CFLAGS) frontend/config.h | grep -q '__ARM_ARCH_7A__ 1' && echo 1)
 
 all: $(TARGET)
 
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 3447874a..71c397c0 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -4890,6 +4890,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
       }
     }
     else // 64-bit
+#ifndef FORCE32
     {
       if(opcode2[i]==0x1C) // DMULT
       {
@@ -5063,6 +5064,9 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         if(lol>=0) emit_loadreg(LOREG,lol);
       }
     }
+#else
+    assert(0);
+#endif
   }
   else
   {
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 362e3c62..01287582 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -21,10 +21,15 @@
 #include <stdlib.h>
 #include <stdint.h> //include for uint64_t
 #include <assert.h>
+#include <sys/mman.h>
 
 #include "emu_if.h" //emulator interface
 
-#include <sys/mman.h>
+//#define DISASM
+//#define assem_debug printf
+//#define inv_debug printf
+#define assem_debug(...)
+#define inv_debug(...)
 
 #ifdef __i386__
 #include "assem_x86.h"
@@ -265,12 +270,6 @@ int tracedebug=0;
 
 //#define DEBUG_CYCLE_COUNT 1
 
-void nullf() {}
-//#define assem_debug printf
-//#define inv_debug printf
-#define assem_debug nullf
-#define inv_debug nullf
-
 static void tlb_hacks()
 {
 #ifndef DISABLE_TLB
@@ -848,7 +847,7 @@ void alloc_all(struct regstat *cur,int i)
   }
 }
 
-
+#ifndef FORCE32
 void div64(int64_t dividend,int64_t divisor)
 {
   lo=dividend/divisor;
@@ -959,6 +958,7 @@ uint64_t ldr_merge(uint64_t original,uint64_t loaded,u_int bits)
   else original=loaded;
   return original;
 }
+#endif
 
 #ifdef __i386__
 #include "assem_x86.c"
@@ -7787,6 +7787,7 @@ void clean_registers(int istart,int iend,int wr)
   }
 }
 
+#ifdef DISASM
   /* disassembly */
 void disassemble_inst(int i)
 {
@@ -7875,6 +7876,9 @@ void disassemble_inst(int i)
         printf (" %x: %s\n",start+i*4,insn[i]);
     }
 }
+#else
+static void disassemble_inst(int i) {}
+#endif // DISASM
 
 // clear the state completely, instead of just marking
 // things invalid like invalidate_all_pages() does
@@ -10894,9 +10898,9 @@ int new_recompile_block(int addr)
   if(itype[slen-1]==SPAN) {
     bt[slen-1]=1; // Mark as a branch target so instruction can restart after exception
   }
-  
+
+#ifdef DISASM
   /* Debug/disassembly */
-  if((void*)assem_debug==(void*)printf) 
   for(i=0;i<slen;i++)
   {
     printf("U:");
@@ -11112,6 +11116,7 @@ int new_recompile_block(int addr)
 #endif
     }
   }
+#endif // DISASM
 
   /* Pass 8 - Assembly */
   linkcount=0;stubcount=0;
@@ -11144,7 +11149,7 @@ int new_recompile_block(int addr)
   for(i=0;i<slen;i++)
   {
     //if(ds) printf("ds: ");
-    if((void*)assem_debug==(void*)printf) disassemble_inst(i);
+    disassemble_inst(i);
     if(ds) {
       ds=0; // Skip delay slot
       if(bt[i]) assem_debug("OOPS - branch into delay slot\n");
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
index 33616e55..84e1da56 100644
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -39,7 +39,7 @@ static u32 branchPC;
 #define debugI()
 #endif
 
-inline void execI();
+void execI();
 
 // Subsets
 void (*psxBSC[64])();
@@ -408,7 +408,7 @@ static int psxDelayBranchTest(u32 tar1) {
 	return psxDelayBranchExec(tmp2);
 }
 
-__inline void doBranch(u32 tar) {
+static void doBranch(u32 tar) {
 	u32 *code;
 	u32 tmp;
 
@@ -788,7 +788,7 @@ void psxTestSWInts() {
 	}
 }
 
-__inline void MTC0(int reg, u32 val) {
+void MTC0(int reg, u32 val) {
 //	SysPrintf("MTC0 %d: %x\n", reg, val);
 	switch (reg) {
 		case 12: // Status
@@ -928,7 +928,7 @@ static void intShutdown() {
 }
 
 // interpreter execution
-inline void execI() { 
+void execI() {
 	u32 *code = (u32 *)PSXM(psxRegs.pc);
 	psxRegs.code = ((code == NULL) ? 0 : SWAP32(*code));