From: notaz Date: Thu, 5 Jul 2007 20:30:41 +0000 (+0000) Subject: usbjoy fix, refresh rate lib X-Git-Tag: v1.85~710 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=626f7c37bb663946e1fffd2e51442e45a86cab72;p=picodrive.git usbjoy fix, refresh rate lib git-svn-id: file:///home/notaz/opt/svn/PicoDrive@183 be3aeb3a-fb24-0410-a615-afba39da0efa --- diff --git a/platform/gp2x/cpuctrl.c b/platform/gp2x/cpuctrl.c index 7bbdb675..9940fd5d 100644 --- a/platform/gp2x/cpuctrl.c +++ b/platform/gp2x/cpuctrl.c @@ -1,7 +1,7 @@ /* cpuctrl for GP2X - Copyright (C) 2005 Hermes/PS2Reality + Copyright (C) 2005 Hermes/PS2Reality the gamma-routine was provided by theoddbot - parts (c) Rlyehs Work & (C) 2006 god_at_hell + parts (c) Rlyehs Work & (C) 2006 god_at_hell This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -20,52 +20,62 @@ */ -#include +#include #include #include "cpuctrl.h" /* system registers */ -static struct +static struct { - unsigned short SYSCLKENREG,SYSCSETREG,FPLLVSETREG,DUALINT920,DUALINT940,DUALCTRL940,MEMTIMEX0,MEMTIMEX1; + unsigned short SYSCLKENREG,SYSCSETREG,UPLLVSETREG,FPLLVSETREG, + DUALINT920,DUALINT940,DUALCTRL940,MEMTIMEX0,MEMTIMEX1,DISPCSETREG, + DPC_HS_WIDTH,DPC_HS_STR,DPC_HS_END,DPC_VS_END,DPC_DE; } system_reg; -static unsigned short dispclockdiv; - static volatile unsigned short *MEM_REG; #define SYS_CLK_FREQ 7372800 +// Fout = (m * Fin) / (p * 2^s) +// m = MDIV+8, p = PDIV+2, s = SDIV + +// m = (Fout * p * 2^s) / Fin void cpuctrl_init(void) { extern volatile unsigned short *gp2x_memregs; /* from minimal library rlyeh */ MEM_REG=&gp2x_memregs[0]; - system_reg.SYSCSETREG=MEM_REG[0x91c>>1]; + system_reg.DISPCSETREG=MEM_REG[0x924>>1]; + system_reg.UPLLVSETREG=MEM_REG[0x916>>1]; system_reg.FPLLVSETREG=MEM_REG[0x912>>1]; + system_reg.SYSCSETREG=MEM_REG[0x91c>>1]; system_reg.SYSCLKENREG=MEM_REG[0x904>>1]; system_reg.DUALINT920=MEM_REG[0x3B40>>1]; system_reg.DUALINT940=MEM_REG[0x3B42>>1]; system_reg.DUALCTRL940=MEM_REG[0x3B48>>1]; system_reg.MEMTIMEX0=MEM_REG[0x3802>>1]; system_reg.MEMTIMEX1=MEM_REG[0x3804>>1]; - dispclockdiv=MEM_REG[0x924>>1]; + system_reg.DPC_HS_WIDTH=MEM_REG[0x281A>>1]; + system_reg.DPC_HS_STR=MEM_REG[0x281C>>1]; + system_reg.DPC_HS_END=MEM_REG[0x281E>>1]; + system_reg.DPC_VS_END=MEM_REG[0x2822>>1]; + system_reg.DPC_DE=MEM_REG[0x2826>>1]; } void cpuctrl_deinit(void) { - MEM_REG[0x91c>>1]=system_reg.SYSCSETREG; MEM_REG[0x910>>1]=system_reg.FPLLVSETREG; + MEM_REG[0x91c>>1]=system_reg.SYSCSETREG; MEM_REG[0x3B40>>1]=system_reg.DUALINT920; MEM_REG[0x3B42>>1]=system_reg.DUALINT940; MEM_REG[0x3B48>>1]=system_reg.DUALCTRL940; MEM_REG[0x904>>1]=system_reg.SYSCLKENREG; - MEM_REG[0x924>>1]=dispclockdiv; MEM_REG[0x3802>>1]=system_reg.MEMTIMEX0; MEM_REG[0x3804>>1]=system_reg.MEMTIMEX1 /*| 0x9000*/; + unset_LCD_custom_rate(); } @@ -94,7 +104,7 @@ void set_920_Div(unsigned short div) { unsigned short v; v = MEM_REG[0x91c>>1] & (~0x3); - MEM_REG[0x91c>>1] = (div & 0x7) | v; + MEM_REG[0x91c>>1] = (div & 0x7) | v; } @@ -102,7 +112,7 @@ void set_DCLK_Div( unsigned short div ) { unsigned short v; v = (unsigned short)( MEM_REG[0x91c>>1] & (~(0x7 << 6)) ); - MEM_REG[0x91c>>1] = ((div & 0x7) << 6) | v; + MEM_REG[0x91c>>1] = ((div & 0x7) << 6) | v; } /* @@ -110,12 +120,133 @@ void Disable_940(void) { MEM_REG[0x3B42>>1]; MEM_REG[0x3B42>>1]=0; - MEM_REG[0x3B46>>1]=0xffff; + MEM_REG[0x3B46>>1]=0xffff; MEM_REG[0x3B48>>1]|= (1 << 7); MEM_REG[0x904>>1]&=0xfffe; } */ + +typedef struct +{ + unsigned short reg, valmask, val; +} +reg_setting; + +// ~59.998, couldn't figure closer values +static reg_setting rate_almost60[] = +{ + { 0x0914, 0xffff, (212<<8)|(2<<2)|1 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(36<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 1 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 0 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 2 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 12 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 34<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + +// perfect 50Hz? +static reg_setting rate_50[] = +{ + { 0x0914, 0xffff, (39<<8)|(0<<2)|2 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 31 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 16 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 15 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 15 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + +// 16639/2 ~120.20 +static reg_setting rate_120_20[] = +{ + { 0x0914, 0xffff, (96<<8)|(0<<2)|2 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 19 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 7 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 7 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 12 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + +// 19997/2 ~100.02 +static reg_setting rate_100_02[] = +{ + { 0x0914, 0xffff, (98<<8)|(0<<2)|2 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(8<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 26 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 6 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 6 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 31 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + +// 120.00 97/0/2/7|25/ 7/ 7/11/37 +static reg_setting rate_120[] = +{ + { 0x0914, 0xffff, (97<<8)|(0<<2)|2 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 25 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 7 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 7 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 11 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + +// 100.00 96/0/2/7|29/25/53/15/37 +static reg_setting rate_100[] = +{ + { 0x0914, 0xffff, (96<<8)|(0<<2)|2 }, /* UPLLSETVREG */ + { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */ + { 0x281A, 0x00ff, 29 }, /* .HSWID(T2) */ + { 0x281C, 0x00ff, 25 }, /* .HSSTR(T8) */ + { 0x281E, 0x00ff, 53 }, /* .HSEND(T7) */ + { 0x2822, 0x01ff, 15 }, /* .VSEND (T9) */ + { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */ + { 0, 0, 0 } +}; + + + +static reg_setting *possible_rates[] = { rate_almost60, rate_50, rate_120_20, rate_100_02, rate_120, rate_100 }; + +void set_LCD_custom_rate(lcd_rate_t rate) +{ + reg_setting *set; + + if (MEM_REG[0x2800>>1] & 0x100) // tv-out + { + return; + } + + printf("setting custom LCD refresh, mode=%i... ", rate); fflush(stdout); + for (set = possible_rates[rate]; set->reg; set++) + { + unsigned short val = MEM_REG[set->reg >> 1]; + val &= ~set->valmask; + val |= set->val; + MEM_REG[set->reg >> 1] = val; + } + printf("done.\n"); +} + +void unset_LCD_custom_rate(void) +{ + printf("reset to prev LCD refresh.\n"); + MEM_REG[0x914>>1]=system_reg.UPLLVSETREG; + MEM_REG[0x924>>1]=system_reg.DISPCSETREG; + MEM_REG[0x281A>>1]=system_reg.DPC_HS_WIDTH; + MEM_REG[0x281C>>1]=system_reg.DPC_HS_STR; + MEM_REG[0x281E>>1]=system_reg.DPC_HS_END; + MEM_REG[0x2822>>1]=system_reg.DPC_VS_END; + MEM_REG[0x2826>>1]=system_reg.DPC_DE; +} + void set_RAM_Timings(int tRC, int tRAS, int tWR, int tMRD, int tRFC, int tRP, int tRCD) { tRC -= 1; tRAS -= 1; tWR -= 1; tMRD -= 1; tRFC -= 1; tRP -= 1; tRCD -= 1; // ??? @@ -124,14 +255,6 @@ void set_RAM_Timings(int tRC, int tRAS, int tWR, int tMRD, int tRFC, int tRP, in } -/* -void gp2x_video_wait_vsync(void) -{ - MEM_REG[0x2846>>1]=(MEM_REG[0x2846>>1] | 0x20) & ~2; - while(!(MEM_REG[0x2846>>1] & 2)); -} -*/ - void set_gamma(int g100) { float gamma = (float) g100 / 100; diff --git a/platform/gp2x/cpuctrl.h b/platform/gp2x/cpuctrl.h index 5b482a55..eb2dc0a2 100644 --- a/platform/gp2x/cpuctrl.h +++ b/platform/gp2x/cpuctrl.h @@ -9,8 +9,21 @@ extern void set_FCLK(unsigned MHZ); /* adjust the clock frequency (in Mhz units) extern void set_920_Div(unsigned short div); /* 0 to 7 divider (freq=FCLK/(1+div)) */ extern void set_DCLK_Div(unsigned short div); /* 0 to 7 divider (freq=FCLK/(1+div)) */ //extern void Disable_940(void); /* 940t down */ -//extern void gp2x_video_wait_vsync(void); + extern void set_RAM_Timings(int tRC, int tRAS, int tWR, int tMRD, int tRFC, int tRP, int tRCD); extern void set_gamma(int g100); +typedef enum +{ + LCDR_60 = 0, /* ~59.998Hz, has interlacing problems, kills USB host */ + LCDR_50, /* 50Hz, has interlacing problems, kills USB host */ + LCDR_120_20, /* ~60.10*2Hz, used by FCE Ultra */ + LCDR_100_02, /* ~50.01*2Hz, used by FCE Ultra */ + LCDR_120, /* 120Hz */ + LCDR_100, /* 100Hz */ +} lcd_rate_t; + +extern void set_LCD_custom_rate(lcd_rate_t rate); +extern void unset_LCD_custom_rate(void); + #endif diff --git a/platform/gp2x/usbjoy.c b/platform/gp2x/usbjoy.c index 569f6151..7be18d59 100644 --- a/platform/gp2x/usbjoy.c +++ b/platform/gp2x/usbjoy.c @@ -34,6 +34,8 @@ #include "usbjoy.h" +/* This is a try to support analog joys. Untested. */ +#define DEAD_ZONE (8*1024) /* Function: joy_open @@ -210,14 +212,16 @@ int joy_update (struct usbjoy * joy) { switch (events[i].type & ~JS_EVENT_INIT) { case JS_EVENT_AXIS: if (events[i].number == 0) { - if (events[i].value == 0) joy->stateaxes[JOYLEFT] = joy->stateaxes[JOYRIGHT] = 0; - else if (events[i].value < 0) joy->stateaxes[JOYLEFT] = 1; - else joy->stateaxes[JOYRIGHT] = 1; + joy->stateaxes[JOYLEFT] = joy->stateaxes[JOYRIGHT] = 0; + if (events[i].value < -DEAD_ZONE) joy->stateaxes[JOYLEFT] = 1; + else if (events[i].value > DEAD_ZONE) joy->stateaxes[JOYRIGHT] = 1; + joy->axevals[0] = events[i].value; } else if (events[i].number == 1) { - if (events[i].value == 0) joy->stateaxes[JOYUP] = joy->stateaxes[JOYDOWN] = 0; - else if (events[i].value < 0) joy->stateaxes[JOYUP] = 1; - else joy->stateaxes[JOYDOWN] = 1; + joy->stateaxes[JOYUP] = joy->stateaxes[JOYDOWN] = 0; + if (events[i].value < -DEAD_ZONE) joy->stateaxes[JOYUP] = 1; + else if (events[i].value > DEAD_ZONE) joy->stateaxes[JOYDOWN] = 1; + joy->axevals[1] = events[i].value; } event = 1; break; @@ -418,6 +422,7 @@ void gp2x_usbjoy_deinit (void) { int i; for (i=0; i