From: notaz <notasas@gmail.com>
Date: Sat, 7 Oct 2023 22:55:58 +0000 (+0300)
Subject: setup spu r8 handlers
X-Git-Tag: r24~126
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=63b05f75121cffb317e0ef68fa90a00c7a9aabdb;p=pcsx_rearmed.git

setup spu r8 handlers

used by Xenogears, unknown what for
---

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 7c670f8b..fc19494e 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -180,6 +180,16 @@ make_dma_func(3)
 make_dma_func(4)
 make_dma_func(6)
 
+static u32 io_spu_read8_even(u32 addr)
+{
+	return SPU_readRegister(addr, psxRegs.cycle) & 0xff;
+}
+
+static u32 io_spu_read8_odd(u32 addr)
+{
+	return SPU_readRegister(addr, psxRegs.cycle) >> 8;
+}
+
 static u32 io_spu_read16(u32 addr)
 {
 	return SPU_readRegister(addr, psxRegs.cycle);
@@ -401,6 +411,8 @@ void new_dyna_pcsx_mem_init(void)
 	map_item(&mem_iortab[IOMEM8(0x1803)], cdrRead3, 1);
 
 	for (i = 0x1c00; i < 0x2000; i += 2) {
+		map_item(&mem_iortab[IOMEM8(i)], io_spu_read8_even, 1);
+		map_item(&mem_iortab[IOMEM8(i+1)], io_spu_read8_odd, 1);
 		map_item(&mem_iortab[IOMEM16(i)], io_spu_read16, 1);
 		map_item(&mem_iortab[IOMEM32(i)], io_spu_read32, 1);
 	}
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index ecb8eaf9..60ff6c4c 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -120,8 +120,11 @@ u8 psxHwRead8(u32 add) {
 			log_unhandled("unhandled r8  %08x @%08x\n", add, psxRegs.pc);
 			// falthrough
 		default:
-			if (0x1f801c00 <= add && add < 0x1f802000)
-				log_unhandled("spu r8 %02x @%08x\n", add, psxRegs.pc);
+			if (0x1f801c00 <= add && add < 0x1f802000) {
+				u16 val = SPU_readRegister(add & ~1, psxRegs.cycle);
+				hard = (add & 1) ? val >> 8 : val;
+				break;
+			}
 			hard = psxHu8(add); 
 #ifdef PSXHW_LOG
 			PSXHW_LOG("*Unkwnown 8bit read at address %x\n", add);