From: notaz <notasas@gmail.com>
Date: Tue, 3 Jul 2007 19:23:12 +0000 (+0000)
Subject: code review and optimizations
X-Git-Tag: v1.85~713
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=85a36a57a816ac643ee5f982d774532a0ca4d58b;p=picodrive.git

code review and optimizations

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@180 be3aeb3a-fb24-0410-a615-afba39da0efa
---

diff --git a/cpu/Cyclone/Cyclone.h b/cpu/Cyclone/Cyclone.h
index 596cb99f..62a13143 100644
--- a/cpu/Cyclone/Cyclone.h
+++ b/cpu/Cyclone/Cyclone.h
@@ -15,20 +15,20 @@ extern int CycloneVer; // Version number of library
 
 struct Cyclone
 {
-  unsigned int d[8];   // [r7,#0x00]
-  unsigned int a[8];   // [r7,#0x20]
-  unsigned int pc;     // [r7,#0x40] Memory Base+PC
-  unsigned char srh;   // [r7,#0x44] Status Register high (T_S__III)
-  unsigned char xc;    // [r7,#0x45] Extend flag (____??X?)
-  unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]
-  unsigned char irq;   // [r7,#0x47] IRQ level
-  unsigned int osp;    // [r7,#0x48] Other Stack Pointer (USP/SSP)
-  unsigned int vector; // [r7,#0x4c] IRQ vector (temporary)
-  unsigned int prev_pc;// [r7,#0x50] set to start address of currently executed opcode + 2 (if enabled in config.h)
-  unsigned int unused; // [r7,#0x54] Unused
-  int stopped;         // [r7,#0x58] 1 == processor is in stopped state
-  int cycles;          // [r7,#0x5c]
-  int membase;         // [r7,#0x60] Memory Base (ARM address minus 68000 address)
+  unsigned int d[8];    // [r7,#0x00]
+  unsigned int a[8];    // [r7,#0x20]
+  unsigned int pc;      // [r7,#0x40] Memory Base+PC
+  unsigned char srh;    // [r7,#0x44] Status Register high (T_S__III)
+  unsigned char unused; // [r7,#0x45] Unused
+  unsigned char flags;  // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]
+  unsigned char irq;    // [r7,#0x47] IRQ level
+  unsigned int osp;     // [r7,#0x48] Other Stack Pointer (USP/SSP)
+  unsigned int xc;      // [r7,#0x4c] Extend flag (bit29: ??X? _)
+  unsigned int prev_pc; // [r7,#0x50] set to start address of currently executed opcode + 2 (if enabled in config.h)
+  unsigned int unused1; // [r7,#0x54] Unused
+  int stopped;          // [r7,#0x58] 1 == processor is in stopped state
+  int cycles;           // [r7,#0x5c]
+  int membase;          // [r7,#0x60] Memory Base (ARM address minus 68000 address)
   unsigned int   (*checkpc)(unsigned int pc); // [r7,#0x64] - Called to recalc Memory Base+pc
   unsigned char  (*read8  )(unsigned int a);  // [r7,#0x68]
   unsigned short (*read16 )(unsigned int a);  // [r7,#0x6c]
diff --git a/cpu/Cyclone/Disa/Disa.c b/cpu/Cyclone/Disa/Disa.c
index e0d00b5d..0743d2f4 100644
--- a/cpu/Cyclone/Disa/Disa.c
+++ b/cpu/Cyclone/Disa/Disa.c
@@ -39,7 +39,7 @@ int DisaGetEa(char *t,int ea,int size)
     // 110nnn - An + Disp + D/An
     int areg=0,ext=0,off=0,da=0,reg=0,wol=0,scale=0;
     ext=DisaWord(DisaPc)&0xffff;
-    
+
     areg=ea&7;
     off=ext&0xff;    da =ext&0x8000?'a':'d';
     reg=(ext>>12)&7; wol=ext&0x0800?'l':'w';
@@ -70,7 +70,7 @@ int DisaGetEa(char *t,int ea,int size)
     // 111011 - PC Relative + D/An
     int ext=0,off=0,da=0,reg=0,wol=0,scale=0;
     ext=DisaWord(DisaPc)&0xffff;
-    
+
     off=ext&0xff;    da =ext&0x8000?'a':'d';
     reg=(ext>>12)&7; wol=ext&0x0800?'l':'w';
     scale=1<<((ext>>9)&3);
@@ -225,7 +225,7 @@ static int DisaMove(int op)
 
   sea = op&0x003f;
   DisaGetEa(seat,sea,size);
-  
+
   dea =(op&0x01c0)>>3;
   dea|=(op&0x0e00)>>9;
   DisaGetEa(deat,dea,size);
@@ -272,6 +272,21 @@ static int DisaMoveSr(int op)
   return 0;
 }
 
+static int OpChk(op)
+{
+  int sea=0,dea=0;
+  char seat[64]="",deat[64]="";
+
+  sea=op&0x003f;
+  DisaGetEa(seat,sea,0);
+
+  dea=(op>>9)&7; dea|=8;
+  DisaGetEa(deat,dea,2);
+
+  sprintf(DisaText,"chk %s, %s",seat,deat);
+  return 0;
+}
+
 // ================ Opcodes 0x41c0+ ================
 static int DisaLea(int op)
 {
@@ -300,7 +315,7 @@ static int MakeRegList(char *list,int mask,int ea)
   for (i=0;i<17;i++)
   {
     int bit=0;
-    
+
     // Mask off bit i:
     if (reverse) bit=0x8000>>i; else bit=1<<i;
     bit&=mask;
@@ -322,7 +337,21 @@ static int MakeRegList(char *list,int mask,int ea)
 
   // Knock off trailing '/'
   len=strlen(list);
-  if (len>0) if (list[len-1]=='/') list[len-1]=0; 
+  if (len>0) if (list[len-1]=='/') list[len-1]=0;
+  return 0;
+}
+
+// ================ Opcodes 0x4800+ ================
+static int DisaNbcd(int op)
+{
+  // Nbcd 01001000 00eeeeee  (eeeeee=ea)
+  int ea=0;
+  char eat[64]="";
+
+  ea=op&0x003f;
+  DisaGetEa(eat,ea,0);
+
+  sprintf(DisaText,"nbcd %s",eat);
   return 0;
 }
 
@@ -337,7 +366,7 @@ static int DisaSwap(int op)
 // ================ Opcodes 0x4850+ ================
 static int DisaPea(int op)
 {
-  // Pea 01001000 01eeeeee  (eeeeee=ea)  pea 
+  // Pea 01001000 01eeeeee  (eeeeee=ea)  pea
   int ea=0;
   char eat[64]="";
 
@@ -445,7 +474,7 @@ static int Disa4E70(int op)
   sprintf(DisaText,"%s",inst[n]);
 
   //todo - 'stop' with 16 bit data
-  
+
   return 0;
 }
 
@@ -465,6 +494,19 @@ static int DisaTst(int op)
   return 0;
 }
 
+static int DisaTas(int op)
+{
+  // Tas 01001010 11eeeeee  (eeeeee=ea)
+  int ea=0;
+  char eat[64]="";
+
+  ea=op&0x003f;
+  DisaGetEa(eat,ea,0);
+
+  sprintf(DisaText,"tas %s",eat);
+  return 0;
+}
+
 // ================ Opcodes 0x4e80+ ================
 static int DisaJsr(int op)
 {
@@ -684,6 +726,23 @@ static int DisaCmpEor(int op)
   return 0;
 }
 
+static int DisaCmpm(int op)
+{
+  char seat[64]="",deat[64]="";
+  int type=0,size=0,sea,dea;
+
+  type=(op>>8)&1;
+  size=(op>>6)&3; if (size>=3) return 1;
+  sea=(op&7)|0x18;
+  dea=(op>>9)&0x3f;
+  DisaGetEa(seat,sea,size);
+  DisaGetEa(deat,dea,size);
+
+  sprintf(DisaText,"cmpm.%c %s, %s",Tasm[size],seat,deat);
+  return 0;
+}
+
+
 // ================ Opcodes 0xc140+ ================
 // 1100ttt1 01000sss  exg ds,dt
 // 1100ttt1 01001sss  exg as,at
@@ -708,14 +767,16 @@ static int DisaExg(int op)
 static int DisaAddx(int op)
 {
   // 1t01ddd1 xx000sss addx
-  int type=0,size=0,dea=0,sea=0;
+  int type=0,size=0,dea=0,sea=0,mem;
   char deat[64]="",seat[64]="";
   char *opcode[6]={"","subx","","","","addx"};
 
   type=(op>>12)&5;
   dea =(op>> 9)&7;
   size=(op>> 6)&3; if (size>=3) return 1;
-  sea  = op&0x3f;
+  sea = op&7;
+  mem = op&8;
+  if(mem) { sea+=0x20; dea+=0x20; }
 
   DisaGetEa(deat,dea,size);
   DisaGetEa(seat,sea,size);
@@ -749,7 +810,7 @@ static int DisaAsr(int op)
 
 static int DisaAsrEa(int op)
 {
-  // Asr/l/Ror/l etc EA - 11100ttd 11eeeeee 
+  // Asr/l/Ror/l etc EA - 11100ttd 11eeeeee
   int type=0,dir=0,size=1;
   char eat[64]="";
 
@@ -772,13 +833,16 @@ static int TryOp(int op)
   if ((op&0xff00)==0x0800) DisaBtstImm(op); // Btst/Bchg/Bclr/Bset
   if ((op&0xc000)==0x0000) DisaMove(op);
   if ((op&0xf900)==0x4000) DisaNeg(op); // Negx/Clr/Neg/Not
+  if ((op&0xf140)==0x4100) OpChk(op);
   if ((op&0xf1c0)==0x41c0) DisaLea(op);
   if ((op&0xf9c0)==0x40c0) DisaMoveSr(op);
+  if ((op&0xffc0)==0x4800) DisaNbcd(op);
   if ((op&0xfff8)==0x4840) DisaSwap(op);
   if ((op&0xffc0)==0x4840) DisaPea(op);
   if ((op&0xffb8)==0x4880) DisaExt(op);
   if ((op&0xfb80)==0x4880) DisaMovem(op);
   if ((op&0xff00)==0x4a00) DisaTst(op);
+  if ((op&0xffc0)==0x4ac0) DisaTas(op);
   if ((op&0xfff0)==0x4e40) DisaTrap(op);
   if ((op&0xfff8)==0x4e50) DisaLink(op);
   if ((op&0xfff8)==0x4e58) DisaUnlk(op);
@@ -796,6 +860,7 @@ static int TryOp(int op)
   if ((op&0xf100)==0x7000) DisaMoveq(op);
   if ((op&0x90c0)==0x90c0) DisaAritha(op);
   if ((op&0xf000)==0xb000) DisaCmpEor(op);
+  if ((op&0xf138)==0xb108) DisaCmpm(op);
   if ((op&0xf130)==0xc100) DisaExg(op);
   if ((op&0xf000)==0xe000) DisaAsr(op);
   if ((op&0xf8c0)==0xe0c0) DisaAsrEa(op);
diff --git a/cpu/Cyclone/Ea.cpp b/cpu/Cyclone/Ea.cpp
index 642a42b9..8b103c93 100644
--- a/cpu/Cyclone/Ea.cpp
+++ b/cpu/Cyclone/Ea.cpp
@@ -100,7 +100,7 @@ static int EaCalcReg(int r,int ea,int mask,int forceor,int shift,int noshift=0)
 
   if (ea>=8) needor=1; // Need to OR to access A0-7
 
-  if ((mask>>low)&8) if (ea&8) needor=0; // Ah - no we don't actually need to or, since the bit is high in r8
+  if (((mask&g_op)>>low)&8) needor=0; // Ah - no we don't actually need to or, since the bit is high in r8
 
   if (forceor) needor=1; // Special case for 0x30-0x38 EAs ;)
 
@@ -121,8 +121,9 @@ static int EaCalcReg(int r,int ea,int mask,int forceor,int shift,int noshift=0)
 }
 
 // EaCalc - ARM Register 'a' = Effective Address
-// Trashes r0,r2 and r3
+// If ea>=0x10, trashes r0,r2 and r3, else nothing
 // size values 0, 1, 2 ~ byte, word, long
+// mask shows usable bits in r8
 int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)
 {
   char text[32]="";
@@ -151,12 +152,19 @@ int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)
 
     if ((ea&7)==7 && step<2) step=2; // move.b (a7)+ or -(a7) steps by 2 not 1
 
-    EaCalcReg(2,ea,mask,0,0,1);
-    if(mask)
-      for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
-    lsl=2-low; // Having a lsl #x here saves one opcode
-    if      (lsl>=0) ot("  ldr r%d,[r7,r2,lsl #%i]\n",a,lsl);
-    else if (lsl<0)  ot("  ldr r%d,[r7,r2,lsr #%i]\n",a,-lsl);
+    if (ea==0x1f||ea==0x27) // A7 handlers are always separate
+    {
+      ot("  ldr r%d,[r7,#0x3c] ;@ A7\n",a);
+    }
+    else
+    {
+      EaCalcReg(2,ea,mask,0,0,1);
+      if(mask)
+        for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
+      lsl=2-low; // Having a lsl #x here saves one opcode
+      if      (lsl>=0) ot("  ldr r%d,[r7,r2,lsl #%i]\n",a,lsl);
+      else if (lsl<0)  ot("  ldr r%d,[r7,r2,lsr #%i]\n",a,-lsl);
+    }
 
     if ((ea&0x38)==0x18) // (An)+
     {
@@ -169,8 +177,15 @@ int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)
 
     if ((ea&0x38)==0x18||(ea&0x38)==0x20)
     {
-      if      (lsl>=0) ot("  str r%d,[r7,r2,lsl #%i]\n",strr,lsl);
-      else if (lsl<0)  ot("  str r%d,[r7,r2,lsr #%i]\n",strr,-lsl);
+      if (ea==0x1f||ea==0x27)
+      {
+        ot("  str r%d,[r7,#0x3c] ;@ A7\n",strr);
+      }
+      else
+      {
+        if      (lsl>=0) ot("  str r%d,[r7,r2,lsl #%i]\n",strr,lsl);
+        else if (lsl<0)  ot("  str r%d,[r7,r2,lsr #%i]\n",strr,-lsl);
+      }
     }
 
     if ((ea&0x38)==0x20) Cycles+=size<2 ? 6:10; // -(An) Extra cycles
@@ -263,8 +278,8 @@ int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)
     }
 
     ot("  ldrh r2,[r4],#2 ;@ Fetch immediate value\n");
-    ot("  ldrh r0,[r4],#2\n"); pc_dirty=1;
-    ot("  orr r%d,r0,r2,lsl #16\n",a);
+    ot("  ldrh r3,[r4],#2\n"); pc_dirty=1;
+    ot("  orr r%d,r3,r2,lsl #16\n",a);
     Cycles+=8; // Extra cycles
     return 0;
   }
@@ -298,7 +313,7 @@ int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend)
       lsl=2-low; // Having a lsl #2 here saves one opcode
     }
 
-    if (top) nsarm=3;
+    if (top||!sign_extend) nsarm=3;
 
     ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v);
 
@@ -352,6 +367,43 @@ int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend)
   ot("\n"); return 0;
 }
 
+// calculate EA and  read
+// if (ea  < 0x10) nothing is trashed
+// if (ea == 0x3c) r2 and r3 are trashed
+// else r0-r3 are trashed
+// size values 0, 1, 2 ~ byte, word, long
+// r_ea is reg to store ea in (-1 means ea is not needed), r is dst reg
+// if sign_extend is 0, non-32bit values will have MS bits undefined
+int EaCalcRead(int r_ea,int r,int ea,int size,int mask,int sign_extend)
+{
+  if (ea<0x10)
+  {
+    if (r_ea==-1)
+    {
+      r_ea=r;
+      if (!sign_extend) size=2;
+    }
+  }
+  else if (ea==0x3c) // #imm
+  {
+    r_ea=r;
+  }
+  else
+  {
+    if (r_ea==-1) r_ea=0;
+  }
+
+  EaCalc (r_ea,mask,ea,size,0,sign_extend);
+  EaRead (r_ea,   r,ea,size,mask,0,sign_extend);
+
+  return 0;
+}
+
+int EaCalcReadNoSE(int r_ea,int r,int ea,int size,int mask)
+{
+  return EaCalcRead(r_ea,r,ea,size,mask,0);
+}
+
 // Return 1 if we can read this ea
 int EaCanRead(int ea,int size)
 {
diff --git a/cpu/Cyclone/Main.cpp b/cpu/Cyclone/Main.cpp
index fce0c3d4..96de268c 100644
--- a/cpu/Cyclone/Main.cpp
+++ b/cpu/Cyclone/Main.cpp
@@ -277,6 +277,7 @@ static void PrintFramework()
     ot("  bx lr\n");
     ot("\n");
 #endif
+  // 68k: XNZVC, ARM: NZCV
   if (ms) ot("CycloneSetSr\n");
   else    ot("CycloneSetSr:\n");
   ot("  mov r2,r1,lsr #8\n");
@@ -291,8 +292,8 @@ static void PrintFramework()
   ot("  str r3,[r0,#0x3C]\n");
   ot("  str r2,[r0,#0x48]\n");
   ot("setsr_noswap%s\n",ms?"":":");
-  ot("  mov r2,r1,lsr #3\n");
-  ot("  strb r2,[r0,#0x45] ;@ the X flag\n");
+  ot("  mov r2,r1,lsl #25\n");
+  ot("  str r2,[r0,#0x4c] ;@ the X flag\n");
   ot("  bic r2,r1,#0xf3\n");
   ot("  tst r1,#1\n");
   ot("  orrne r2,r2,#2\n");
@@ -310,8 +311,8 @@ static void PrintFramework()
   ot("  orrne r2,r2,#2\n");
   ot("  tst r1,#2\n");
   ot("  orrne r2,r2,#1\n");
-  ot("  ldrb r1,[r0,#0x45] ;@ the X flag\n");
-  ot("  tst r1,#2\n");
+  ot("  ldr r1,[r0,#0x4c] ;@ the X flag\n");
+  ot("  tst r1,#0x20000000\n");
   ot("  orrne r2,r2,#0x10\n");
   ot("  ldrb r1,[r0,#0x44] ;@ the SR high\n");
   ot("  orr r0,r2,r1,lsl #8\n");
@@ -418,8 +419,12 @@ int MemHandler(int type,int size,int addrreg)
   addrreg=0;
 #endif
   if (addrreg != 0)
+  {
+    ot("  add lr,pc,#4\n"); // helps to prevent interlocks
     ot("  mov r0,r%i\n", addrreg);
-  ot("  mov lr,pc\n");
+  }
+  else
+    ot("  mov lr,pc\n");
   ot("  ldr pc,[r7,#0x%x] ;@ Call ",func);
 
   // Document what we are calling:
@@ -473,6 +478,7 @@ static void PrintOpcodes()
   ot("  mov r0,#0x10\n");
   ot("  bl Exception\n");
 #endif
+  ot("\n");
   Cycles=34;
   OpEnd();
 
@@ -499,6 +505,7 @@ static void PrintOpcodes()
   ot("  mov r0,#0x28\n");
   ot("  bl Exception\n");
 #endif
+  ot("\n");
   Cycles=4;
   OpEnd();
 
@@ -524,6 +531,7 @@ static void PrintOpcodes()
   ot("  mov r0,#0x2c\n");
   ot("  bl Exception\n");
 #endif
+  ot("\n");
   Cycles=4;
   OpEnd();
 
diff --git a/cpu/Cyclone/OpAny.cpp b/cpu/Cyclone/OpAny.cpp
index 3a401668..8e120154 100644
--- a/cpu/Cyclone/OpAny.cpp
+++ b/cpu/Cyclone/OpAny.cpp
@@ -57,11 +57,11 @@ void OpEnd(int sea, int tea)
   ot("\n");
 }
 
-int OpBase(int op,int sepa)
+int OpBase(int op,int size,int sepa)
 {
   int ea=op&0x3f; // Get Effective Address
   if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7
-  if (ea>=0x18 && ea<0x28 && (ea&7)==7) return op; // Specific handler for (a7)+ and -(a7)
+  if (size==0&&(ea==0x1f || ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)
   if (ea<0x38) return op&~7;   // Use 1 handler for (a0)-(a7), etc...
   return op;
 }
@@ -79,57 +79,65 @@ int OpGetFlags(int subtract,int xbit,int specialz)
 
   if (xbit)
   {
-    ot("  mov r2,r9,lsr #28\n");
-    ot("  strb r2,[r7,#0x45] ;@ Save X bit\n");
+    ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
   }
   return 0;
 }
 
 // -----------------------------------------------------------------
 
+int g_op;
+
 void OpAny(int op)
 {
   memset(OpData,0x33,sizeof(OpData));
   OpData[0]=(unsigned char)(op>>8);
   OpData[1]=(unsigned char)op;
-
-  if ((op&0xf100)==0x0000) OpArith(op);
-  if ((op&0xc000)==0x0000) OpMove(op);
-  if ((op&0xf5bf)==0x003c) OpArithSr(op); // Ori/Andi/Eori $nnnn,sr
-  if ((op&0xf100)==0x0100) OpBtstReg(op);
-  if ((op&0xf138)==0x0108) OpMovep(op);
-  if ((op&0xff00)==0x0800) OpBtstImm(op);
-  if ((op&0xf900)==0x4000) OpNeg(op);
-  if ((op&0xf140)==0x4100) OpChk(op);
-  if ((op&0xf1c0)==0x41c0) OpLea(op);
-  if ((op&0xf9c0)==0x40c0) OpMoveSr(op);
-  if ((op&0xffc0)==0x4800) OpNbcd(op);
-  if ((op&0xfff8)==0x4840) OpSwap(op);
-  if ((op&0xffc0)==0x4840) OpPea(op);
-  if ((op&0xffb8)==0x4880) OpExt(op);
-  if ((op&0xfb80)==0x4880) OpMovem(op);
-  if ((op&0xff00)==0x4a00) OpTst(op);
-  if ((op&0xffc0)==0x4ac0) OpTas(op);
-  if ((op&0xfff0)==0x4e40) OpTrap(op);
-  if ((op&0xfff8)==0x4e50) OpLink(op);
-  if ((op&0xfff8)==0x4e58) OpUnlk(op);
-  if ((op&0xfff0)==0x4e60) OpMoveUsp(op);
-  if ((op&0xfff8)==0x4e70) Op4E70(op); // Reset/Rts etc
-  if ((op&0xfffd)==0x4e70) OpStopReset(op);
-  if ((op&0xff80)==0x4e80) OpJsr(op);
-  if ((op&0xf000)==0x5000) OpAddq(op);
-  if ((op&0xf0c0)==0x50c0) OpSet(op);
-  if ((op&0xf0f8)==0x50c8) OpDbra(op);
-  if ((op&0xf000)==0x6000) OpBranch(op);
-  if ((op&0xf100)==0x7000) OpMoveq(op);
-  if ((op&0xa000)==0x8000) OpArithReg(op); // Or/Sub/And/Add
-  if ((op&0xb1f0)==0x8100) OpAbcd(op);
-  if ((op&0xb0c0)==0x80c0) OpMul(op);
-  if ((op&0x90c0)==0x90c0) OpAritha(op);
-  if ((op&0xb130)==0x9100) OpAddx(op);
-  if ((op&0xf000)==0xb000) OpCmpEor(op);
-  if ((op&0xf138)==0xb108) OpCmpm(op);
-  if ((op&0xf130)==0xc100) OpExg(op);
-  if ((op&0xf000)==0xe000) OpAsr(op); // Asr/l/Ror/l etc
-  if ((op&0xf8c0)==0xe0c0) OpAsrEa(op);
+  g_op=op;
+
+  if ((op&0xf100)==0x0000) OpArith(op);    // +
+  if ((op&0xc000)==0x0000) OpMove(op);     // +
+  if ((op&0xf5bf)==0x003c) OpArithSr(op);  // + Ori/Andi/Eori $nnnn,sr
+  if ((op&0xf100)==0x0100) OpBtstReg(op);  // +
+  if ((op&0xf138)==0x0108) OpMovep(op);    // +
+  if ((op&0xff00)==0x0800) OpBtstImm(op);  // +
+  if ((op&0xf900)==0x4000) OpNeg(op);      // +
+  if ((op&0xf140)==0x4100) OpChk(op);      // +
+  if ((op&0xf1c0)==0x41c0) OpLea(op);      // +
+  if ((op&0xf9c0)==0x40c0) OpMoveSr(op);   // +
+  if ((op&0xffc0)==0x4800) OpNbcd(op);     // +
+  if ((op&0xfff8)==0x4840) OpSwap(op);     // +
+  if ((op&0xffc0)==0x4840) OpPea(op);      // +
+  if ((op&0xffb8)==0x4880) OpExt(op);      // +
+  if ((op&0xfb80)==0x4880) OpMovem(op);    // +
+  if ((op&0xff00)==0x4a00) OpTst(op);      // +
+  if ((op&0xffc0)==0x4ac0) OpTas(op);      // +
+  if ((op&0xfff0)==0x4e40) OpTrap(op);     // +
+  if ((op&0xfff8)==0x4e50) OpLink(op);     // +
+  if ((op&0xfff8)==0x4e58) OpUnlk(op);     // +
+  if ((op&0xfff0)==0x4e60) OpMoveUsp(op);  // +
+  if ((op&0xfff8)==0x4e70) Op4E70(op);     // + Reset/Rts etc
+  if ((op&0xfffd)==0x4e70) OpStopReset(op);// +
+  if ((op&0xff80)==0x4e80) OpJsr(op);      // +
+  if ((op&0xf000)==0x5000) OpAddq(op);     // +
+  if ((op&0xf0c0)==0x50c0) OpSet(op);      // +
+  if ((op&0xf0f8)==0x50c8) OpDbra(op);     // +
+  if ((op&0xf000)==0x6000) OpBranch(op);   // +
+  if ((op&0xf100)==0x7000) OpMoveq(op);    // +
+  if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add
+  if ((op&0xb1f0)==0x8100) OpAbcd(op);     // +
+  if ((op&0xb0c0)==0x80c0) OpMul(op);      // +
+  if ((op&0x90c0)==0x90c0) OpAritha(op);   // +
+  if ((op&0xb130)==0x9100) OpAddx(op);     // +
+  if ((op&0xf000)==0xb000) OpCmpEor(op);   // +
+  if ((op&0xf138)==0xb108) OpCmpm(op);     // +
+  if ((op&0xf130)==0xc100) OpExg(op);      // +
+  if ((op&0xf000)==0xe000) OpAsr(op);      // + Asr/l/Ror/l etc
+  if ((op&0xf8c0)==0xe0c0) OpAsrEa(op);    // +
+
+  if (op==0xffff)
+  {
+    SuperEnd();
+  }
 }
+
diff --git a/cpu/Cyclone/OpArith.cpp b/cpu/Cyclone/OpArith.cpp
index 74673b8f..8280a2b5 100644
--- a/cpu/Cyclone/OpArith.cpp
+++ b/cpu/Cyclone/OpArith.cpp
@@ -20,18 +20,16 @@ int OpArith(int op)
   if (EaCanRead(tea,size)==0) return 1;
   if (EaCanWrite(tea)==0 || EaAn(tea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op, sea, tea); Cycles=4;
 
-  EaCalc(10,0x0000, sea,size,1);
-  EaCalc(11,0x003f, tea,size,1);
-  EaRead(10,    10, sea,size,0,0,0);
-  EaRead(11,     0, tea,size,0x003f,1);
+  EaCalcReadNoSE((type!=6)?11:-1,0,tea,size,0x003f);
+  EaCalcReadNoSE(-1,10,sea,size,0);
 
-  if (size==0) shiftstr=",asl #24";
-  else if (size==1) shiftstr=",asl #16";
+  if (size<2) shiftstr=(char *)(size?",asl #16":",asl #24");
+  if (size<2) ot("  mov r0,r0,asl %i\n",size?16:24);
 
   ot(";@ Do arithmetic:\n");
 
@@ -92,7 +90,7 @@ int OpAddq(int op)
   if (EaCanWrite(ea)     ==0) return 1;
   if (size == 0 && EaAn(ea) ) return 1;
 
-  use=OpBase(op,1);
+  use=OpBase(op,size,1);
 
   if (num!=8) use|=0x0e00; // If num is not 8, use same handler
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
@@ -104,8 +102,7 @@ int OpAddq(int op)
 
   if (size>0 && (ea&0x38)==0x08) size=2; // addq.w #n,An is also 32-bit
 
-  EaCalc(10,0x003f, ea,size,1);
-  EaRead(10,     0, ea,size,0x003f,1);
+  EaCalcReadNoSE(10,0,ea,size,0x003f);
 
   shift=32-(8<<size);
 
@@ -125,6 +122,8 @@ int OpAddq(int op)
     sprintf(count,"#0x%.4x",8<<shift);
   }
 
+  if (size<2)  ot("  mov r0,r0,asl #%d\n\n",size?16:24);
+
   if (type==0) ot("  adds r1,r0,%s\n",count);
   if (type==1) ot("  subs r1,r0,%s\n",count);
 
@@ -144,6 +143,8 @@ int OpArithReg(int op)
 {
   int use=0;
   int type=0,size=0,dir=0,rea=0,ea=0;
+  char *asl="";
+  char *strop=0;
 
   type=(op>>12)&5;
   rea =(op>> 9)&7;
@@ -158,26 +159,27 @@ int OpArithReg(int op)
   if (dir    && EaCanWrite(ea)==0)      return 1;
   if ((size==0||!(type&1))&&EaAn(ea))   return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use same opcode for Dn
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=4;
 
-  ot(";@ Get r10=EA r11=EA value\n");
-  EaCalc(10,0x003f, ea,size,1);
-  EaRead(10,    11, ea,size,0x003f,1);
-  ot(";@ Get r0=Register r1=Register value\n");
-  EaCalc( 0,0x0e00,rea,size,1);
-  EaRead( 0,     1,rea,size,0x0e00,1);
+  EaCalcReadNoSE(dir?10:-1,0,ea,size,0x003f);
+
+  EaCalcReadNoSE(dir?-1:10,1,rea,size,0x0e00);
 
   ot(";@ Do arithmetic:\n");
-  if (type==0) ot("  orr  ");
-  if (type==1) ot("  subs ");
-  if (type==4) ot("  and  ");
-  if (type==5) ot("  adds ");
-  if (dir) ot("r1,r11,r1\n");
-  else     ot("r1,r1,r11\n");
+  if (type==0) strop = "orr";
+  if (type==1) strop = (char *) (dir ? "subs" : "rsbs");
+  if (type==4) strop = "and";
+  if (type==5) strop = "adds";
+
+  if (size==0) asl=",asl #24";
+  if (size==1) asl=",asl #16";
+
+  if (size<2) ot("  mov r0,r0%s\n",asl);
+  ot("  %s r1,r0,r1%s\n",strop,asl);
 
   if ((type&1)==0) ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
 
@@ -185,8 +187,9 @@ int OpArithReg(int op)
   ot("\n");
 
   ot(";@ Save result:\n");
-  if (dir) EaWrite(10, 1, ea,size,0x003f,1);
-  else     EaWrite( 0, 1,rea,size,0x0e00,1);
+  if (size<2) ot("  mov r1,r1,asr #%d\n",size?16:24);
+  if (dir) EaWrite(10, 1, ea,size,0x003f,0,0);
+  else     EaWrite(10, 1,rea,size,0x0e00,0,0);
 
   if(rea==ea) {
     if(ea<8) Cycles=(size>=2)?8:4; else Cycles+=(size>=2)?26:14;
@@ -220,7 +223,7 @@ int OpMul(int op)
   // See if we can do this opcode:
   if (EaCanRead(ea,1)==0||EaAn(ea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,1);
   use&=~0x0e00; // Use same for all registers
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
@@ -228,17 +231,17 @@ int OpMul(int op)
   if(type) Cycles=54;
   else     Cycles=sign?158:140;
 
-  EaCalc(10,0x003f, ea, 1);
-  EaRead(10,    10, ea, 1,0x003f);
+  EaCalcReadNoSE(-1,0,ea,1,0x003f);
+
+  EaCalc(10,0x0e00,rea, 2);
+  EaRead(10,     2,rea, 2,0x0e00);
 
-  EaCalc (0,0x0e00,rea, 2,1);
-  EaRead (0,     2,rea, 2,0x0e00,1);
+  ot("  movs r0,r0,asl #16\n");
 
   if (type==0) // div
   {
     // the manual says C is always cleared, but neither Musashi nor FAME do that
     //ot("  bic r9,r9,#0x20000000 ;@ always clear C\n");
-    ot("  tst r10,r10\n");
     ot("  beq divzero%.4x ;@ division by zero\n",op);
     ot("\n");
     
@@ -246,7 +249,8 @@ int OpMul(int op)
     {
       ot("  mov r11,#0 ;@ r11 = 1 or 2 if the result is negative\n");
       ot("  orrmi r11,r11,#1\n");
-      ot("  rsbmi r10,r10,#0 ;@ Make r10 positive\n");
+      ot("  mov r0,r0,asr #16\n");
+      ot("  rsbmi r0,r0,#0 ;@ Make r0 positive\n");
       ot("\n");
       ot("  tst r2,r2\n");
       ot("  orrmi r11,r11,#2\n");
@@ -255,13 +259,12 @@ int OpMul(int op)
     }
     else
     {
-      ot("  mov r10,r10,lsl #16 ;@ use only 16 bits of divisor\n");
-      ot("  mov r10,r10,lsr #16\n");
+      ot("  mov r0,r0,lsr #16 ;@ use only 16 bits of divisor\n");
     }
 
-    ot(";@ Divide r2 by r10\n");
+    ot(";@ Divide r2 by r0\n");
     ot("  mov r3,#0\n");
-    ot("  mov r1,r10\n");
+    ot("  mov r1,r0\n");
     ot("\n");
     ot(";@ Shift up divisor till it's just less than numerator\n");
     ot("Shift%.4x%s\n",op,ms?"":":");
@@ -274,7 +277,7 @@ int OpMul(int op)
     ot("  cmp r2,r1\n");
     ot("  adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n");
     ot("  subcs r2,r2,r1\n");
-    ot("  teq r1,r10\n");
+    ot("  teq r1,r0\n");
     ot("  movne r1,r1,lsr #1\n");
     ot("  bne Divide%.4x\n",op);
     ot("\n");
@@ -314,33 +317,32 @@ int OpMul(int op)
 
   if (type==1)
   {
-    char *shift="asr";
-
     ot(";@ Get 16-bit signs right:\n");
-    if (sign==0) { ot("  mov r10,r10,lsl #16\n"); shift="lsr"; }
+    ot("  mov r0,r0,%s #16\n",sign?"asr":"lsr");
     ot("  mov r2,r2,lsl #16\n");
-
-    if (sign==0) ot("  mov r10,r10,lsr #16\n");
-    ot("  mov r2,r2,%s #16\n",shift);
+    ot("  mov r2,r2,%s #16\n",sign?"asr":"lsr");
     ot("\n");
 
-    ot("  mul r1,r2,r10\n");
+    ot("  mul r1,r2,r0\n");
     ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
     OpGetFlags(0,0);
   }
   ot("\n");
 
-  EaWrite(0,     1,rea, 2,0x0e00,1);
+  EaWrite(10,    1,rea, 2,0x0e00,1);
 
-  ot("endofop%.4x%s\n",op,ms?"":":");
+  if (type==0) ot("endofop%.4x%s\n",op,ms?"":":");
   OpEnd(ea);
 
-  ot("divzero%.4x%s\n",op,ms?"":":");
-  ot("  mov r0,#0x14 ;@ Divide by zero\n");
-  ot("  bl Exception\n");
-  Cycles+=38;
-  OpEnd(ea);
-  ot("\n");
+  if (type==0) // div
+  {
+    ot("divzero%.4x%s\n",op,ms?"":":");
+    ot("  mov r0,#0x14 ;@ Divide by zero\n");
+    ot("  bl Exception\n");
+    Cycles+=38;
+    OpEnd(ea);
+    ot("\n");
+  }
 
   return 0;
 }
@@ -349,9 +351,8 @@ int OpMul(int op)
 int GetXBit(int subtract)
 {
   ot(";@ Get X bit:\n");
-  ot("  ldrb r2,[r7,#0x45]\n");
-  if (subtract) ot("  mvn r2,r2,lsl #28 ;@ Invert it\n");
-  else          ot("  mov r2,r2,lsl #28\n");
+  ot("  ldr r2,[r7,#0x4c]\n");
+  if (subtract) ot("  mvn r2,r2 ;@ Invert it\n");
   ot("  msr cpsr_flg,r2 ;@ Get into Carry\n");
   ot("\n");
   return 0;
@@ -362,34 +363,46 @@ int GetXBit(int subtract)
 int OpAbcd(int op)
 {
   int use=0;
-  int type=0,sea=0,addr=0,dea=0;
+  int type=0,sea=0,mem=0,dea=0;
   
   type=(op>>14)&1; // sbcd/abcd
   dea =(op>> 9)&7;
-  addr=(op>> 3)&1;
+  mem =(op>> 3)&1;
   sea = op     &7;
 
-  if (addr) { sea|=0x20; dea|=0x20; }
+  if (mem) { sea|=0x20; dea|=0x20; }
 
   use=op&~0x0e07; // Use same opcode for all registers..
-  if (sea==0x27||dea==0x27) use=op; // ..except -(a7)
+  if (sea==0x27) use|=0x0007; // ___x.b -(a7)
+  if (dea==0x27) use|=0x0e00; // ___x.b -(a7)
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,dea); Cycles=6;
 
-  EaCalc( 0,0x0007, sea,0,1);
-  EaRead( 0,    10, sea,0,0x0007,1);
-  EaCalc(11,0x0e00, dea,0,1);
-  EaRead(11,     1, dea,0,0x0e00,1);
+  if (mem)
+  {
+    ot(";@ Get src/dest EA vals\n");
+    EaCalc (0,0x000f, sea,0,1);
+    EaRead (0,    10, sea,0,0x000f,1);
+    EaCalcReadNoSE(11,0,dea,0,0x1e00);
+  }
+  else
+  {
+    ot(";@ Get src/dest reg vals\n");
+    EaCalcReadNoSE(-1,10,sea,0,0x0007);
+    EaCalcReadNoSE(11,0,dea,0,0x0e00);
+    ot("  mov r10,r10,asl #24\n");
+  }
+  ot("  mov r1,r0,asl #24\n\n");
 
   ot("  bic r9,r9,#0xb1000000 ;@ clear all flags except old Z\n");
 
   if (type)
   {
-    ot("  ldrb r0,[r7,#0x45] ;@ Get X bit\n");
+    ot("  ldr r0,[r7,#0x4c] ;@ Get X bit\n");
     ot("  mov r3,#0x00f00000\n");
     ot("  and r2,r3,r1,lsr #4\n");
-    ot("  tst r0,#2\n");
+    ot("  tst r0,#0x20000000\n");
     ot("  and r0,r3,r10,lsr #4\n");
     ot("  add r0,r0,r2\n");
     ot("  addne r0,r0,#0x00100000\n");
@@ -413,10 +426,10 @@ int OpAbcd(int op)
   }
   else
   {
-    ot("  ldrb r0,[r7,#0x45] ;@ Get X bit\n");
+    ot("  ldr r0,[r7,#0x4c] ;@ Get X bit\n");
     ot("  mov r3,#0x00f00000\n");
     ot("  and r2,r3,r10,lsr #4\n");
-    ot("  tst r0,#2\n");
+    ot("  tst r0,#0x20000000\n");
     ot("  and r0,r3,r1,lsr #4\n");
     ot("  sub r0,r0,r2\n");
     ot("  subne r0,r0,#0x00100000\n");
@@ -439,8 +452,8 @@ int OpAbcd(int op)
     ot("  bicne r9,r9,#0x40000000 ;@ Z flag\n");
   }
 
-  ot("  mov r2,r9,lsr #28\n");
-  ot("  strb r2,[r7,#0x45] ;@ Save X bit\n");
+  ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
+  ot("\n");
 
   EaWrite(11,     0, dea,0,0x0e00,1);
   OpEnd(sea,dea);
@@ -448,7 +461,7 @@ int OpAbcd(int op)
   return 0;
 }
 
-// 01008000 00eeeeee - nbcd <ea>
+// 01001000 00eeeeee - nbcd <ea>
 int OpNbcd(int op)
 {
   int use=0;
@@ -458,23 +471,22 @@ int OpNbcd(int op)
 
   if(EaCanWrite(ea)==0||EaAn(ea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if(op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=6;
   if(ea >= 8)  Cycles+=2;
 
-  EaCalc(10,0x3f, ea,0,1);
-  EaRead(10,   0, ea,0,0x3f,1);
+  EaCalcReadNoSE(10,0,ea,0,0x003f);
 
   // this is rewrite of Musashi's code
-  ot("  ldrb r2,[r7,#0x45]\n");
-  ot("  tst r2,#2\n");
-  ot("  mov r2,r0\n");
-  ot("  addne r2,r0,#0x01000000 ;@ add X\n");
+  ot("  ldr r2,[r7,#0x4c]\n");
+  ot("  bic r9,r9,#0xb0000000 ;@ clear all flags, except Z\n");
+  ot("  mov r0,r0,asl #24\n");
+  ot("  and r2,r2,#0x20000000\n");
+  ot("  add r2,r0,r2,lsr #5 ;@ add X\n");
   ot("  rsbs r1,r2,#0x9a000000 ;@ do arithmetic\n");
 
-  ot("  bic r9,r9,#0xb0000000 ;@ clear all flags, except Z\n");
   ot("  orrmi r9,r9,#0x80000000 ;@ N\n");
   ot("  cmp r1,#0x9a000000\n");
   ot("  beq finish%.4x\n",op);
@@ -495,8 +507,7 @@ int OpNbcd(int op)
   EaWrite(10,     1, ea,0,0x3f,1);
 
   ot("finish%.4x%s\n",op,ms?"":":");
-  ot("  mov r2,r9,lsr #28\n");
-  ot("  strb r2, [r7,#0x45]\n");
+  ot("  str r9,[r7,#0x4c] ;@ Save X\n");
 
   OpEnd(ea);
 
@@ -509,6 +520,7 @@ int OpAritha(int op)
 {
   int use=0;
   int type=0,size=0,sea=0,dea=0;
+  char *asr="";
 
   // Suba/Cmpa/Adda/(invalid):
   type=(op>>13)&3; if (type>=3) return 1;
@@ -520,7 +532,7 @@ int OpAritha(int op)
   // See if we can do this opcode:
   if (EaCanRead(sea,size)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use same opcode for An
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
@@ -528,18 +540,19 @@ int OpAritha(int op)
   if(size==2&&(sea<0x10||sea==0x3c)) Cycles+=2;
   if(type==1) Cycles=6;
 
-  
   // must calculate reg EA first, because of situations like: suba.w (A0)+, A0
-  EaCalc (10,0x0e00, dea,2,1);
-  EaRead (10,    11, dea,2,0x0e00);
+  EaCalc (10,0x1e00, dea,2,1);
+  EaRead (10,    11, dea,2,0x1e00);
+
+  EaCalc ( 0,0x003f, sea,size,1);
+  EaRead ( 0,     0, sea,size,0x003f,1);
 
-  EaCalc ( 0,0x003f, sea,size);
-  EaRead ( 0,     0, sea,size,0x003f);
+  if (size<2) asr=(char *)(size?",asr #16":",asr #24");
 
-  if (type==0) ot("  sub r11,r11,r0\n");
-  if (type==1) ot("  cmp r11,r0 ;@ Defines NZCV\n");
+  if (type==0) ot("  sub r11,r11,r0%s\n",asr);
+  if (type==1) ot("  cmp r11,r0%s ;@ Defines NZCV\n",asr);
   if (type==1) OpGetFlags(1,0); // Get Cmp flags
-  if (type==2) ot("  add r11,r11,r0\n");
+  if (type==2) ot("  add r11,r11,r0%s\n",asr);
   ot("\n");
   
   if (type!=1) EaWrite(10,    11, dea,2,0x0e00,1);
@@ -555,8 +568,9 @@ int OpAddx(int op)
 {
   int use=0;
   int type=0,size=0,dea=0,sea=0,mem=0;
+  char *asl="";
 
-  type=(op>>12)&5;
+  type=(op>>14)&1;
   dea =(op>> 9)&7;
   size=(op>> 6)&3; if (size>=3) return 1;
   sea = op&7;
@@ -569,24 +583,35 @@ int OpAddx(int op)
   if(mem) { sea+=0x20; dea+=0x20; }
 
   use=op&~0x0e07; // Use same opcode for Dn
-  if (size==0&&(sea==0x27||dea==0x27)) use=op; // ___x.b -(a7)
+  if (size==0&&sea==0x27) use|=0x0007; // ___x.b -(a7)
+  if (size==0&&dea==0x27) use|=0x0e00; // ___x.b -(a7)
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,dea); Cycles=4;
   if(size>=2)   Cycles+=4;
   if(sea>=0x10) Cycles+=2;
 
-  ot(";@ Get r10=EA r11=EA value\n");
-  EaCalc( 0,0x0007,sea,size,1);
-  EaRead( 0,    11,sea,size,0x0007,1);
-  ot(";@ Get r0=Register r1=Register value\n");
-  EaCalc( 0,0x0e00,dea,size,1);
-  EaRead( 0,     1,dea,size,0x0e00,1);
+  if (mem)
+  {
+    ot(";@ Get src/dest EA vals\n");
+    EaCalc (0,0x000f, sea,size,1);
+    EaRead (0,    11, sea,size,0x000f,1);
+    EaCalcReadNoSE(10,0,dea,size,0x1e00);
+  }
+  else
+  {
+    ot(";@ Get src/dest reg vals\n");
+    EaCalcReadNoSE(-1,11,sea,size,0x0007);
+    EaCalcReadNoSE(10,0,dea,size,0x0e00);
+    if (size<2) ot("  mov r11,r11,asl #%d\n\n",size?16:24);
+  }
+
+  if (size<2) asl=(char *)(size?",asl #16":",asl #24");
 
   ot(";@ Do arithmetic:\n");
-  GetXBit(type==1);
+  GetXBit(type==0);
 
-  if (type==5 && size<2)
+  if (type==1 && size<2)
   {
     ot(";@ Make sure the carry bit will tip the balance:\n");
     ot("  mvn r2,#0\n");
@@ -594,10 +619,10 @@ int OpAddx(int op)
     ot("\n");
   }
 
-  if (type==1) ot("  sbcs r1,r1,r11\n");
-  if (type==5) ot("  adcs r1,r1,r11\n");
+  if (type==0) ot("  rscs r1,r11,r0%s\n",asl);
+  if (type==1) ot("  adcs r1,r11,r0%s\n",asl);
   ot("  orr r3,r9,#0xb0000000 ;@ for old Z\n");
-  OpGetFlags(type==1,1,0); // subtract
+  OpGetFlags(type==0,1,0); // subtract
   if (size<2) {
     ot("  movs r2,r1,lsr #%i\n", size?16:24);
     ot("  orreq r9,r9,#0x40000000 ;@ add potentially missed Z\n");
@@ -606,7 +631,7 @@ int OpAddx(int op)
   ot("\n");
 
   ot(";@ Save result:\n");
-  EaWrite( 0, 1, dea,size,0x0e00,1);
+  EaWrite(10, 1, dea,size,0x0e00,1);
 
   OpEnd(sea,dea);
 
@@ -619,6 +644,7 @@ int OpCmpEor(int op)
 {
   int rea=0,eor=0;
   int size=0,ea=0,use=0;
+  char *asl="";
 
   // Get EA and register EA
   rea=(op>>9)&7;
@@ -633,7 +659,7 @@ int OpCmpEor(int op)
   if (eor && EaCanWrite(ea)==0) return 1;
   if (EaAn(ea)&&(eor||size==0)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use 1 handler for register d0-7
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
@@ -646,18 +672,19 @@ int OpCmpEor(int op)
   }
 
   ot(";@ Get EA into r10 and value into r0:\n");
-  EaCalc (10,0x003f,  ea,size,1);
-  EaRead (10,     0,  ea,size,0x003f,1);
+  EaCalcReadNoSE(eor?10:-1,0,ea,size,0x003f);
 
   ot(";@ Get register operand into r1:\n");
-  EaCalc (1, 0x0e00, rea,size,1);
-  EaRead (1,      1, rea,size,0x0e00,1);
+  EaCalcReadNoSE(-1,1,rea,size,0x0e00);
+
+  if (size<2) ot("  mov r0,r0,asl #%d\n\n",size?16:24);
+  if (size<2) asl=(char *)(size?",asl #16":",asl #24");
 
   ot(";@ Do arithmetic:\n");
-  if (eor==0) ot("  cmp r1,r0\n");
+  if (eor==0) ot("  rsbs r1,r0,r1%s\n",asl);
   if (eor)
   {
-    ot("  eor r1,r0,r1\n");
+    ot("  eor r1,r0,r1%s\n",asl);
     ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
   }
 
@@ -674,6 +701,7 @@ int OpCmpEor(int op)
 int OpCmpm(int op)
 {
   int size=0,sea=0,dea=0,use=0;
+  char *asl="";
 
   // get size, get EAs
   size=(op>>6)&3; if (size>=3) return 1;
@@ -681,21 +709,24 @@ int OpCmpm(int op)
   dea=(op>>9)&0x3f;
 
   use=op&~0x0e07; // Use 1 handler for all registers..
-  if (size==0&&(sea==0x1f||dea==0x1f)) use=op; // ..except (a7)+
+  if (size==0&&sea==0x1f) use|=0x0007; // ..except (a7)+
+  if (size==0&&dea==0x1f) use|=0x0e00;
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea); Cycles=4;
 
   ot(";@ Get src operand into r10:\n");
-  EaCalc (0,0x000f, sea,size,1);
+  EaCalc (0,0x1e00, sea,size,1);
   EaRead (0,    10, sea,size,0x000f,1);
 
   ot(";@ Get dst operand into r0:\n");
-  EaCalc (0,0x1e00, dea,size,1);
-  EaRead (0,     0, dea,size,0x1e00,1);
+  EaCalcReadNoSE(-1,0,dea,size,0x1e00);
 
-  ot("  cmp r0,r10\n");
+  if (size<2) asl=(char *)(size?",asl #16":",asl #24");
+
+  ot("  rsbs r0,r10,r0%s\n",asl);
   OpGetFlags(1,0); // Cmp like subtract
+  ot("\n");
 
   OpEnd(sea);
   return 0;
@@ -721,19 +752,20 @@ int OpChk(int op)
   // See if we can do this opcode:
   if (EaCanRead(ea,size)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use 1 handler for register d0-7
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=10;
 
   ot(";@ Get EA into r10 and value into r0:\n");
-  EaCalc (10,0x003f,  ea,size,1);
-  EaRead (10,     0,  ea,size,0x003f,1);
+  EaCalcReadNoSE(-1,0,ea,size,0x003f);
 
   ot(";@ Get register operand into r1:\n");
-  EaCalc (1, 0x0e00, rea,size,1);
-  EaRead (1,      1, rea,size,0x0e00,1);
+  EaCalcReadNoSE(-1,1,rea,size,0x0e00);
+
+  if (size<2) ot("  mov r0,r0,asl #%d\n",size?16:24);
+  if (size<2) ot("  mov r1,r1,asl #%d\n\n",size?16:24);
 
   ot(";@ get flags, including undocumented ones\n");
   ot("  and r3,r9,#0x80000000\n");
@@ -744,12 +776,11 @@ int OpChk(int op)
   ot("  bmi chktrap%.4x\n",op);
 
   ot(";@ Do arithmetic:\n");
+  ot("  bic r9,r9,#0x80000000 ;@ N\n");
   ot("  cmp r1,r0\n");
-  ot("  bicgt r9,r9,#0x80000000 ;@ N\n");
   ot("  bgt chktrap%.4x\n",op);
 
   ot(";@ old N remains\n");
-  ot("  bic r9,r9,#0x80000000 ;@ N\n");
   ot("  orr r9,r9,r3\n");
   OpEnd(ea);
 
diff --git a/cpu/Cyclone/OpBranch.cpp b/cpu/Cyclone/OpBranch.cpp
index f8eb584a..c24c7696 100644
--- a/cpu/Cyclone/OpBranch.cpp
+++ b/cpu/Cyclone/OpBranch.cpp
@@ -139,8 +139,8 @@ int OpUnlk(int op)
   OpStart(op,0x10);
 
   ot(";@ Get An\n");
-  EaCalc(10, 7, 8, 2, 1);
-  EaRead(10, 0, 8, 2, 7, 1);
+  EaCalc(10, 0xf, 8, 2,   1);
+  EaRead(10,   0, 8, 2, 0xf, 1);
 
   ot("  add r11,r0,#4 ;@ A7+=4\n");
   ot("\n");
@@ -151,7 +151,7 @@ int OpUnlk(int op)
   ot("\n");
   ot(";@ An = value from stack:\n");
   EaWrite(10, 0, 8, 2, 7, 1);
-  
+
   Cycles=12;
   OpEnd(0x10);
   return 0;
@@ -181,7 +181,6 @@ int Op4E70(int op)
     SuperChange(op);
     CheckInterrupt(op);
     OpEnd(0x10);
-    SuperEnd(op);
     return 0;
 
     case 5: // rts
@@ -225,7 +224,7 @@ int OpJsr(int op)
   // See if we can do this opcode:
   if (EaCanRead(sea,-1)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,(op&0x40)?0:0x10);
@@ -294,17 +293,17 @@ int OpDbra(int op)
       break;
     case 2: // hi
       ot("  tst r9,#0x60000000 ;@ hi: !C && !Z\n");
-      ot("  beq DbraTrue%.4x\n\n",op);
+      ot("  beq DbraTrue\n\n");
       break;
     case 3: // ls
       ot("  tst r9,#0x60000000 ;@ ls: C || Z\n");
-      ot("  bne DbraTrue%.4x\n\n",op);
+      ot("  bne DbraTrue\n\n");
       break;
     default:
       ot(";@ Is the condition true?\n");
       ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
       ot(";@ If so, don't dbra\n");
-      ot("  b%s DbraTrue%.4x\n\n",Cond[cc],op);
+      ot("  b%s DbraTrue\n\n",Cond[cc]);
       break;
   }
 
@@ -332,10 +331,11 @@ int OpDbra(int op)
     OpEnd();
   }
   
-  if (cc==0||cc>=2)
+  //if (cc==0||cc>=2)
+  if (op==0x50c8)
   {
     ot(";@ condition true:\n");
-    ot("DbraTrue%.4x%s\n", op, ms?"":":");
+    ot("DbraTrue%s\n", ms?"":":");
     ot("  add r4,r4,#2 ;@ Skip branch offset\n");
     ot("\n");
     Cycles=12;
@@ -352,6 +352,7 @@ int OpBranch(int op)
   int size=0,use=0;
   int offset=0;
   int cc=0;
+  char *asr_r11="";
 
   offset=(char)(op&0xff);
   cc=(op>>8)&15;
@@ -365,33 +366,48 @@ int OpBranch(int op)
 
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
   OpStart(op,size?0x10:0);
-
-  ot(";@ Get Branch offset:\n");
-  if (size) 
-  {
-    EaCalc(0,0,0x3c,size);
-    EaRead(0,0,0x3c,size,0);
-  }
-  else
-    ot("  mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
-
-  // above code messes cycles
   Cycles=10; // Assume branch taken
 
   if (cc==1) ot("  ldr r10,[r7,#0x60] ;@ Get Memory base\n");
 
-  if (cc>=2)
+  switch (cc)
   {
-    ot(";@ Is the condition true?\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
-    ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000\n");
-
-    ot("  b%s DontBranch%.4x\n",Cond[cc^1],op);
-    ot("\n");
+    case 0: // T
+    case 1: // F
+      break;
+    case 2: // hi
+      ot("  tst r9,#0x60000000 ;@ hi: !C && !Z\n");
+      ot("  bne BccDontBranch%i\n\n",8<<size);
+      break;
+    case 3: // ls
+      ot("  tst r9,#0x60000000 ;@ ls: C || Z\n");
+      ot("  beq BccDontBranch%i\n\n",8<<size);
+      break;
+    default:
+      ot(";@ Is the condition true?\n");
+      ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
+      ot("  b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
+      break;
   }
 
-  if (size==0) ot("  mov r0,r0,asr #24 ;@ ...shift down\n\n");
+  if (size) 
+  {
+    if (size<2)
+    {
+      ot("  ldrsh r11,[r4] ;@ Fetch Branch offset\n");
+    }
+    else
+    {
+      ot("  ldrh r2,[r4] ;@ Fetch Branch offset\n");
+      ot("  ldrh r11,[r4,#2]\n");
+      ot("  orr r11,r11,r2,lsl #16\n");
+    }
+  }
+  else
+  {
+    ot("  mov r11,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
+    asr_r11=",asr #24";
+  }
 
   ot(";@ Branch taken - Add on r0 to PC\n");
 
@@ -399,12 +415,11 @@ int OpBranch(int op)
   {
     ot(";@ Bsr - remember old PC\n");
     ot("  sub r1,r4,r10 ;@ r1 = Old PC\n");
+    if (size) ot("  add r1,r1,#%d\n",1<<size);
     ot("  mov r1,r1, lsl #8\n");
+    ot("  ldr r2,[r7,#0x3c]\n");
     ot("  mov r1,r1, asr #8\n");
     ot("\n");
-    if (size) ot("  sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
-    ot("  ldr r2,[r7,#0x3c]\n");
-    ot("  add r4,r4,r0 ;@ r4 = New PC\n");
     ot(";@ Push r1 onto stack\n");
     ot("  sub r0,r2,#4 ;@ Predecrement A7\n");
     ot("  str r0,[r7,#0x3c] ;@ Save A7\n");
@@ -414,33 +429,36 @@ int OpBranch(int op)
     if (offset==0 || offset==-1)
     {
       ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
-      CheckPc(4);
+      ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);
+      CheckPc(0);
     }
+    else
+      ot("  add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);
   }
   else
   {
-    if (size) ot("  sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
     if (offset==0 || offset==-1)
     {
-      ot("  add r0,r4,r0 ;@ r4 = New PC\n");
+      ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);
       ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
       CheckPc(0);
     }
     else
     {
-      ot("  add r4,r4,r0 ;@ r4 = New PC\n");
+      ot("  add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);
       ot("\n");
     }
   }
 
-
   OpEnd(size?0x10:0);
 
-  if (cc>=2)
+  // since all "DontBranch" code is same for every size, output only once
+  if (cc>=2&&(op&0xff00)==0x6200)
   {
-    ot("DontBranch%.4x%s\n", op, ms?"":":");
-    Cycles+=(size==1)?  2 : -2; // Branch not taken
-    OpEnd(size?0x10:0);
+    ot("BccDontBranch%i%s\n", 8<<size, ms?"":":");
+    if (size) ot("  add r4,r4,#%d\n",8<<size);
+    Cycles+=(size==1) ? 2 : -2; // Branch not taken
+    OpEnd(0);
   }
 
   return 0;
diff --git a/cpu/Cyclone/OpLogic.cpp b/cpu/Cyclone/OpLogic.cpp
index 33be8c94..3389a8e5 100644
--- a/cpu/Cyclone/OpLogic.cpp
+++ b/cpu/Cyclone/OpLogic.cpp
@@ -23,7 +23,7 @@ int OpBtstReg(int op)
     if (EaCanWrite(tea)==0) return 1;
   }
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   use&=~0x0e00; // Use same handler for all registers
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
@@ -36,13 +36,9 @@ int OpBtstReg(int op)
     if(size>=2) Cycles+=2;
   }
 
-  EaCalc (10,0x0e00,sea,0,0,0);
-  EaRead (10,    10,sea,0,0x0e00,0,0);
+  EaCalcReadNoSE(-1,10,sea,0,0x0e00);
 
-  EaCalc ( 0,0x003f,tea,size,0,0);
-  if (type>0)
-    ot("  mov r11,r0\n");
-  EaRead ( 0,     0,tea,size,0x003f,0,0);
+  EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);
 
   if (tea>=0x10)
        ot("  and r10,r10,#7  ;@ mem - do mod 8\n");  // size always 0
@@ -89,14 +85,13 @@ int OpBtstImm(int op)
     if (EaCanWrite(tea)==0) return 1;
   }
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,tea);
 
   ot("\n");
-  EaCalc ( 0,0x0000,sea,0,0,0);
-  EaRead ( 0,     0,sea,0,0,0,0);
+  EaCalcReadNoSE(-1,0,sea,0,0);
   ot("  mov r10,#1\n");
   ot("  bic r9,r9,#0x40000000 ;@ Blank Z flag\n");
   if (tea>=0x10)
@@ -112,8 +107,7 @@ int OpBtstImm(int op)
     if(size>=2) Cycles+=2;
   }
 
-  EaCalc (11,0x003f,tea,size,0,0);
-  EaRead (11,     0,tea,size,0x003f,0,0);
+  EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);
   ot("  tst r0,r10 ;@ Do arithmetic\n");
   ot("  orreq r9,r9,#0x40000000 ;@ Get Z flag\n");
   ot("\n");
@@ -146,7 +140,7 @@ int OpNeg(int op)
   if (EaCanRead (ea,size)==0||EaAn(ea)) return 1;
   if (EaCanWrite(ea     )==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea);   Cycles=size<2?4:6;
@@ -162,7 +156,7 @@ int OpNeg(int op)
 
   EaCalc (10,0x003f,ea,size,0,0);
 
-  if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for dummy read?)
+  if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)
   if (type==1) ot("\n");
 
   if (type==0)
@@ -260,7 +254,7 @@ int OpTst(int op)
   // See if we can do this opcode:
   if (EaCanWrite(sea)==0||EaAn(sea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea); Cycles=4;
@@ -288,7 +282,7 @@ int OpExt(int op)
   size=(op>>6)&1;
   shift=32-(8<<size);
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op); Cycles=4;
@@ -328,7 +322,7 @@ int OpSet(int op)
   // See if we can do this opcode:
   if (EaCanWrite(ea)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=8;
@@ -383,7 +377,7 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
   if (usereg)
   {
     ot(";@ Use Dn for count:\n");
-    ot("  and r2,r8,#7<<9\n");
+    ot("  and r2,r8,#0x0e00\n");
     ot("  ldr r2,[r7,r2,lsr #7]\n");
     ot("  and r2,r2,#63\n");
     ot("\n");
@@ -426,12 +420,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     if (usereg) { // store X only if count is not 0
       ot("  cmp %s,#0 ;@ shifting by 0?\n",pct);
       ot("  biceq r9,r9,#0x20000000 ;@ if so, clear carry\n");
-      ot("  movne r1,r9,lsr #28\n");
-      ot("  strneb r1,[r7,#0x45] ;@ else Save X bit\n");
+      ot("  strne r9,[r7,#0x4c] ;@ else Save X bit\n");
     } else {
       // count will never be 0 if we use immediate
-      ot("  mov r1,r9,lsr #28\n");
-      ot("  strb r1,[r7,#0x45] ;@ Save X bit\n");
+      ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
     }
 
     if (type==0 && dir) {
@@ -462,10 +454,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
         ot("  movs r0,r0,rrx\n");
         OpGetFlags(0,1);
       } else {
-        ot("  ldrb r3,[r7,#0x45]\n");
+        ot("  ldr r3,[r7,#0x4c]\n");
         ot("  movs r0,r0,lsl #1\n");
         OpGetFlags(0,1);
-        ot("  tst r3,#2\n");
+        ot("  tst r3,#0x20000000\n");
         ot("  orrne r0,r0,#0x%x\n", 1<<(32-wide));
         ot("  bicne r9,r9,#0x40000000 ;@ clear Z in case it got there\n");
       }
@@ -503,10 +495,10 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
     ot("  orr r0,r3,r0 ;@ r0=Rotated value\n");
 
     ot(";@ Insert X bit into r2-1:\n");
-    ot("  ldrb r3,[r7,#0x45]\n");
+    ot("  ldr r3,[r7,#0x4c]\n");
     ot("  sub r2,r2,#1\n");
-    ot("  and r3,r3,#2\n");
-    ot("  mov r3,r3,lsr #1\n");
+    ot("  and r3,r3,#0x20000000\n");
+    ot("  mov r3,r3,lsr #29\n");
     ot("  orr r0,r0,r3,lsl r2\n");
     ot("\n");
 
@@ -517,15 +509,14 @@ static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
       ot("  bicne r9,r9,#0x40000000 ;@ make sure we didn't mess Z\n");
     }
     if (usereg) { // store X only if count is not 0
-      ot("  mov r2,r9,lsr #28\n");
-      ot("  strb r2,[r7,#0x45] ;@ if not 0, Save X bit\n");
+      ot("  str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");
       ot("  b nozerox%.4x\n",op);
       ot("norotx%.4x%s\n",op,ms?"":":");
-      ot("  ldrb r2,[r7,#0x45]\n");
+      ot("  ldr r2,[r7,#0x4c]\n");
       ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
       OpGetFlags(0,0);
-      ot("  and r2,r2,#2\n");
-      ot("  orr r9,r9,r2,lsl #28 ;@ C = old_X\n");
+      ot("  and r2,r2,#0x20000000\n");
+      ot("  orr r9,r9,r2 ;@ C = old_X\n");
       ot("nozerox%.4x%s\n",op,ms?"":":");
     }
 
@@ -642,7 +633,7 @@ int OpAsrEa(int op)
   if (EaCanRead(ea,0)==0) return 1;
   if (EaCanWrite(ea)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=6; // EmitAsr() will add 2
@@ -668,7 +659,7 @@ int OpTas(int op, int gen_special)
   // See if we can do this opcode:
   if (EaCanWrite(ea)==0 || EaAn(ea)) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   if (!gen_special) OpStart(op,ea);
diff --git a/cpu/Cyclone/OpMove.cpp b/cpu/Cyclone/OpMove.cpp
index 7d317b07..c0e436c6 100644
--- a/cpu/Cyclone/OpMove.cpp
+++ b/cpu/Cyclone/OpMove.cpp
@@ -6,15 +6,15 @@
 // trashes r0,r2
 void OpFlagsToReg(int high)
 {
-  ot("  ldrb r0,[r7,#0x45]  ;@ X bit\n");
+  ot("  ldr r0,[r7,#0x4c]   ;@ X bit\n");
   ot("  mov r1,r9,lsr #28   ;@ ____NZCV\n");
   ot("  eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");
   ot("  tst r2,#1           ;@ 1 if C!=V\n");
   ot("  eorne r1,r1,#3      ;@ ____NZVC\n");
   ot("\n");
   if (high) ot("  ldrb r2,[r7,#0x44]  ;@ Include SR high\n");
-  ot("  and r0,r0,#0x02\n");
-  ot("  orr r1,r1,r0,lsl #3 ;@ ___XNZVC\n");
+  ot("  and r0,r0,#0x20000000\n");
+  ot("  orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");
   if (high) ot("  orr r1,r1,r2,lsl #8\n");
   ot("\n");
 }
@@ -24,10 +24,10 @@ void OpFlagsToReg(int high)
 void OpRegToFlags(int high)
 {
   ot("  eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");
-  ot("  mov r2,r0,lsr #3    ;@ r2=___XN\n");
+  ot("  mov r2,r0,lsl #25\n");
   ot("  tst r1,#1           ;@ 1 if C!=V\n");
   ot("  eorne r0,r0,#3      ;@ ___XNZCV\n");
-  ot("  strb r2,[r7,#0x45]  ;@ Store X bit\n");
+  ot("  str r2,[r7,#0x4c]   ;@ Store X bit\n");
   ot("  mov r9,r0,lsl #28   ;@ r9=NZCV...\n");
 
   if (high)
@@ -45,14 +45,16 @@ void SuperCheck(int op)
 {
   ot("  ldr r11,[r7,#0x44] ;@ Get SR high\n");
   ot("  tst r11,#0x20 ;@ Check we are in supervisor mode\n");
-  ot("  beq WrongMode%.4x ;@ No\n",op);
+  ot("  beq WrongPrivilegeMode ;@ No\n");
   ot("\n");
 }
 
-void SuperEnd(int op)
+void SuperEnd(void)
 {
-  ot("WrongMode%.4x%s\n",op,ms?"":":");
-  ot("  sub r4,r4,#2 ;@ this opcode wasn't executed - go back\n");
+  ot(";@ ----------\n");
+  ot(";@ tried execute privileged instruction in user mode\n");
+  ot("WrongPrivilegeMode%s\n",ms?"":":");
+  ot("  sub r4,r4,#2 ;@ last opcode wasn't executed - go back\n");
   ot("  mov r0,#0x20 ;@ privilege violation\n");
   ot("  bl Exception\n");
   Cycles=34;
@@ -61,20 +63,20 @@ void SuperEnd(int op)
 
 // does OSP and A7 swapping if needed
 // new or old SR (not the one already in [r7,#0x44]) should be passed in r11
-// trashes r1,r11
-void SuperChange(int op)
+// trashes r0,r11
+void SuperChange(int op,int load_srh)
 {
   ot(";@ A7 <-> OSP?\n");
-  ot("  ldr r1,[r7,#0x44] ;@ Get other SR high\n");
-  ot("  and r11,r11,#0x20\n");
-  ot("  and r1,r1,#0x20\n");
-  ot("  teq r11,r1 ;@ r11 xor r1\n");
+  if (load_srh)
+    ot("  ldr r0,[r7,#0x44] ;@ Get other SR high\n");
+  ot("  eor r0,r0,r11\n");
+  ot("  tst r0,#0x20\n");
   ot("  beq no_sp_swap%.4x\n",op);
   ot(" ;@ swap OSP and A7:\n");
   ot("  ldr r11,[r7,#0x3C] ;@ Get A7\n");
-  ot("  ldr r1, [r7,#0x48] ;@ Get OSP\n");
+  ot("  ldr r0, [r7,#0x48] ;@ Get OSP\n");
   ot("  str r11,[r7,#0x48]\n");
-  ot("  str r1, [r7,#0x3C]\n");
+  ot("  str r0, [r7,#0x3C]\n");
   ot("no_sp_swap%.4x%s\n", op, ms?"":":");
 }
 
@@ -110,19 +112,19 @@ int OpMove(int op)
   if (EaCanRead (sea,size)==0) return 1;
   if (EaCanWrite(tea     )==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (tea<0x38) use&=~0x0e00; // Use same handler for register ?0-7
   
-  if (tea>=0x18 && tea<0x28 && (tea&7)==7) use|=0x0e00; // Specific handler for (a7)+ and -(a7)
+  if (tea==0x1f || tea==0x27) use|=0x0e00; // Specific handler for (a7)+ and -(a7)
 
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,tea); Cycles=4;
 
-  EaCalc(0,0x003f,sea,size);
-  EaRead(0,     1,sea,size,0x003f);
+  EaCalcRead(-1,1,sea,size,0x003f);
 
-  if (movea==0) {
+  if (movea==0)
+  {
     ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
     ot("  mrs r9,cpsr ;@ r9=NZCV flags\n");
     ot("\n");
@@ -130,19 +132,19 @@ int OpMove(int op)
 
   if (movea) size=2; // movea always expands to 32-bits
 
-  EaCalc (0,0x0e00,tea,size,0,0);
 #if SPLIT_MOVEL_PD
+  EaCalc (10,0x1e00,tea,size,0,0);
   if ((tea&0x38)==0x20 && size==2) { // -(An)
-    ot("  mov r10,r0\n");
     ot("  mov r11,r1\n");
-    ot("  add r0,r0,#2\n");
-    EaWrite(0,     1,tea,1,0x0e00,0,0);
-    EaWrite(10,   11,tea,1,0x0e00,1);
+    ot("  add r0,r10,#2\n");
+    EaWrite(0,     1,tea,1,0x1e00,0,0);
+    EaWrite(10,   11,tea,1,0x1e00,1);
   } else {
-    EaWrite(0,     1,tea,size,0x0e00,0,0);
+    EaWrite(0,     1,tea,size,0x1e00,0,0);
   }
 #else
-  EaWrite(0,     1,tea,size,0x0e00,0,0);
+  EaCalc (0,0x1e00,tea,size,0,0);
+  EaWrite(0,     1,tea,size,0x1e00,0,0);
 #endif
 
 #if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES
@@ -169,15 +171,15 @@ int OpLea(int op)
 
   if (EaCanRead(sea,-1)==0) return 1; // See if we can do this opcode
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   use&=~0x0e00; // Also use 1 handler for target ?0-7
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,sea,tea);
 
   EaCalc (1,0x003f,sea,0); // Lea
-  EaCalc (0,0x0e00,tea,2,1);
-  EaWrite(0,     1,tea,2,0x0e00,1);
+  EaCalc (0,0x1e00,tea,2);
+  EaWrite(0,     1,tea,2,0x1e00);
 
   Cycles=Ea_add_ns(g_lea_cycle_table,sea);
 
@@ -212,7 +214,7 @@ int OpMoveSr(int op)
       break;
   }
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea);
@@ -230,19 +232,16 @@ int OpMoveSr(int op)
 
   if (type==2 || type==3)
   {
-    EaCalc(0,0x003f,ea,size,0,0);
-    EaRead(0,     0,ea,size,0x003f,0,0);
+    EaCalcReadNoSE(-1,0,ea,size,0x003f);
     OpRegToFlags(type==3);
     if (type==3) {
-      SuperChange(op);
+      SuperChange(op,0);
       CheckInterrupt(op);
     }
   }
 
   OpEnd(ea);
 
-  if (type==3) SuperEnd(op);
-
   return 0;
 }
 
@@ -257,7 +256,7 @@ int OpArithSr(int op)
   size=(op>>6)&1; // ccr or sr?
   ea=0x3c;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea); Cycles=16;
@@ -273,12 +272,11 @@ int OpArithSr(int op)
   if (type==5) ot("  eor r0,r1,r10\n");
   OpRegToFlags(size);
   if (size) {
-    SuperChange(op);
+    SuperChange(op,0);
     CheckInterrupt(op);
   }
 
   OpEnd(ea);
-  if (size) SuperEnd(op);
 
   return 0;
 }
@@ -293,7 +291,7 @@ int OpPea(int op)
   ea=op&0x003f; if (ea<0x10) return 1; // Swap opcode
   if (EaCanRead(ea,-1)==0) return 1; // See if we can do this opcode:
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea);
@@ -336,7 +334,7 @@ int OpMovem(int op)
 
   cea=ea; if (change) cea=0x10;
 
-  use=OpBase(op);
+  use=OpBase(op,size);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
   OpStart(op,ea);
@@ -430,20 +428,18 @@ int OpMoveUsp(int op)
   if (dir)
   {
     ot("  ldr r1,[r7,#0x48] ;@ Get from USP\n\n");
-    EaCalc (0,0x0007,8,2,1);
-    EaWrite(0,     1,8,2,0x0007,1);
+    EaCalc (0,0x000f,8,2,1);
+    EaWrite(0,     1,8,2,0x000f,1);
   }
   else
   {
-    EaCalc (0,0x0007,8,2,1);
-    EaRead (0,     0,8,2,0x0007,1);
+    EaCalc (0,0x000f,8,2,1);
+    EaRead (0,     0,8,2,0x000f,1);
     ot("  str r0,[r7,#0x48] ;@ Put in USP\n\n");
   }
     
   OpEnd();
 
-  SuperEnd(op);
-
   return 0;
 }
 
@@ -509,14 +505,15 @@ int OpExg(int op)
 // 0000sss1 1z001ddd (to mem)
 int OpMovep(int op)
 {
-  int ea=0;
-  int size=1,use=0,dir;
+  int ea=0,rea=0;
+  int size=1,use=0,dir,aadd=0;
 
   use=op&0xf1f8;
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler (for all dests, srcs)
 
   // Get EA
   ea = (op&0x0007)|0x28;
+  rea=  op&0x0e00;
   dir = (op>>7)&1;
 
   // Find size extension
@@ -525,41 +522,43 @@ int OpMovep(int op)
   OpStart(op,ea);
   
   if(dir) { // reg to mem
-    EaCalc(11,0x0e00,0,size);      // reg number -> r11
-    EaRead(11,11,0,size,0x0e00);   // regval -> r11
-    EaCalc(10,0x0007,ea,size);
+    EaCalcReadNoSE(-1,11,rea,size,0x1e00);
+
+    EaCalc(10,0x000f,ea,size);
     if(size==2) { // if operand is long
       ot("  mov r1,r11,lsr #24 ;@ first byte\n");
-      EaWrite(10,1,ea,0,0x0007); // store first byte
-      ot("  add r10,r10,#2\n");
+      EaWrite(10,1,ea,0,0x000f); // store first byte
+      ot("  add r0,r10,#%i\n",(aadd+=2));
       ot("  mov r1,r11,lsr #16 ;@ second byte\n");
-      EaWrite(10,1,ea,0,0x0007); // store second byte
-      ot("  add r10,r10,#2\n");
+      EaWrite(0,1,ea,0,0x000f); // store second byte
+      ot("  add r0,r10,#%i\n",(aadd+=2));
+    } else {
+      ot("  mov r0,r10\n");
     }
     ot("  mov r1,r11,lsr #8 ;@ first or third byte\n");
-    EaWrite(10,1,ea,0,0x0007);
-    ot("  add r10,r10,#2\n");
+    EaWrite(0,1,ea,0,0x000f);
+    ot("  add r0,r10,#%i\n",(aadd+=2));
     ot("  and r1,r11,#0xff\n");
-    EaWrite(10,1,ea,0,0x0007);
+    EaWrite(0,1,ea,0,0x000f);
   } else { // mem to reg
-    EaCalc(10,0x0007,ea,size,1);
-    EaRead(10,11,ea,0,0x0007,1); // read first byte
-    ot("  add r10,r10,#2\n");
-    EaRead(10,1,ea,0,0x0007,1); // read second byte
+    EaCalc(10,0x000f,ea,size,1);
+    EaRead(10,11,ea,0,0x000f,1); // read first byte
+    ot("  add r0,r10,#2\n");
+    EaRead(0,1,ea,0,0x000f,1); // read second byte
     if(size==2) { // if operand is long
       ot("  orr r11,r11,r1,lsr #8 ;@ second byte\n");
-      ot("  add r10,r10,#2\n");
-      EaRead(10,1,ea,0,0x0007,1);
+      ot("  add r0,r10,#4\n");
+      EaRead(0,1,ea,0,0x000f,1);
       ot("  orr r11,r11,r1,lsr #16 ;@ third byte\n");
-      ot("  add r10,r10,#2\n");
-      EaRead(10,1,ea,0,0x0007,1);
-      ot("  orr r0,r11,r1,lsr #24 ;@ fourth byte\n");
+      ot("  add r0,r10,#6\n");
+      EaRead(0,1,ea,0,0x000f,1);
+      ot("  orr r1,r11,r1,lsr #24 ;@ fourth byte\n");
     } else {
-      ot("  orr r0,r11,r1,lsr #8 ;@ second byte\n");
+      ot("  orr r1,r11,r1,lsr #8 ;@ second byte\n");
     }
     // store the result
-    EaCalc(11,0x0e00,0,size,1);      // reg number -> r11
-    EaWrite(11,0,0,size,0x0e00,1);
+    EaCalc(11,0x0e00,rea,size,1);      // reg number -> r11
+    EaWrite(11,1,rea,size,0x0e00,1);
   }
 
   Cycles=(size==2)?24:16;
@@ -571,7 +570,7 @@ int OpMovep(int op)
 // Emit a Stop/Reset opcodes, 01001110 011100t0 imm
 int OpStopReset(int op)
 {
-  int type=(op>>1)&1; // reset/stop
+  int type=(op>>1)&1; // stop/reset
 
   OpStart(op);
 
@@ -580,8 +579,8 @@ int OpStopReset(int op)
   if(type) {
     // copy immediate to SR, stop the CPU and eat all remaining cycles.
     ot("  ldrh r0,[r4],#2 ;@ Fetch the immediate\n");
-    SuperChange(op);
     OpRegToFlags(1);
+    SuperChange(op,0);
 
     ot("\n");
 
@@ -604,16 +603,16 @@ int OpStopReset(int op)
     ot("  ldr r11,[r7,#0x90] ;@ ResetCallback\n");
     ot("  tst r11,r11\n");
     ot("  movne lr,pc\n");
-    ot("  movne pc,r11 ;@ call ResetCallback if it is defined\n");
+    ot("  bxne r11 ;@ call ResetCallback if it is defined\n");
     ot("  ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
     ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
     ot("  ldr r4,[r7,#0x40] ;@ Load PC\n");
     ot("  mov r9,r9,lsl #28\n");
+    ot("\n");
 #endif
   }
 
   OpEnd();
-  SuperEnd(op);
 
   return 0;
 }
diff --git a/cpu/Cyclone/app.h b/cpu/Cyclone/app.h
index 1796e9c8..f61432f9 100644
--- a/cpu/Cyclone/app.h
+++ b/cpu/Cyclone/app.h
@@ -18,6 +18,8 @@ extern int g_movem_cycle_table[];
 int Ea_add_ns(int *tab, int ea); // add nonstandard EA cycles
 int EaCalc(int a,int mask,int ea,int size,int top=0,int sign_extend=1); // 6
 int EaRead(int a,int v,int ea,int size,int mask,int top=0,int sign_extend=1); // 7
+int EaCalcRead(int r_ea,int r,int ea,int size,int mask,int sign_extend=1); // 6
+int EaCalcReadNoSE(int r_ea,int r,int ea,int size,int mask);
 int EaCanRead(int ea,int size);
 int EaWrite(int a,int v,int ea,int size,int mask,int top=0,int sign_extend_ea=1);
 int EaCanWrite(int ea);
@@ -37,11 +39,12 @@ int MemHandler(int type,int size,int addrreg=0);
 void FlushPC(void);
 
 // OpAny.cpp
+extern int g_op;
 int OpGetFlags(int subtract,int xbit,int sprecialz=0);
 void OpUse(int op,int use);
 void OpStart(int op,int sea=0,int tea=0);
 void OpEnd(int sea=0,int tea=0);
-int OpBase(int op,int sepa=0);
+int OpBase(int op,int size,int sepa=0);
 void OpAny(int op);
 
 //----------------------
@@ -95,8 +98,9 @@ int OpMovem(int op);
 int OpMoveq(int op);
 int OpMoveUsp(int op);
 int OpExg(int op);
-int OpMovep(int op); // notaz
+int OpMovep(int op);
 int OpStopReset(int op);
 void SuperCheck(int op);
-void SuperEnd(int op);
-void SuperChange(int op);
+void SuperEnd(void);
+void SuperChange(int op,int load_srh=1);
+