From: notaz Date: Wed, 1 Jun 2022 21:25:32 +0000 (+0300) Subject: drc: update some logging and patches X-Git-Tag: r24l~465 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a6905f16cb038fd1850efacf72507ed57bb39cf6;p=pcsx_rearmed.git drc: update some logging and patches --- diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index ce3a1275..e221a795 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -88,7 +88,8 @@ static void irq_test(void) void gen_interupt() { - evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt); + evprintf(" +ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle, + next_interupt, next_interupt - psxRegs.cycle); irq_test(); //psxBranchTest(); @@ -648,7 +649,8 @@ void do_insn_cmp(void) //if (psxRegs.cycle == 166172) breakme(); if (which_event >= 0 && event_cycles[which_event] != ev_cycles) { - printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles); + printf("bad ev_cycles #%d: %u %u / %u\n", which_event, + event_cycles[which_event], ev_cycles, psxRegs.cycle); fatal = 1; } diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 45c3bff7..b160a4a0 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -2074,7 +2074,7 @@ static void cop0_alloc(struct regstat *current,int i) } else { - // TLBR/TLBWI/TLBWR/TLBP/ERET + // RFE assert(dops[i].opcode2==0x10); alloc_all(current,i); } @@ -5324,7 +5324,7 @@ static void rjump_assemble(int i, const struct regstat *i_regs) //assert(adj==0); emit_addimm_and_set_flags(ccadj[i] + CLOCK_ADJUST(2), HOST_CCREG); add_stub(CC_STUB,out,NULL,0,i,-1,TAKEN,rs); - if(dops[i+1].itype==COP0&&(source[i+1]&0x3f)==0x10) + if(dops[i+1].itype==COP0 && dops[i+1].opcode2==0x10) // special case for RFE emit_jmp(0); else @@ -7026,9 +7026,9 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r) // SYSCALL instruction (software interrupt) u=1; } - else if(dops[i].itype==COP0 && (source[i]&0x3f)==0x18) + else if(dops[i].itype==COP0 && dops[i].opcode2==0x10) { - // ERET instruction (return from interrupt) + // RFE u=1; } //u=1; // DEBUG @@ -8771,7 +8771,7 @@ static noinline void pass10_expire_blocks(void) u_int phase = (expirep >> (base_shift - 1)) & 1u; if (!(expirep & (MAX_OUTPUT_BLOCK_SIZE / 2 - 1))) { inv_debug("EXP: base_offs %x/%x phase %u\n", base_offs, - out - ndrc->translation_cache phase); + out - ndrc->translation_cache, phase); } if (!phase) { diff --git a/libpcsxcore/new_dynarec/patches/trace_drc_chk b/libpcsxcore/new_dynarec/patches/trace_drc_chk index e98a48e7..414c2215 100644 --- a/libpcsxcore/new_dynarec/patches/trace_drc_chk +++ b/libpcsxcore/new_dynarec/patches/trace_drc_chk @@ -1,8 +1,8 @@ diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c -index f1005db..ebd1d4f 100644 +index b160a4a..0d91999 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c -@@ -235,7 +235,7 @@ static struct decoded_insn +@@ -285,7 +285,7 @@ static struct decoded_insn int new_dynarec_hacks_old; int new_dynarec_did_compile; @@ -11,25 +11,25 @@ index f1005db..ebd1d4f 100644 extern int cycle_count; // ... until end of the timeslice, counts -N -> 0 extern int last_count; // last absolute target, often = next_interupt -@@ -471,6 +471,7 @@ int cycle_multiplier_old; +@@ -532,6 +532,7 @@ static int cycle_multiplier_active; static int CLOCK_ADJUST(int x) { + return x * 2; - int m = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT - ? cycle_multiplier_override : cycle_multiplier; - int s=(x>>31)|1; -@@ -522,6 +523,9 @@ static int doesnt_expire_soon(void *tcaddr) + int m = cycle_multiplier_active; + int s = (x >> 31) | 1; + return (x * m + s * 50) / 100; +@@ -662,6 +663,9 @@ static void *try_restore_block(u_int vaddr, u_int start_page, u_int end_page) // This is called from the recompiled JR/JALR instructions - void noinline *get_addr(u_int vaddr) + static void noinline *get_addr(u_int vaddr, int can_compile) { +#ifdef DRC_DBG +printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc); +#endif - u_int page=get_page(vaddr); - u_int vpage=get_vpage(vaddr); - struct ll_entry *head; -@@ -6248,7 +6252,7 @@ void unneeded_registers(int istart,int iend,int r) + u_int start_page = get_page_prev(vaddr); + u_int i, page, end_page = get_page(vaddr); + void *found_clean = NULL; +@@ -7046,7 +7050,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r) // R0 is always unneeded u|=1; // Save it @@ -38,24 +38,16 @@ index f1005db..ebd1d4f 100644 gte_unneeded[i]=gte_u; /* printf("ur (%d,%d) %x: ",istart,iend,start+i*4); -@@ -8794,6 +8798,7 @@ int new_recompile_block(u_int addr) - - // This allocates registers (if possible) one instruction prior - // to use, which can avoid a load-use penalty on certain CPUs. -+#if 0 +@@ -8236,6 +8240,7 @@ static noinline void pass5a_preallocate1(void) + static noinline void pass5b_preallocate2(void) + { + int i, hr; ++ return; for(i=0;i> 26; switch (tmp) { -@@ -499,13 +501,15 @@ static void doBranch(u32 tar) { +@@ -500,13 +502,15 @@ static void doBranch(u32 tar) { } break; } @@ -163,7 +163,7 @@ index f7898e9..1f125ed 100644 } /********************************************************* -@@ -615,12 +619,13 @@ void psxMULTU_stall() { +@@ -616,12 +620,13 @@ void psxMULTU_stall() { psxMULTU(); } @@ -179,7 +179,7 @@ index f7898e9..1f125ed 100644 void psxBGEZ() { RepZBranchi32(>=) } // Branch if Rs >= 0 void psxBGEZAL() { RepZBranchLinki32(>=) } // Branch if Rs >= 0 and link -@@ -702,7 +707,7 @@ void psxRFE() { +@@ -703,7 +708,7 @@ void psxRFE() { * Register branch logic * * Format: OP rs, rt, offset * *********************************************************/ @@ -188,15 +188,16 @@ index f7898e9..1f125ed 100644 void psxBEQ() { RepBranchi32(==) } // Branch if Rs == Rt void psxBNE() { RepBranchi32(!=) } // Branch if Rs != Rt -@@ -886,6 +891,7 @@ void MTC0(int reg, u32 val) { - case 12: // Status - psxRegs.CP0.r[12] = val; - psxTestSWInts(); -+ //psxBranchTest(); - break; +@@ -901,7 +907,7 @@ void MTC0(int reg, u32 val) { + } + } - case 13: // Cause -@@ -1027,6 +1033,23 @@ void intExecuteBlock() { +-void psxMTC0() { MTC0(_Rd_, _u32(_rRt_)); } ++void psxMTC0() { MTC0(_Rd_, _u32(_rRt_)); psxBranchTest(); } + void psxCTC0() { MTC0(_Rd_, _u32(_rRt_)); } + + /********************************************************* +@@ -1028,6 +1034,23 @@ void intExecuteBlock() { while (!branch2) execI(); } @@ -220,7 +221,7 @@ index f7898e9..1f125ed 100644 static void intClear(u32 Addr, u32 Size) { } -@@ -1049,7 +1072,7 @@ void intApplyConfig() { +@@ -1050,7 +1073,7 @@ void intApplyConfig() { assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall); assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall); @@ -229,7 +230,7 @@ index f7898e9..1f125ed 100644 psxBSC[18] = psxCOP2; psxBSC[50] = gteLWC2; psxBSC[58] = gteSWC2; -@@ -1091,9 +1114,10 @@ void execI() { +@@ -1092,9 +1115,10 @@ void execI() { if (Config.Debug) ProcessDebug(); psxRegs.pc += 4; @@ -242,10 +243,10 @@ index f7898e9..1f125ed 100644 R3000Acpu psxInt = { diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c -index 04aeec2..710a379 100644 +index 46cee0c..c814587 100644 --- a/libpcsxcore/psxmem.c +++ b/libpcsxcore/psxmem.c -@@ -217,11 +217,13 @@ void psxMemShutdown() { +@@ -218,11 +218,13 @@ void psxMemShutdown() { } static int writeok = 1; @@ -259,7 +260,7 @@ index 04aeec2..710a379 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -247,6 +249,7 @@ u16 psxMemRead16(u32 mem) { +@@ -248,6 +250,7 @@ u16 psxMemRead16(u32 mem) { char *p; u32 t; @@ -267,7 +268,7 @@ index 04aeec2..710a379 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -272,6 +275,7 @@ u32 psxMemRead32(u32 mem) { +@@ -273,6 +276,7 @@ u32 psxMemRead32(u32 mem) { char *p; u32 t; @@ -275,7 +276,7 @@ index 04aeec2..710a379 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -297,6 +301,7 @@ void psxMemWrite8(u32 mem, u8 value) { +@@ -298,6 +302,7 @@ void psxMemWrite8(u32 mem, u8 value) { char *p; u32 t; @@ -283,7 +284,7 @@ index 04aeec2..710a379 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -324,6 +329,7 @@ void psxMemWrite16(u32 mem, u16 value) { +@@ -325,6 +330,7 @@ void psxMemWrite16(u32 mem, u16 value) { char *p; u32 t; @@ -291,7 +292,7 @@ index 04aeec2..710a379 100644 t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { if ((mem & 0xffff) < 0x400) -@@ -351,6 +357,7 @@ void psxMemWrite32(u32 mem, u32 value) { +@@ -352,6 +358,7 @@ void psxMemWrite32(u32 mem, u32 value) { char *p; u32 t; @@ -299,7 +300,7 @@ index 04aeec2..710a379 100644 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n"); t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { -@@ -380,6 +387,8 @@ void psxMemWrite32(u32 mem, u32 value) { +@@ -381,6 +388,8 @@ void psxMemWrite32(u32 mem, u32 value) { } else { int i;