From: notaz Date: Sat, 14 Jan 2012 15:50:23 +0000 (+0200) Subject: drc: allow translation cache in data segment X-Git-Tag: r14~31 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bdeade4633d41d76e0c22b3810241bbf7cb5a8a3;p=pcsx_rearmed.git drc: allow translation cache in data segment useful for Android --- diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 3950d224..0b7cee82 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -29,6 +29,10 @@ #include "pcnt.h" #endif +#ifndef BASE_ADDR_FIXED +char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096))); +#endif + extern int cycle_count; extern int last_count; extern int pcaddr; @@ -5680,7 +5684,7 @@ void do_clear_cache() for(j=0;j<32;j++) { if(bitmap&(1<BASE_ADDR+(1<(u_int)BASE_ADDR+(1<>12;i<=(start+slen*4)>>12;i++) { @@ -11571,11 +11579,11 @@ int new_recompile_block(int addr) /* Pass 10 - Free memory by expiring oldest blocks */ - int end=((((int)out-BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535; + int end=((((int)out-(int)BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535; while(expirep!=end) { int shift=TARGET_SIZE_2-3; // Divide into 8 blocks - int base=BASE_ADDR+((expirep>>13)<>13)<>11)&3) {