From: notaz Date: Sat, 7 Sep 2013 23:54:02 +0000 (+0300) Subject: dbra tracking and branch improvements X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c6237d9e43c8a8854155757b80b77161a9570535;p=cyclone68000.git dbra tracking and branch improvements --- diff --git a/Cyclone.h b/Cyclone.h index c2c27d8..1933a46 100644 --- a/Cyclone.h +++ b/Cyclone.h @@ -25,7 +25,7 @@ struct Cyclone unsigned int a[8]; // [r7,#0x20] unsigned int pc; // [r7,#0x40] Memory Base (.membase) + 68k PC unsigned char srh; // [r7,#0x44] Status Register high (T_S__III) - unsigned char unused; // [r7,#0x45] Unused + unsigned char not_pol;// [r7,#0x45] not polling unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC] unsigned char irq; // [r7,#0x47] IRQ level unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP) diff --git a/Main.cpp b/Main.cpp index 1637047..9ef8a2b 100644 --- a/Main.cpp +++ b/Main.cpp @@ -25,8 +25,8 @@ int arm_op_count; // opcodes often used by games static const unsigned short hot_opcodes[] = { - 0x6701, // beq $3 - 0x6601, // bne $3 + 0x6702, // beq $3 + 0x6602, // bne $3 0x51c8, // dbra Dn, $2 0x4a38, // tst.b $0.w 0xd040, // add.w Dn, Dn @@ -34,7 +34,7 @@ static const unsigned short hot_opcodes[] = { 0x0240, // andi.w #$0, D0 0x2038, // move.l $0.w, D0 0xb0b8, // cmp.l $0.w, D0 - 0x6001, // bra $3 + 0x6002, // bra $3 0x30c0, // move.w D0, (A0)+ 0x3028, // move.w ($0,A0), D0 0x0c40, // cmpi.w #$0, D0 @@ -52,7 +52,7 @@ static const unsigned short hot_opcodes[] = { 0xb038, // cmp.b $0.w, D0 0x3039, // move.w $0.l, D0 0x4840, // swap D0 - 0x6101, // bsr $3 + 0x6102, // bsr $3 0x6100, // bsr $2 0x5e40, // addq.w #7, D0 0x1039, // move.b $0.l, D0 @@ -64,10 +64,10 @@ static const unsigned short hot_opcodes[] = { 0xc040, // and.w D0, D0 0x3180, // move.w D0, (A0,D0.w) 0x1198, // move.b (A0)+, (A0,D0.w) - 0x6501, // bcs $3 + 0x6502, // bcs $3 0x6500, // bcs $2 - 0x6401, // bcc $3 - 0x6a01, // bpl $3 + 0x6402, // bcc $3 + 0x6a02, // bpl $3 0x41f0, // lea (A0,D0.w), A0 0x4a28, // tst.b ($0,A0) 0x0828, // btst #$0, ($0,A0) @@ -1267,9 +1267,9 @@ static int CycloneMake() ot(" %s CycloneDoTrace\n",globl); ot(" %s CycloneJumpTab\n",globl); ot(" %s Op____\n",globl); - ot(" %s Op6001\n",globl); - ot(" %s Op6601\n",globl); - ot(" %s Op6701\n",globl); + ot(" %s Op6002\n",globl); + ot(" %s Op6602\n",globl); + ot(" %s Op6702\n",globl); #endif ot("\n"); ot(ms?"CycloneVer dcd 0x":"CycloneVer: .long 0x"); diff --git a/OpBranch.cpp b/OpBranch.cpp index c37620a..fb4f561 100644 --- a/OpBranch.cpp +++ b/OpBranch.cpp @@ -348,6 +348,7 @@ int OpDbra(int op) ot(" and r1,r8,#0x0007\n"); ot(" mov r1,r1,lsl #2\n"); ot(" ldrsh r0,[r7,r1]\n"); + ot(" strb r8,[r7,#0x45] ;@ not polling\n"); ot(" sub r0,r0,#1\n"); ot(" strh r0,[r7,r1]\n"); ot("\n"); @@ -418,6 +419,7 @@ int OpBranch(int op) int offset=0; int cc=0; const char *asr_r11=""; + int pc_reg=0; offset=(char)(op&0xff); cc=(op>>8)&15; @@ -428,7 +430,7 @@ int OpBranch(int op) if (size==2) size=0; // 000 model does not support long displacement if (size) use=op; // 16-bit or 32-bit - else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches + else use=(op&0xff01)+2; // Use same opcode for all 8-bit branches if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,size?0x10:0); @@ -491,8 +493,6 @@ int OpBranch(int op) Cycles=18; // always 18 } - ot(" add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11); - #if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8 if (offset!=0 && offset!=-1) checkpc=1; #endif @@ -502,20 +502,48 @@ int OpBranch(int op) #if USE_CHECKPC_CALLBACK if (offset==-1) checkpc=1; #endif - if (checkpc) CheckPc(); + if (checkpc) + { + ot(" add r0,r4,r11%s ;@ New PC\n",asr_r11); + CheckPc(); + pc_reg=0; + } + else + { + ot(" add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11); + pc_reg=4; + } + + if ((op & 1) || size != 0) + { #if EMULATE_ADDRESS_ERRORS_JUMP - ot(" mov r4,r0\n"); - ot(" tst r4,#1 ;@ address error?\n"); - ot(" bne ExceptionAddressError_r_prg_r4\n"); + if (pc_reg!=4) + { + ot(" mov r4,r%d\n",pc_reg); + pc_reg=4; + } + if (size) + { + ot(" tst r4,#1 ;@ address error?\n"); + ot(" bne ExceptionAddressError_r_prg_r4\n"); + } + else + { + ot(" b ExceptionAddressError_r_prg_r4\n"); + } #else - ot(" bic r4,r0,#1\n"); + ot(" bic r4,r%d,#1\n",pc_reg); + pc_reg=4; #endif + } + if (pc_reg!=4) + ot(" mov r4,r%d\n",pc_reg); ot("\n"); OpEnd(size?0x10:0); // since all "DontBranch" code is same for every size, output only once - if (cc>=2&&(op&0xff00)==0x6700) + if (cc>=2&&(op&0xff01)==0x6700) { ot("BccDontBranch%i%s\n", 8<