From: notaz <notasas@gmail.com>
Date: Wed, 21 Nov 2012 01:51:26 +0000 (+0200)
Subject: gte: avoid fno-strict-aliasing
X-Git-Tag: r17~8
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=eac3852265815a2e57ea9987a2bea2fcadd3f022;p=pcsx_rearmed.git

gte: avoid fno-strict-aliasing
---

diff --git a/Makefile b/Makefile
index a2a811f7..548d8a05 100644
--- a/Makefile
+++ b/Makefile
@@ -46,7 +46,6 @@ endif
 ifeq "$(HAVE_NEON)" "1"
 OBJS += libpcsxcore/gte_neon.o
 endif
-libpcsxcore/gte.o libpcsxcore/gte_nf.o: CFLAGS += -fno-strict-aliasing
 libpcsxcore/psxbios.o: CFLAGS += -Wno-nonnull
 
 # dynarec
diff --git a/libpcsxcore/gte.c b/libpcsxcore/gte.c
index dc56b7f2..62fc7f38 100644
--- a/libpcsxcore/gte.c
+++ b/libpcsxcore/gte.c
@@ -26,11 +26,6 @@
 #include "gte.h"
 #include "psxmem.h"
 
-typedef struct psxCP2Regs {
-	psxCP2Data CP2D; 	/* Cop2 data registers */
-	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
-} psxCP2Regs;
-
 #define VX(n) (n < 3 ? regs->CP2D.p[n << 1].sw.l : regs->CP2D.p[9].sw.l)
 #define VY(n) (n < 3 ? regs->CP2D.p[n << 1].sw.h : regs->CP2D.p[10].sw.l)
 #define VZ(n) (n < 3 ? regs->CP2D.p[(n << 1) + 1].sw.l : regs->CP2D.p[11].sw.l)
@@ -264,7 +259,7 @@ static inline u32 limE_(psxCP2Regs *regs, u32 result) {
 #ifndef FLAGLESS
 
 static inline u32 MFC2(int reg) {
-	psxCP2Regs *regs = (psxCP2Regs *)&psxRegs.CP2D;
+	psxCP2Regs *regs = &psxRegs.CP2;
 	switch (reg) {
 		case 1:
 		case 3:
@@ -299,7 +294,7 @@ static inline u32 MFC2(int reg) {
 }
 
 static inline void MTC2(u32 value, int reg) {
-	psxCP2Regs *regs = (psxCP2Regs *)&psxRegs.CP2D;
+	psxCP2Regs *regs = &psxRegs.CP2;
 	switch (reg) {
 		case 15:
 			gteSXY0 = gteSXY1;
diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index 76f42bcb..13aaa595 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -163,11 +163,21 @@ enum {
 	PSXINT_COUNT
 };
 
+typedef struct psxCP2Regs {
+	psxCP2Data CP2D; 	/* Cop2 data registers */
+	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+} psxCP2Regs;
+
 typedef struct {
 	psxGPRRegs GPR;		/* General Purpose Registers */
 	psxCP0Regs CP0;		/* Coprocessor0 Registers */
-	psxCP2Data CP2D; 	/* Cop2 data registers */
-	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+	union {
+		struct {
+			psxCP2Data CP2D; 	/* Cop2 data registers */
+			psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+		};
+		psxCP2Regs CP2;
+	};
     u32 pc;				/* Program counter */
     u32 code;			/* The instruction */
 	u32 cycle;