From: notaz Date: Mon, 10 Feb 2025 22:43:16 +0000 (+0200) Subject: avoid some left shifting to sign bit X-Git-Tag: r25~21 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f707f14b867b499195a858cbedd80de88c761b5d;p=pcsx_rearmed.git avoid some left shifting to sign bit doesn't patch out left shifting negative values as that seems to be properly handled by gcc/clang/msvc (even while the standard makes it undefined), and patching it would uglify the code too much --- diff --git a/libpcsxcore/gte.c b/libpcsxcore/gte.c index bdc8fa52..dde3df87 100644 --- a/libpcsxcore/gte.c +++ b/libpcsxcore/gte.c @@ -199,7 +199,7 @@ static inline s32 LIM_(psxCP2Regs *regs, s32 value, s32 max, s32 min, u32 flag) static inline u32 limE_(psxCP2Regs *regs, u32 result) { if (result > 0x1ffff) { - gteFLAG |= (1 << 31) | (1 << 17); + gteFLAG |= (1u << 31) | (1u << 17); return 0x1ffff; } return result; @@ -233,21 +233,21 @@ static inline u32 limE_(psxCP2Regs *regs, u32 result) { #define limE(result) \ limE_(regs,result) -#define A1(a) BOUNDS((a), 0x7fffffff, (1 << 30), -(s64)0x80000000, (1 << 31) | (1 << 27)) -#define A2(a) BOUNDS((a), 0x7fffffff, (1 << 29), -(s64)0x80000000, (1 << 31) | (1 << 26)) -#define A3(a) BOUNDS((a), 0x7fffffff, (1 << 28), -(s64)0x80000000, (1 << 31) | (1 << 25)) -#define limB1(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 31) | (1 << 24)) -#define limB2(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 31) | (1 << 23)) -#define limB3(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 22)) -#define limC1(a) LIM((a), 0x00ff, 0x0000, (1 << 21)) -#define limC2(a) LIM((a), 0x00ff, 0x0000, (1 << 20)) -#define limC3(a) LIM((a), 0x00ff, 0x0000, (1 << 19)) -#define limD(a) LIM((a), 0xffff, 0x0000, (1 << 31) | (1 << 18)) - -#define F(a) BOUNDS((a), 0x7fffffff, (1 << 31) | (1 << 16), -(s64)0x80000000, (1 << 31) | (1 << 15)) -#define limG1(a) LIM((a), 0x3ff, -0x400, (1 << 31) | (1 << 14)) -#define limG2(a) LIM((a), 0x3ff, -0x400, (1 << 31) | (1 << 13)) -#define limH(a) LIM((a), 0x1000, 0x0000, (1 << 12)) +#define A1(a) BOUNDS((a), 0x7fffffff, (1u << 30), -(s64)0x80000000, (1u << 31) | (1u << 27)) +#define A2(a) BOUNDS((a), 0x7fffffff, (1u << 29), -(s64)0x80000000, (1u << 31) | (1u << 26)) +#define A3(a) BOUNDS((a), 0x7fffffff, (1u << 28), -(s64)0x80000000, (1u << 31) | (1u << 25)) +#define limB1(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1u << 31) | (1u << 24)) +#define limB2(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1u << 31) | (1u << 23)) +#define limB3(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1u << 22)) +#define limC1(a) LIM((a), 0x00ff, 0x0000, (1u << 21)) +#define limC2(a) LIM((a), 0x00ff, 0x0000, (1u << 20)) +#define limC3(a) LIM((a), 0x00ff, 0x0000, (1u << 19)) +#define limD(a) LIM((a), 0xffff, 0x0000, (1u << 31) | (1u << 18)) + +#define F(a) BOUNDS((a), 0x7fffffff, (1u << 31) | (1u << 16), -(s64)0x80000000, (1u << 31) | (1u << 15)) +#define limG1(a) LIM((a), 0x3ff, -0x400, (1u << 31) | (1u << 14)) +#define limG2(a) LIM((a), 0x3ff, -0x400, (1u << 31) | (1u << 13)) +#define limH(a) LIM((a), 0x1000, 0x0000, (1u << 12)) #ifndef __arm__ #define A1U A1 @@ -360,12 +360,12 @@ void MTC2(struct psxCP2Regs *regs, u32 value, int reg) { a = gteLZCS; if (a > 0) { int i; - for (i = 31; (a & (1 << i)) == 0 && i >= 0; i--); + for (i = 31; (a & (1u << i)) == 0 && i >= 0; i--); gteLZCR = 31 - i; } else if (a < 0) { int i; a ^= 0xffffffff; - for (i = 31; (a & (1 << i)) == 0 && i >= 0; i--); + for (i = 31; (a & (1u << i)) == 0 && i >= 0; i--); gteLZCR = 31 - i; } else { gteLZCR = 32; diff --git a/libpcsxcore/psxbios.c b/libpcsxcore/psxbios.c index d008cc9b..fc04e113 100644 --- a/libpcsxcore/psxbios.c +++ b/libpcsxcore/psxbios.c @@ -325,7 +325,7 @@ static int card_io_delay; #define CARD_HARDLER_READM 0x5689 // fake, for psxBios_read() #define CARD_HARDLER_INFO 0x5B64 -#define HLEOP(n) SWAPu32((0x3b << 26) | (n)); +#define HLEOP(n) SWAPu32((0x3bu << 26) | (n)); static u8 loadRam8(u32 addr) { diff --git a/libpcsxcore/psxhw.h b/libpcsxcore/psxhw.h index b2dcee62..d55936b3 100644 --- a/libpcsxcore/psxhw.h +++ b/libpcsxcore/psxhw.h @@ -57,14 +57,14 @@ extern "C" { #define HW_DMA_PCR (psxHu32ref(0x10f0)) #define HW_DMA_ICR (psxHu32ref(0x10f4)) -#define HW_DMA_ICR_BUS_ERROR (1<<15) -#define HW_DMA_ICR_GLOBAL_ENABLE (1<<23) -#define HW_DMA_ICR_IRQ_SENT (1<<31) +#define HW_DMA_ICR_BUS_ERROR (1u << 15) +#define HW_DMA_ICR_GLOBAL_ENABLE (1u << 23) +#define HW_DMA_ICR_IRQ_SENT (1u << 31) #define DMA_INTERRUPT(n) { \ u32 icr = SWAPu32(HW_DMA_ICR); \ - if (icr & (1 << (16 + n))) { \ - icr |= 1 << (24 + n); \ + if (icr & (1u << (16 + n))) { \ + icr |= 1u << (24 + n); \ if (icr & HW_DMA_ICR_GLOBAL_ENABLE && !(icr & HW_DMA_ICR_IRQ_SENT)) { \ psxHu32ref(0x1070) |= SWAP32(8); \ icr |= HW_DMA_ICR_IRQ_SENT; \ diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c index e0edecd6..e21e7efb 100644 --- a/libpcsxcore/psxinterpreter.c +++ b/libpcsxcore/psxinterpreter.c @@ -939,9 +939,9 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { // SysPrintf("MTC0 %d: %x\n", reg, val); switch (reg) { case 12: // SR - if (unlikely((regs_->CP0.n.SR ^ val) & (1 << 16))) + if (unlikely((regs_->CP0.n.SR ^ val) & (1u << 16))) psxMemOnIsolate((val >> 16) & 1); - if (unlikely((regs_->CP0.n.SR ^ val) & (7 << 29))) + if (unlikely((regs_->CP0.n.SR ^ val) & (7u << 29))) setupCop(val); regs_->CP0.n.SR = val; psxTestSWInts(regs_, 1); diff --git a/plugins/dfsound/registers.c b/plugins/dfsound/registers.c index 75e7d7a1..ee2107c9 100644 --- a/plugins/dfsound/registers.c +++ b/plugins/dfsound/registers.c @@ -54,7 +54,7 @@ void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val, int changed = spu.regArea[rofs] != val; spu.regArea[rofs] = val; - if (!changed && (ignore_dupe[rofs >> 5] & (1 << (rofs & 0x1f)))) + if (!changed && (ignore_dupe[rofs >> 5] & (1u << (rofs & 0x1f)))) return; // zero keyon/keyoff? if (val == 0 && (r & 0xff8) == 0xd88) diff --git a/plugins/gpu_neon/psx_gpu/psx_gpu.c b/plugins/gpu_neon/psx_gpu/psx_gpu.c index 1dec0259..4e8d3d32 100644 --- a/plugins/gpu_neon/psx_gpu/psx_gpu.c +++ b/plugins/gpu_neon/psx_gpu/psx_gpu.c @@ -226,9 +226,9 @@ u32 texture_region_mask(s32 x1, s32 y1, s32 x2, s32 y2) coverage_x = x1 >> 6; - mask_up_left = 0xFFFF0000 << coverage_x; - if(coverage_x < 0) - mask_up_left = 0xFFFF0000; + mask_up_left = 0xFFFF0000; + if(coverage_x > 0) + mask_up_left <<= coverage_x; coverage_y = y1 >> 8; if(coverage_y <= 0) @@ -1616,7 +1616,7 @@ setup_blocks_uv_adj_hack(psx_gpu_struct *psx_gpu, block_struct *block, vec_8x8s dither_offsets_short; \ \ dither_row = \ - (dither_row >> dither_shift) | (dither_row << (32 - dither_shift)); \ + (dither_row >> dither_shift) | ((u64)dither_row << (32 - dither_shift)); \ dup_2x32b(vector_cast(vec_2x32u, dither_offsets_short), dither_row); \ setup_blocks_span_initialize_dithered_##texturing() \ @@ -5033,7 +5033,7 @@ void initialize_reciprocal_table(void) #define dither_table_row(a, b, c, d) \ - ((a & 0xFF) | ((b & 0xFF) << 8) | ((c & 0xFF) << 16) | ((d & 0xFF) << 24)) \ + ((a & 0xFF) | ((b & 0xFF) << 8) | ((c & 0xFF) << 16) | ((u32)(d & 0xFF) << 24)) \ void initialize_psx_gpu(psx_gpu_struct *psx_gpu, u16 *vram) { diff --git a/plugins/gpu_neon/psx_gpu/psx_gpu_parse.c b/plugins/gpu_neon/psx_gpu/psx_gpu_parse.c index e6fe0621..66d2f40a 100644 --- a/plugins/gpu_neon/psx_gpu/psx_gpu_parse.c +++ b/plugins/gpu_neon/psx_gpu/psx_gpu_parse.c @@ -108,14 +108,14 @@ static void set_texture(psx_gpu_struct *psx_gpu, u32 texture_settings) psx_gpu->render_state_base = render_state_base; - psx_gpu->current_texture_mask = 0x1 << new_texture_page; + psx_gpu->current_texture_mask = 1u << new_texture_page; if(texture_mode == TEXTURE_MODE_8BPP) { // In 8bpp mode 256x256 takes up two pages. If it's on the right edge it // wraps back around to the left edge. u32 adjacent_texture_page = ((texture_settings + 1) & 0xF) | (texture_settings & 0x10); - psx_gpu->current_texture_mask |= 0x1 << adjacent_texture_page; + psx_gpu->current_texture_mask |= 1u << adjacent_texture_page; if((psx_gpu->last_8bpp_texture_page ^ new_texture_page) & 0x1) { diff --git a/plugins/gpu_neon/psx_gpu/psx_gpu_simd.c b/plugins/gpu_neon/psx_gpu/psx_gpu_simd.c index 1eaee261..9fcc1b1b 100644 --- a/plugins/gpu_neon/psx_gpu/psx_gpu_simd.c +++ b/plugins/gpu_neon/psx_gpu/psx_gpu_simd.c @@ -1851,7 +1851,7 @@ void setup_spans_up_down(psx_gpu_struct *psx_gpu, vertex_struct *v_a, vec_8x8s dither_offsets_short; \ \ dither_row = \ - (dither_row >> dither_shift) | (dither_row << (32 - dither_shift)); \ + (dither_row >> dither_shift) | ((u64)dither_row << (32 - dither_shift)); \ gvdup_n_u32(dither_offsets_short, dither_row); \ setup_blocks_span_initialize_dithered_##texturing() \