From 0ace9b9aac5de8f1ee5bf181132f98a1f81f4a1d Mon Sep 17 00:00:00 2001 From: notaz Date: Wed, 16 Sep 2009 21:34:35 +0000 Subject: [PATCH] memory refactoring (mostly for cd) + ARM mem asm update git-svn-id: file:///home/notaz/opt/svn/PicoDrive@780 be3aeb3a-fb24-0410-a615-afba39da0efa --- pico/cd/area.c | 12 +- pico/cd/memory.c | 334 +++++-- pico/cd/memory_arm.s | 2170 +++++----------------------------------- pico/cd/pico.c | 1 - pico/memory.c | 33 +- pico/memory.h | 4 +- pico/memory_amips.s | 1 + pico/memory_arm.s | 977 ++++-------------- pico/pico_int.h | 5 +- platform/gp2x/Makefile | 4 +- 10 files changed, 724 insertions(+), 2817 deletions(-) diff --git a/pico/cd/area.c b/pico/cd/area.c index 757d8fb..b43a4d9 100644 --- a/pico/cd/area.c +++ b/pico/cd/area.c @@ -272,18 +272,10 @@ PICO_INTERNAL int PicoCdLoadState(void *file) readend: if (PicoAHW & PAHW_MCD) { - /* after load events */ - if (Pico_mcd->s68k_regs[3] & 4) // 1M mode? - wram_2M_to_1M(Pico_mcd->word_ram2M); - PicoMemRemapCD(Pico_mcd->s68k_regs[3]); -#ifdef _ASM_CD_MEMORY_C - if (Pico_mcd->s68k_regs[3] & 4) - PicoMemResetCDdecode(Pico_mcd->s68k_regs[3]); -#endif + PicoMemStateLoaded(); + if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1)) cdda_start_play(); - // restore hint vector - *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector; // must unpack after other CD stuff is loaded PicoAreaUnpackCpu(buff_s68k, 1); diff --git a/pico/cd/memory.c b/pico/cd/memory.c index b8998f8..5b3ebf5 100644 --- a/pico/cd/memory.c +++ b/pico/cd/memory.c @@ -21,6 +21,48 @@ MAKE_68K_WRITE32(s68k_write32, s68k_write16_map) // ----------------------------------------------------------------- +// provided by ASM code: +#ifdef _ASM_CD_MEMORY_C +u32 PicoReadM68k8_io(u32 a); +u32 PicoReadM68k16_io(u32 a); +void PicoWriteM68k8_io(u32 a, u32 d); +void PicoWriteM68k16_io(u32 a, u32 d); + +u32 PicoReadS68k8_pr(u32 a); +u32 PicoReadS68k16_pr(u32 a); +void PicoWriteS68k8_pr(u32 a, u32 d); +void PicoWriteS68k16_pr(u32 a, u32 d); + +u32 PicoReadM68k8_cell0(u32 a); +u32 PicoReadM68k8_cell1(u32 a); +u32 PicoReadM68k16_cell0(u32 a); +u32 PicoReadM68k16_cell1(u32 a); +void PicoWriteM68k8_cell0(u32 a, u32 d); +void PicoWriteM68k8_cell1(u32 a, u32 d); +void PicoWriteM68k16_cell0(u32 a, u32 d); +void PicoWriteM68k16_cell1(u32 a, u32 d); + +u32 PicoReadS68k8_dec0(u32 a); +u32 PicoReadS68k8_dec1(u32 a); +u32 PicoReadS68k16_dec0(u32 a); +u32 PicoReadS68k16_dec1(u32 a); +void PicoWriteS68k8_dec_m0b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m1b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m2b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m0b1(u32 a, u32 d); +void PicoWriteS68k8_dec_m1b1(u32 a, u32 d); +void PicoWriteS68k8_dec_m2b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m0b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m1b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m2b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m0b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m1b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m2b1(u32 a, u32 d); +#endif + +static void remap_prg_window(void); +static void remap_word_ram(int r3); + // poller detection #define POLL_LIMIT 16 #define POLL_CYCLES 124 @@ -98,7 +140,7 @@ void m68k_reg_write8(u32 a, u32 d) if (!(d & 1)) d |= 2; // verified: reset also gives bus if ((d ^ Pico_mcd->m.busreq) & 2) - PicoMemRemapCD(Pico_mcd->s68k_regs[3]); + remap_prg_window(); Pico_mcd->m.busreq = d; return; case 2: @@ -123,7 +165,7 @@ void m68k_reg_write8(u32 a, u32 d) Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f); if ((d ^ dold) & 0xc0) { elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3)); - PicoMemRemapCD(Pico_mcd->s68k_regs[3]); + remap_prg_window(); } #ifdef USE_POLL_DETECT if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) { @@ -272,14 +314,10 @@ void s68k_reg_write8(u32 a, u32 d) d |= dold & 0xc2; if (d & 4) { - if ((d ^ dold) & 5) { + if ((d ^ dold) & 0x1d) { d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit - PicoMemRemapCD(d); + remap_word_ram(d); } -#ifdef _ASM_CD_MEMORY_C - if ((d ^ dold) & 0x1d) - PicoMemResetCDdecode(d); -#endif if (!(dold & 4)) { elprintf(EL_CDREG3, "wram mode 2M->1M"); wram_2M_to_1M(Pico_mcd->word_ram2M); @@ -294,7 +332,7 @@ void s68k_reg_write8(u32 a, u32 d) d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode } wram_1M_to_2M(Pico_mcd->word_ram2M); - PicoMemRemapCD(d); + remap_word_ram(d); } // s68k can only set RET, writing 0 has no effect else if ((dold ^ d) & d & 1) { // RET being set @@ -371,37 +409,57 @@ void s68k_reg_write8(u32 a, u32 d) #ifndef _ASM_CD_MEMORY_C #include "cell_map.c" -#endif // WORD RAM, cell aranged area (220000 - 23ffff) -static u32 PicoReadM68k8_cell(u32 a) +static u32 PicoReadM68k8_cell0(u32 a) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged - return Pico_mcd->word_ram1M[bank][a ^ 1]; + return Pico_mcd->word_ram1M[0][a ^ 1]; +} + +static u32 PicoReadM68k8_cell1(u32 a) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + return Pico_mcd->word_ram1M[1][a ^ 1]; +} + +static u32 PicoReadM68k16_cell0(u32 a) +{ + a = (a&2) | (cell_map(a >> 2) << 2); + return *(u16 *)(Pico_mcd->word_ram1M[0] + a); } -static u32 PicoReadM68k16_cell(u32 a) +static u32 PicoReadM68k16_cell1(u32 a) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&2) | (cell_map(a >> 2) << 2); - return *(u16 *)(Pico_mcd->word_ram1M[bank] + a); + return *(u16 *)(Pico_mcd->word_ram1M[1] + a); } -static void PicoWriteM68k8_cell(u32 a, u32 d) +static void PicoWriteM68k8_cell0(u32 a, u32 d) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); - Pico_mcd->word_ram1M[bank][a ^ 1] = d; + Pico_mcd->word_ram1M[0][a ^ 1] = d; } -static void PicoWriteM68k16_cell(u32 a, u32 d) +static void PicoWriteM68k8_cell1(u32 a, u32 d) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); - *(u16 *)(Pico_mcd->word_ram1M[bank] + a) = d; + Pico_mcd->word_ram1M[1][a ^ 1] = d; } +static void PicoWriteM68k16_cell0(u32 a, u32 d) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d; +} + +static void PicoWriteM68k16_cell1(u32 a, u32 d) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d; +} +#endif + // RAM cart (40000 - 7fffff, optional) static u32 PicoReadM68k8_ramc(u32 a) { @@ -456,6 +514,7 @@ static void PicoWriteM68k16_ramc(u32 a, u32 d) } // IO/control/cd registers (a10000 - ...) +#ifndef _ASM_CD_MEMORY_C static u32 PicoReadM68k8_io(u32 a) { u32 d; @@ -518,6 +577,7 @@ static void PicoWriteM68k16_io(u32 a, u32 d) PicoWrite16_io(a, d); } +#endif // ----------------------------------------------------------------- // Sub 68k @@ -545,12 +605,36 @@ static void s68k_unmapped_write16(u32 a, u32 d) elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); } +// PRG RAM protected range (000000 - 00ff00)? +// XXX verify: ff00 or 1fe00 max? +static void PicoWriteS68k8_prgwp(u32 a, u32 d) +{ + if (a >= (Pico_mcd->s68k_regs[2] << 8)) + Pico_mcd->prg_ram[a ^ 1] = d; +} + +static void PicoWriteS68k16_prgwp(u32 a, u32 d) +{ + if (a >= (Pico_mcd->s68k_regs[2] << 8)) + *(u16 *)(Pico_mcd->prg_ram + a) = d; +} + +#ifndef _ASM_CD_MEMORY_C + // decode (080000 - 0bffff, in 1M mode) -static u32 PicoReadS68k8_dec(u32 a) +static u32 PicoReadS68k8_dec0(u32 a) +{ + u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff]; + if (a & 1) + d &= 0x0f; + else + d >>= 4; + return d; +} + +static u32 PicoReadS68k8_dec1(u32 a) { - u32 d, bank; - bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1; - d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; + u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff]; if (a & 1) d &= 0x0f; else @@ -558,68 +642,86 @@ static u32 PicoReadS68k8_dec(u32 a) return d; } -static u32 PicoReadS68k16_dec(u32 a) +static u32 PicoReadS68k16_dec0(u32 a) { - u32 d, bank; - bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1; - d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; + u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff]; d |= d << 4; d &= ~0xf0; return d; } -/* check: jaguar xj 220 (draws entire world using decode) */ -static void PicoWriteS68k8_dec(u32 a, u32 d) +static u32 PicoReadS68k16_dec1(u32 a) { - u8 r3 = Pico_mcd->s68k_regs[3]; - u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff]; - u8 oldmask = (a & 1) ? 0xf0 : 0x0f; - - r3 &= 0x18; - d &= 0x0f; - if (!(a & 1)) - d <<= 4; - - if (r3 == 8) { - if ((!(*pd & (~oldmask))) && d) - goto do_it; - } else if (r3 > 8) { - if (d) - goto do_it; - } else - goto do_it; - - return; - -do_it: - *pd = d | (*pd & oldmask); + u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff]; + d |= d << 4; + d &= ~0xf0; + return d; } -static void PicoWriteS68k16_dec(u32 a, u32 d) -{ - u8 r3 = Pico_mcd->s68k_regs[3]; - u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff]; +/* check: jaguar xj 220 (draws entire world using decode) */ +#define mk_decode_w8(bank) \ +static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + if (!(a & 1)) \ + *pd = (*pd & 0x0f) | (d << 4); \ + else \ + *pd = (*pd & 0xf0) | (d & 0x0f); \ +} \ + \ +static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + u8 mask = (a & 1) ? 0x0f : 0xf0; \ + \ + if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \ + PicoWriteS68k8_dec_m0b##bank(a, d); \ +} \ + \ +static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \ +{ \ + if (d & 0x0f) /* overwrite */ \ + PicoWriteS68k8_dec_m0b##bank(a, d); \ +} - //if ((a & 0x3ffff) < 0x28000) return; +mk_decode_w8(0) +mk_decode_w8(1) + +#define mk_decode_w16(bank) \ +static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; \ + *pd = d | (d >> 4); \ +} \ + \ +static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; /* underwrite */ \ + if (!(*pd & 0xf0)) *pd |= d >> 4; \ + if (!(*pd & 0x0f)) *pd |= d; \ +} \ + \ +static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; /* overwrite */ \ + d |= d >> 4; \ + \ + if (!(d & 0xf0)) d |= *pd & 0xf0; \ + if (!(d & 0x0f)) d |= *pd & 0x0f; \ + *pd = d; \ +} - r3 &= 0x18; - d &= 0x0f0f; - d |= d >> 4; +mk_decode_w16(0) +mk_decode_w16(1) - if (r3 == 8) { - u8 dold = *pd; - if (!(dold & 0xf0)) dold |= d & 0xf0; - if (!(dold & 0x0f)) dold |= d & 0x0f; - *pd = dold; - } else if (r3 > 8) { - u8 dold = *pd; - if (!(d & 0xf0)) d |= dold & 0xf0; - if (!(d & 0x0f)) d |= dold & 0x0f; - *pd = d; - } else { - *pd = d; - } -} +#endif // backup RAM (fe0000 - feffff) static u32 PicoReadS68k8_bram(u32 a) @@ -652,6 +754,8 @@ static void PicoWriteS68k16_bram(u32 a, u32 d) SRam.changed = 1; } +#ifndef _ASM_CD_MEMORY_C + // PCM and registers (ff0000 - ffffff) static u32 PicoReadS68k8_pr(u32 a) { @@ -677,6 +781,7 @@ static u32 PicoReadS68k8_pr(u32 a) } // PCM + // XXX: verify: probably odd addrs only? if ((a & 0x8000) == 0x0000) { a &= 0x7fff; if (a >= 0x2000) @@ -785,21 +890,43 @@ static void PicoWriteS68k16_pr(u32 a, u32 d) s68k_unmapped_write16(a, d); } +#endif + +static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 }; +static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 }; +static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 }; +static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 }; + +static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 }; +static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 }; + +static const void *s68k_dec_write8[2][4] = { + { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 }, + { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 }, +}; + +static const void *s68k_dec_write16[2][4] = { + { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 }, + { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 }, +}; + // ----------------------------------------------------------------- -// TODO: probably split -void PicoMemRemapCD(int r3) +static void remap_prg_window(void) { - void *bank; - // PRG RAM if (Pico_mcd->m.busreq & 2) { - bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6]; + void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6]; cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0); } else { m68k_map_unmap(0x020000, 0x03ffff); } +} + +static void remap_word_ram(int r3) +{ + void *bank; // WORD RAM if (!(r3 & 4)) { @@ -810,20 +937,22 @@ void PicoMemRemapCD(int r3) // TODO: handle 0x0c0000 } else { - bank = Pico_mcd->word_ram1M[r3 & 1]; + int b0 = r3 & 1; + int m = (r3 & 0x18) >> 3; + bank = Pico_mcd->word_ram1M[b0]; cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0); - bank = Pico_mcd->word_ram1M[(r3 & 1) ^ 1]; + bank = Pico_mcd->word_ram1M[b0 ^ 1]; cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1); // "cell arrange" on m68k - cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, PicoReadM68k8_cell, 1); - cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, PicoReadM68k16_cell, 1); - cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, PicoWriteM68k8_cell, 1); - cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, PicoWriteM68k16_cell, 1); + cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1); + cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1); + cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1); + cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1); // "decode format" on s68k - cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, PicoReadS68k8_dec, 1); - cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, PicoReadS68k16_dec, 1); - cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, PicoWriteS68k8_dec, 1); - cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, PicoWriteS68k16_dec, 1); + cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1); + cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1); + cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1); + cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1); } #ifdef EMU_F68K @@ -844,6 +973,20 @@ void PicoMemRemapCD(int r3) #endif } +void PicoMemStateLoaded(void) +{ + int r3 = Pico_mcd->s68k_regs[3]; + + /* after load events */ + if (r3 & 4) // 1M mode? + wram_2M_to_1M(Pico_mcd->word_ram2M); + remap_word_ram(r3); + remap_prg_window(); + + // restore hint vector + *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector; +} + #ifdef EMU_M68K static void m68k_mem_setup_cd(void); #endif @@ -853,8 +996,6 @@ PICO_INTERNAL void PicoMemSetupCD(void) // setup default main68k map PicoMemSetup(); - // PicoMemRemapCD() will set up RAMs, so not done here - // main68k map (BIOS mapped by PicoMemSetup()): // RAM cart if (PicoOpt & POPT_EN_MCD_RAMCART) { @@ -881,6 +1022,8 @@ PICO_INTERNAL void PicoMemSetupCD(void) cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); + cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1); + cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1); // BRAM cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1); @@ -894,6 +1037,9 @@ PICO_INTERNAL void PicoMemSetupCD(void) cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1); cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1); + // RAMs + remap_word_ram(1); + #ifdef EMU_C68K // s68k PicoCpuCS68k.read8 = (void *)s68k_read8_map; @@ -939,7 +1085,7 @@ PICO_INTERNAL void PicoMemSetupCD(void) // WORD RAM 2M area for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++) PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000; - // PicoMemRemapCD() will setup word ram for both + // remap_word_ram() will setup word ram for both } #endif #ifdef EMU_M68K diff --git a/pico/cd/memory_arm.s b/pico/cd/memory_arm.s index 9aba56d..74315e4 100644 --- a/pico/cd/memory_arm.s +++ b/pico/cd/memory_arm.s @@ -1,305 +1,66 @@ @ vim:filetype=armasm @ Memory I/O handlers for Sega/Mega CD emulation -@ (c) Copyright 2007, Grazvydas "notaz" Ignotas - +@ (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas .equiv PCM_STEP_SHIFT, 11 -.equiv POLL_LIMIT, 16 - -@ jump tables -.data -.align 4 - -.altmacro -.macro mk_m68k_jump_table on sz @ operation name, size - .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff - .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff - .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff - .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff - .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff - .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff - .long m_m68k_&\on&\sz&_bcram_size @ 0x400000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x420000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff - .long m_m68k_&\on&\sz&_bcram @ 0x600000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x620000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7dffff - .long m_m68k_&\on&\sz&_bcram_reg @ 0x7e0000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff - .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff - .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000 - .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000 - .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff - .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000 - .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff - .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000 - .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff -.endm - -.macro mk_s68k_jump_table on sz @ operation name, size - .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff - .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff - .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff - .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area - .long m_&\on&_null @ 0x0e0000 - 0x0fffff -.endm - - -@ the jumptables themselves. -m_m68k_read8_table: mk_m68k_jump_table read 8 -m_m68k_read16_table: mk_m68k_jump_table read 16 -m_m68k_read32_table: mk_m68k_jump_table read 32 -m_m68k_write8_table: mk_m68k_jump_table write 8 -m_m68k_write16_table: mk_m68k_jump_table write 16 -m_m68k_write32_table: mk_m68k_jump_table write 32 - -m_s68k_read8_table: mk_s68k_jump_table read 8 -m_s68k_read16_table: mk_s68k_jump_table read 16 -m_s68k_read32_table: mk_s68k_jump_table read 32 -m_s68k_write8_table: mk_s68k_jump_table write 8 -m_s68k_write16_table: mk_s68k_jump_table write 16 -m_s68k_write32_table: mk_s68k_jump_table write 32 - -m_s68k_decode_write_table: - .long m_s68k_write8_2M_decode_b0_m0 - .long m_s68k_write16_2M_decode_b0_m0 - .long m_s68k_write32_2M_decode_b0_m0 - .long m_s68k_write8_2M_decode_b0_m1 - .long m_s68k_write16_2M_decode_b0_m1 - .long m_s68k_write32_2M_decode_b0_m1 - .long m_s68k_write8_2M_decode_b0_m2 - .long m_s68k_write16_2M_decode_b0_m2 - .long m_s68k_write32_2M_decode_b0_m2 - .long m_s68k_write8_2M_decode_b1_m0 - .long m_s68k_write16_2M_decode_b1_m0 - .long m_s68k_write32_2M_decode_b1_m0 - .long m_s68k_write8_2M_decode_b1_m1 - .long m_s68k_write16_2M_decode_b1_m1 - .long m_s68k_write32_2M_decode_b1_m1 - .long m_s68k_write8_2M_decode_b1_m2 - .long m_s68k_write16_2M_decode_b1_m2 - .long m_s68k_write32_2M_decode_b1_m2 - - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ .text -.align 4 - -.global PicoMemResetCD -.global PicoMemResetCDdecode -.global PicoReadM68k8 -.global PicoReadM68k16 -.global PicoReadM68k32 -.global PicoWriteM68k8 -.global PicoWriteM68k16 -.global PicoWriteM68k32 -.global PicoReadS68k8 -.global PicoReadS68k16 -.global PicoReadS68k32 -.global PicoWriteS68k8 -.global PicoWriteS68k16 -.global PicoWriteS68k32 +.align 2 + +.global PicoReadM68k8_io +.global PicoReadM68k16_io +.global PicoWriteM68k8_io +.global PicoWriteM68k16_io + +.global PicoReadS68k8_pr +.global PicoReadS68k16_pr +.global PicoWriteS68k8_pr +.global PicoWriteS68k16_pr + +.global PicoReadM68k8_cell0 +.global PicoReadM68k8_cell1 +.global PicoReadM68k16_cell0 +.global PicoReadM68k16_cell1 +.global PicoWriteM68k8_cell0 +.global PicoWriteM68k8_cell1 +.global PicoWriteM68k16_cell0 +.global PicoWriteM68k16_cell1 + +.global PicoReadS68k8_dec0 +.global PicoReadS68k8_dec1 +.global PicoReadS68k16_dec0 +.global PicoReadS68k16_dec1 +.global PicoWriteS68k8_dec_m0b0 +.global PicoWriteS68k8_dec_m1b0 +.global PicoWriteS68k8_dec_m2b0 +.global PicoWriteS68k8_dec_m0b1 +.global PicoWriteS68k8_dec_m1b1 +.global PicoWriteS68k8_dec_m2b1 +.global PicoWriteS68k16_dec_m0b0 +.global PicoWriteS68k16_dec_m1b0 +.global PicoWriteS68k16_dec_m2b0 +.global PicoWriteS68k16_dec_m0b1 +.global PicoWriteS68k16_dec_m1b1 +.global PicoWriteS68k16_dec_m2b1 @ externs, just for reference .extern Pico -.extern z80Read8 -.extern OtherRead16 -.extern PicoVideoRead -.extern PicoVideoRead8 .extern Read_CDC_Host .extern m68k_reg_write8 -.extern OtherWrite16 -.extern gfx_cd_read .extern s68k_reg_read16 -.extern SRam -.extern gfx_cd_write16 .extern s68k_reg_write8 .extern s68k_poll_adclk -.extern PicoCpuMS68k .extern s68k_poll_detect -.extern SN76496Write -.extern m_m68k_read8_misc -.extern m_m68k_write8_misc - - -@ r0=reg3, r1-r3=temp -.macro mk_update_table on sz @ operation name, size - @ we only set word-ram handlers - ldr r1, =m_m68k_&\on&\sz&_table - ldr r12,=m_s68k_&\on&\sz&_table - tst r0, #4 - bne 0f @ pmr_8_1M - -@ pmr_8_2M: - ldr r2, =m_m68k_&\on&\sz&_wordram0_2M - ldr r3, =m_s68k_&\on&\sz&_wordram_2M - str r2, [r1, #16*4] - str r2, [r1, #17*4] - ldr r2, =m_&\on&_null - str r3, [r12,#4*4] - str r3, [r12,#5*4] - str r2, [r12,#6*4] - b 9f @ pmr_8_done - -0: @ pmr_8_1M: - tst r0, #1 - bne 1f @ pmr_8_1M1 - -@ pmr_8_1M0: - ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0 - ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0 - str r2, [r1, #16*4] - str r3, [r1, #17*4] - ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1 -.ifeqs "\on", "read" - ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1 - str r2, [r12,#4*4] - str r2, [r12,#5*4] -.endif - str r3, [r12,#6*4] - b 9f @ pmr_8_done - -1: @ pmr_8_1M1: - ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1 - ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1 - str r2, [r1, #16*4] - str r3, [r1, #17*4] - ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0 -.ifeqs "\on", "read" - ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0 - str r2, [r12,#4*4] - str r2, [r12,#5*4] -.endif - str r3, [r12,#6*4] - -9: @ pmr_8_done: -.endm - - -PicoMemResetCD: @ r3 - mk_update_table read 8 - mk_update_table read 16 - mk_update_table read 32 - mk_update_table write 8 - mk_update_table write 16 - mk_update_table write 32 - bx lr - - -PicoMemResetCDdecode: @reg3 - tst r0, #4 - bxeq lr @ we should not be called in 2M mode - ldr r1, =m_s68k_write8_table - ldr r3, =m_s68k_decode_write_table - and r2, r0, #0x18 - mov r2, r2, lsr #3 - cmp r2, #3 - moveq r2, #2 @ mode3 is same as mode2? - tst r0, #1 - addeq r2, r2, #3 @ bank1 (r2=0..5) - add r2, r2, r2, lsl #1 @ *= 3 - add r2, r3, r2, lsl #2 - ldmia r2, {r0,r3,r12} - str r0, [r1, #4*4] - str r0, [r1, #5*4] - str r3, [r1, #4*4+8*4] - str r3, [r1, #5*4+8*4] - str r12,[r1, #4*4+8*4*2] - str r12,[r1, #5*4+8*4*2] - bx lr - - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -.macro mk_entry_m68k table - ldr r2, =\table - bic r0, r0, #0xff000000 - and r3, r0, #0x00fe0000 - ldr pc, [r2, r3, lsr #15] -.endm - -PicoReadM68k8: @ u32 a - mk_entry_m68k m_m68k_read8_table - -PicoReadM68k16: @ u32 a - mk_entry_m68k m_m68k_read16_table - -PicoReadM68k32: @ u32 a - mk_entry_m68k m_m68k_read32_table - -PicoWriteM68k8: @ u32 a, u8 d - mk_entry_m68k m_m68k_write8_table - -PicoWriteM68k16: @ u32 a, u16 d - mk_entry_m68k m_m68k_write16_table - -PicoWriteM68k32: @ u32 a, u32 d - mk_entry_m68k m_m68k_write32_table - - -.macro mk_entry_s68k on sz - bic r0, r0, #0xff000000 - cmp r0, #0x00080000 - blt m_s68k_&\on&\sz&_prg - cmp r0, #0x000e0000 - ldrlt r2, =m_s68k_&\on&\sz&_table - andlt r3, r0, #0x000e0000 - ldrlt pc, [r2, r3, lsr #15] - mov r3, #0x00ff0000 - orr r3, r3, #0x00008000 - cmp r0, r3 - bge m_s68k_&\on&\sz&_regs - cmp r0, #0x00ff0000 - bge m_s68k_&\on&\sz&_pcm - cmp r0, #0x00fe0000 - bge m_s68k_&\on&\sz&_backup - mov r0, #0 - bx lr -.endm - -PicoReadS68k8: @ u32 a - mk_entry_s68k read 8 - -PicoReadS68k16: @ u32 a - mk_entry_s68k read 16 - -PicoReadS68k32: @ u32 a - mk_entry_s68k read 32 - -PicoWriteS68k8: @ u32 a, u8 d - mk_entry_s68k write 8 - -PicoWriteS68k16: @ u32 a, u16 d - mk_entry_s68k write 16 - -PicoWriteS68k32: @ u32 a, u32 d - mk_entry_s68k write 32 - +.extern gfx_cd_read +.extern gfx_cd_write16 +.extern PicoCpuCS68k +.extern PicoRead8_io +.extern PicoRead16_io +.extern PicoWrite8_io +.extern PicoWrite16_io -.pool @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@ -347,47 +108,6 @@ PicoWriteS68k32: @ u32 a, u32 d .endm -@ r0=prt1, r1=ptr2; unaligned ptr MUST be r0 -.macro m_read32_gen - tst r0, #2 - ldrneh r0, [r1, r0]! - ldrneh r1, [r1, #2] - ldreq r0, [r1, r0] - moveq r0, r0, ror #16 - orrne r0, r1, r0, lsl #16 -.endm - - -@ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0 -.macro m_write32_gen - tst r0, #2 - mov r1, r1, ror #16 - strneh r1, [r2, r0]! - movne r1, r1, lsr #16 - strneh r1, [r2, #2] - streq r1, [r2, r0] -.endm - -@ -.macro bcram_reg_rw is_read addr_check - rsb r0, r0, #0x800000 - ldr r2, =(Pico+0x22200) - cmp r0, #(0x800000-\addr_check) - ldreq r2, [r2] -.if \is_read - movne r0, #0 -.endif - bxne lr - add r2, r2, #0x110000 - add r2, r2, #0x002200 -.if \is_read - ldrb r0, [r2, #0x18] @ Pico_mcd->m.bcram_reg -.else - strb r1, [r2, #0x18] -.endif - bx lr -.endm - @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@ -396,115 +116,26 @@ m_read_null: bx lr -m_m68k_read8_bios: - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xfe0000 - ldr r1, [r1] - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_prgbank: - ldr r1, =(Pico+0x22200) - eor r0, r0, #1 - ldr r1, [r1] - mov r2, #0x110000 - orr r3, r2, #0x002200 - ldr r3, [r1, r3] - ldr r2, [r1, r2] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - moveq r0, #0 - bxeq lr - and r2, r2, #0xc0000000 @ r3 & 0xC0 - add r1, r1, r2, lsr #12 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r1, [r1] - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r1, [r1] - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r1, [r1] - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r1, [r1] - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - +PicoReadM68k8_cell0: @ 0x220000 - 0x23ffff, cell arranged + mov r3, #0x0c0000 + b 0f -m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged +PicoReadM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged + mov r3, #0x0e0000 +0: cell_map ldr r1, =(Pico+0x22200) - add r0, r0, #0x0e0000 + add r0, r0, r3 ldr r1, [r1] eor r0, r0, #1 ldrb r0, [r1, r0] bx lr -m_m68k_read8_bcram_size: @ 0x400000 - sub r0, r0, #1 - cmp r0, #0x400000 - ldreq r1, =SRam - mov r0, #0 - ldreq r1, [r1] - bxne lr - tst r1, r1 - movne r0, #3 @ pretend to be a 64k cart (8<<3) - bx lr - - -m_m68k_read8_bcram: @ 0x600000 - 0x61ffff - ldr r1, =SRam - bic r0, r0, #0xfe0000 - ldr r1, [r1] - mov r0, r0, lsr #1 - tst r1, r1 - moveq r0, #0 - bxeq lr - add r1, r1, #0x2000 - ldrb r0, [r1, r0] - bx lr - - -m_m68k_read8_bcram_reg: @ 0x7fffff - bcram_reg_rw 1, 0x7fffff - - -m_m68k_read8_system_io: - bic r2, r0, #0xfe0000 - bic r2, r2, #0x3f - cmp r2, #0x012000 - bne m_m68k_read8_misc @ now from Pico/Memory.s +PicoReadM68k8_io: + and r1, r0, #0xff00 + cmp r1, #0x2000 @ a120xx? + bne PicoRead8_io ldr r1, =(Pico+0x22200) and r0, r0, #0x3f @@ -590,142 +221,30 @@ m_m68k_read8_hi: ldrb r0, [r1, r0] bx lr -/* -m_m68k_read8_misc: - bic r2, r0, #0x00ff - bic r2, r2, #0xbf00 - cmp r2, #0xa00000 @ Z80 RAM? - beq z80Read8 -@ ldreq r2, =z80Read8 -@ bxeq r2 - stmfd sp!,{r0,lr} - bic r0, r0, #1 - mov r1, #8 - bl OtherRead16 @ non-MCD version should be ok too - ldmfd sp!,{r1,lr} - tst r1, #1 - moveq r0, r0, lsr #8 - bx lr -*/ - -m_m68k_read8_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid read - b PicoVideoRead8 - - -m_m68k_read8_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr - @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -m_m68k_read16_bios: - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xfe0000 - ldr r1, [r1] - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - - -m_m68k_read16_prgbank: - ldr r1, =(Pico+0x22200) - bic r0, r0, #1 - ldr r1, [r1] - mov r2, #0x110000 - orr r3, r2, #0x002200 - ldr r3, [r1, r3] - ldr r2, [r1, r2] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - moveq r0, #0 - bxeq lr - and r2, r2, #0xc0000000 @ r3 & 0xC0 - add r1, r1, r2, lsr #12 - ldrh r0, [r1, r0] - bx lr - - -m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r1, [r1] - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - - -m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r1, [r1] - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - - -m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r1, [r1] - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - - -m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - @ Warning: read32 relies on NOT using r3 and r12 here - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r1, [r1] - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - +PicoReadM68k16_cell0: @ 0x220000 - 0x23ffff, cell arranged + mov r3, #0x0c0000 + b 0f -m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged +PicoReadM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged + mov r3, #0x0e0000 +0: cell_map ldr r1, =(Pico+0x22200) - add r0, r0, #0x0e0000 + add r0, r0, r3 ldr r1, [r1] bic r0, r0, #1 ldrh r0, [r1, r0] bx lr -m_m68k_read16_bcram_size: @ 0x400000 - cmp r0, #0x400000 - ldreq r1, =SRam - mov r0, #0 - ldreq r1, [r1] - bxne lr - tst r1, r1 - movne r0, #3 @ pretend to be a 64k cart - bx lr - - -@ m_m68k_read16_bcram: @ 0x600000 - 0x61ffff -.equiv m_m68k_read16_bcram, m_m68k_read8_bcram - - -m_m68k_read16_bcram_reg: @ 0x7fffff - bcram_reg_rw 1, 0x7ffffe - - -m_m68k_read16_system_io: - bic r1, r0, #0xfe0000 - bic r1, r1, #0x3f - cmp r1, #0x012000 - bne m_m68k_read16_misc +PicoReadM68k16_io: + and r1, r0, #0xff00 + cmp r1, #0x2000 @ a120xx + bne PicoRead16_io m_m68k_read16_m68k_regs: ldr r1, =(Pico+0x22200) @@ -791,811 +310,120 @@ m_m68k_read16_hi: bx lr -m_m68k_read16_misc: - bic r0, r0, #1 - mov r1, #16 - b OtherRead16 - +@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -m_m68k_read16_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid read - bic r0, r0, #1 - b PicoVideoRead +PicoWriteM68k8_cell0: @ 0x220000 - 0x23ffff, cell arranged + mov r12,#0x0c0000 + b 0f -m_m68k_read16_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - ldrh r0, [r1, r0] +PicoWriteM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged + mov r12,#0x0e0000 +0: + mov r3, r1 + cell_map + ldr r2, =(Pico+0x22200) + add r0, r0, r12 + ldr r2, [r2] + eor r0, r0, #1 + strb r3, [r2, r0] bx lr +PicoWriteM68k8_io: + and r2, r0, #0xff00 + cmp r2, #0x2000 @ a120xx? + beq m68k_reg_write8 + b PicoWrite8_io + + @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -m_m68k_read32_bios: +PicoWriteM68k16_cell0: @ 0x220000 - 0x23ffff, cell arranged + mov r12, #0x0c0000 + b 0f + +PicoWriteM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged + mov r12, #0x0e0000 +0: + mov r3, r1 + cell_map ldr r1, =(Pico+0x22200) - bic r0, r0, #0xfe0000 + add r0, r0, r12 ldr r1, [r1] bic r0, r0, #1 - m_read32_gen + strh r3, [r1, r0] bx lr -m_m68k_read32_prgbank: - ldr r1, =(Pico+0x22200) - bic r0, r0, #1 - ldr r1, [r1] - mov r2, #0x110000 - orr r3, r2, #0x002200 - ldr r3, [r1, r3] - ldr r2, [r1, r2] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - moveq r0, #0 - bxeq lr - and r2, r2, #0xc0000000 @ r3 & 0xC0 - add r1, r1, r2, lsr #12 - m_read32_gen - bx lr +PicoWriteM68k16_io: + and r2, r0, #0xff00 + cmp r2, #0x2000 @ a120xx? + bne PicoWrite16_io +m_m68k_write16_regs: + and r0, r0, #0x3e + cmp r0, #0x0e + beq m_m68k_write16_regs_spec + and r3, r1, #0xff + add r2, r0, #1 + stmfd sp!,{r2,r3,lr} + mov r1, r1, lsr #8 + bl m68k_reg_write8 + ldmfd sp!,{r0,r1,lr} + b m68k_reg_write8 -m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r1, [r1] - bic r0, r0, #1 - m_read32_gen +m_m68k_write16_regs_spec: @ special case + ldr r2, =(Pico+0x22200) + ldr r3, =s68k_poll_adclk + mov r0, #0x110000 + ldr r2, [r2] + add r0, r0, #0x00000e + mov r1, r1, lsr #8 + strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8; + ldr r2, [r3] + mov r1, #0 + and r2, r2, #0xfe + cmp r2, #0x0e + bxne lr + ldr r0, =PicoCpuCS68k + str r1, [r0, #0x58] @ push s68k out of stopped state + str r1, [r3] bx lr -m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r1, [r1] - bic r0, r0, #1 - m_read32_gen - bx lr - +@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ +@ Sub 68k +@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r1, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r1, [r1] - bic r0, r0, #1 - m_read32_gen - bx lr +PicoReadS68k8_dec0: @ 0x080000 - 0x0bffff + mov r3, #0x080000 @ + ^ / 2 + b 0f -m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - tst r0, #2 - bne m_m68k_read32_wordram1_1M_b0_unal - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r1, [r1] - bic r0, r0, #1 - m_read32_gen - bx lr -m_m68k_read32_wordram1_1M_b0_unal: - @ hopefully this doesn't happen too often - mov r12,lr - mov r3, r0 - bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3 - add r1, r3, #2 - mov r3, r0 - mov r0, r1 - bl m_m68k_read16_wordram1_1M_b0 - orr r0, r0, r3, lsl #16 - bx r12 - - -m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged - tst r0, #2 - bne m_m68k_read32_wordram1_1M_b1_unal - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0e0000 - ldr r1, [r1] - bic r0, r0, #1 - m_read32_gen - bx lr -m_m68k_read32_wordram1_1M_b1_unal: - mov r12,lr - mov r3, r0 - bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3 - add r1, r3, #2 - mov r3, r0 - mov r0, r1 - bl m_m68k_read16_wordram1_1M_b1 - orr r0, r0, r3, lsl #16 - bx r12 - - -m_m68k_read32_bcram_size: @ 0x400000 - cmp r0, #0x400000 - ldreq r1, =SRam - mov r0, #0 - ldreq r1, [r1] - bxne lr - tst r1, r1 - movne r0, #0x30000 @ pretend to be a 64k cart - bx lr - - -m_m68k_read32_bcram: @ 0x600000 - 0x61ffff, not likely to be called - mov r12,lr - add r3, r0, #2 - bl m_m68k_read8_bcram - mov r1, r0 - mov r0, r3 - mov r3, r1 - bl m_m68k_read8_bcram - orr r0, r0, r3, lsl #16 - bx r12 - - -m_m68k_read32_bcram_reg: @ 0x7fffff - bcram_reg_rw 1, 0x7ffffc - - -@ it is not very practical to use long access on hw registers, so I assume it is not used too much. -m_m68k_read32_system_io: - bic r1, r0, #0xfe0000 - bic r1, r1, #0x3f - cmp r1, #0x012000 - bne m_m68k_read32_misc - and r1, r0, #0x3e - cmp r1, #0x0e - blt m_m68k_read32_misc - cmp r1, #0x30 - movge r0, #0 - bxge lr - @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that - mov r0, r1 - ldr r1, =(Pico+0x22200) - mov r2, #0xff - ldr r1, [r1] - orr r2, r2, r2, lsl #16 - add r1, r1, #0x110000 - m_read32_gen - and r1, r2, r0 @ data is big-endian read as little, have to byteswap - and r0, r2, r0, lsr #8 - orr r0, r0, r1, lsl #8 - bx lr - -m_m68k_read32_misc: - add r1, r0, #2 - stmfd sp!,{r1,lr} - bl m_m68k_read16_system_io - swp r0, r0, [sp] - bl m_m68k_read16_system_io - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - - -m_m68k_read32_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid read - bic r0, r0, #1 - add r1, r0, #2 - stmfd sp!,{r1,lr} - bl PicoVideoRead - swp r0, r0, [sp] - bl PicoVideoRead - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - - -m_m68k_read32_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - m_read32_gen - bx lr - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - - -m_write_null: -m_m68k_write8_bios: -m_m68k_write8_bcram_size: @ 0x400000 - bx lr - - -m_m68k_write8_prgbank: - ldr r2, =(Pico+0x22200) - eor r0, r0, #1 - ldr r2, [r2] - mov r12,#0x110000 - orr r3, r12, #0x002200 - ldr r3, [r2, r3] - ldr r12,[r2, r12] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - bxeq lr - and r12,r12,#0xc0000000 @ r3 & 0xC0 - add r2, r2, r12, lsr #12 - strb r1, [r2, r0] - bx lr - - -m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r2, [r2] - eor r0, r0, #1 - strb r1, [r2, r0] - bx lr - - -m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r2, [r2] - eor r0, r0, #1 - strb r1, [r2, r0] - bx lr - - -m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r2, [r2] - eor r0, r0, #1 - strb r1, [r2, r0] - bx lr - - -m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - mov r3, r1 - cell_map - ldr r2, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r2, [r2] - eor r0, r0, #1 - strb r3, [r2, r0] - bx lr - - -m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged - mov r3, r1 - cell_map - ldr r2, =(Pico+0x22200) - add r0, r0, #0x0e0000 - ldr r2, [r2] - eor r0, r0, #1 - strb r3, [r2, r0] - bx lr - - -m_m68k_write8_bcram: @ 0x600000 - 0x61ffff - @ can't use r3 or r12, because of write32 - ldr r2, =SRam - bic r0, r0, #0xfe0000 - ldr r2, [r2] - tst r2, r2 - bxeq lr - add r0, r2, r0, lsr #1 - ldr r2, =(Pico+0x22200) - ldr r2, [r2] - add r0, r0, #0x2000 - add r2, r2, #0x110000 - add r2, r2, #0x002200 - ldr r2, [r2, #0x18] - tst r2, #1 @ check bcram reg - bxeq lr - strb r1, [r0] - ldr r2, =SRam - mov r0, #1 - strb r0, [r2, #0x0e] @ SRam.changed = 1 - bx lr - - -m_m68k_write8_bcram_reg: @ 0x7fffff - bcram_reg_rw 0, 0x7fffff - - -m_m68k_write8_system_io: - bic r2, r0, #0xfe0000 - bic r2, r2, #0x3f - cmp r2, #0x012000 - beq m68k_reg_write8 - mov r2, #8 -@ b OtherWrite8 - b m_m68k_write8_misc - - -m_m68k_write8_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid - and r2, r0, #0x19 - cmp r2, #0x11 - andeq r0, r1, #0xff - beq SN76496Write - and r1, r1, #0xff - orr r1, r1, r1, lsl #8 @ byte access gets mirrored - b PicoVideoWrite - - -m_m68k_write8_ram: - ldr r2, =Pico - bic r0, r0, #0xff0000 - eor r0, r0, #1 - strb r1, [r2, r0] - bx lr - - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - - -m_m68k_write16_bios: -m_m68k_write16_bcram_size: @ 0x400000 - bx lr - - -m_m68k_write16_prgbank: - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] - mov r12,#0x110000 - orr r3, r12, #0x002200 - ldr r3, [r2, r3] - ldr r12,[r2, r12] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - bxeq lr - and r12,r12,#0xc0000000 @ r3 & 0xC0 - add r2, r2, r12, lsr #12 - strh r1, [r2, r0] - bx lr - - -m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r2, [r2] - bic r0, r0, #1 - strh r1, [r2, r0] - bx lr - - -m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r2, [r2] - bic r0, r0, #1 - strh r1, [r2, r0] - bx lr - - -m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r2, [r2] - bic r0, r0, #1 - strh r1, [r2, r0] - bx lr - - -m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - @ Warning: write32 relies on NOT using r12 and and keeping data in r3 - mov r3, r1 - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r1, [r1] - bic r0, r0, #1 - strh r3, [r1, r0] - bx lr - - -m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged - mov r3, r1 - cell_map - ldr r1, =(Pico+0x22200) - add r0, r0, #0x0e0000 - ldr r1, [r1] - bic r0, r0, #1 - strh r3, [r1, r0] - bx lr - - -@ m_m68k_write16_bcram: @ 0x600000 - 0x61ffff -.equiv m_m68k_write16_bcram, m_m68k_write8_bcram - - -m_m68k_write16_bcram_reg: @ 0x7fffff - bcram_reg_rw 0, 0x7ffffe - - -m_m68k_write16_system_io: - bic r0, r0, #1 - bic r2, r0, #0xfe0000 - bic r2, r2, #0x3f - cmp r2, #0x012000 - bne OtherWrite16 - -m_m68k_write16_regs: - and r0, r0, #0x3e - cmp r0, #0x0e - beq m_m68k_write16_regs_spec - and r3, r1, #0xff - add r2, r0, #1 - stmfd sp!,{r2,r3,lr} - mov r1, r1, lsr #8 - bl m68k_reg_write8 - ldmfd sp!,{r0,r1,lr} - b m68k_reg_write8 - -m_m68k_write16_regs_spec: @ special case - ldr r2, =(Pico+0x22200) - ldr r3, =s68k_poll_adclk - mov r0, #0x110000 - ldr r2, [r2] - add r0, r0, #0x00000e - mov r1, r1, lsr #8 - strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8; - ldr r2, [r3] - mov r1, #0 - and r2, r2, #0xfe - cmp r2, #0x0e - bxne lr - ldr r0, =PicoCpuCS68k - str r1, [r0, #0x58] @ push s68k out of stopped state - str r1, [r3] - bx lr - - -m_m68k_write16_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid - bic r0, r0, #1 - and r2, r0, #0x18 - cmp r2, #0x10 - bne PicoVideoWrite - and r0, r1, #0xff - b SN76496Write @ lsb goes to 0x11 - - -m_m68k_write16_ram: - ldr r2, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - strh r1, [r2, r0] - bx lr - - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - - -m_m68k_write32_bios: -m_m68k_write32_bcram_size: @ 0x400000 - bx lr - - -m_m68k_write32_prgbank: - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] - mov r12,#0x110000 - orr r3, r12, #0x002200 - ldr r3, [r2, r3] - ldr r12,[r2, r12] - and r3, r3, #0x00030000 - cmp r3, #0x00010000 @ have bus or in reset state? - bxeq lr - and r12,r12,#0xc0000000 @ r3 & 0xC0 - add r2, r2, r12, lsr #12 - m_write32_gen - bx lr - - -m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff -m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000 - ldr r2, [r2] - bic r0, r0, #1 - m_write32_gen - bx lr - - -m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000 - ldr r2, [r2] - bic r0, r0, #1 - m_write32_gen - bx lr - - -m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff - ldr r2, =(Pico+0x22200) - sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000 - ldr r2, [r2] - bic r0, r0, #1 - m_write32_gen - bx lr - - -m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged - tst r0, #2 - bne m_m68k_write32_wordram1_1M_b0_unal - mov r3, r1 - cell_map - ldr r2, =(Pico+0x22200) - add r0, r0, #0x0c0000 - ldr r2, [r2] - bic r0, r0, #1 - mov r1, r3 - m_write32_gen - bx lr -m_m68k_write32_wordram1_1M_b0_unal: - @ hopefully this doesn't happen too often - add r12,r0, #2 - mov r1, r1, ror #16 - stmfd sp!,{lr} - bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3 - ldmfd sp!,{lr} - mov r0, r12 - mov r1, r3, lsr #16 - b m_m68k_write16_wordram1_1M_b0 - - -m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged - tst r0, #2 - bne m_m68k_write32_wordram1_1M_b1_unal - mov r3, r1 - cell_map - ldr r2, =(Pico+0x22200) - add r0, r0, #0x0e0000 - ldr r2, [r2] - bic r0, r0, #1 - mov r1, r3 - m_write32_gen - bx lr -m_m68k_write32_wordram1_1M_b1_unal: - add r12,r0, #2 - mov r1, r1, ror #16 - stmfd sp!,{lr} - bl m_m68k_write16_wordram1_1M_b1 @ same as above - ldmfd sp!,{lr} - mov r0, r12 - mov r1, r3, lsr #16 - b m_m68k_write16_wordram1_1M_b1 - - -m_m68k_write32_bcram: @ 0x600000 - 0x61ffff, not likely to be called - mov r12,lr - add r3, r0, #2 - mov r1, r1, ror #16 - bl m_m68k_write8_bcram - mov r0, r3 - mov r1, r1, ror #16 - bl m_m68k_write8_bcram - bx r12 - - -m_m68k_write32_bcram_reg: @ 0x7fffff - bcram_reg_rw 0, 0x7ffffc - - - -@ it is not very practical to use long access on hw registers, so I assume it is not used too much. -m_m68k_write32_system_io: - bic r2, r0, #0xfe0000 - bic r2, r2, #0x3f - cmp r2, #0x012000 - bne m_m68k_write32_misc - and r2, r0, #0x3e - cmp r2, #0x20 - bxge lr - cmp r2, #0x10 - bge m_m68k_write32_regs_comm - cmp r2, #0x0c - bge m_m68k_write32_regs_spec @ hits the nasty comm reg qiurk - - bic r0, r0, #1 - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #24 - bl m68k_reg_write8 - ldr r0, [sp] - ldr r1, [sp, #4] - add r0, r0, #1 - mov r1, r1, lsr #16 - bl m68k_reg_write8 - ldr r0, [sp] - ldr r1, [sp, #4] - add r0, r0, #2 - mov r1, r1, lsr #8 - bl m68k_reg_write8 - ldmfd sp!,{r0,r1,lr} - add r0, r0, #3 - b m68k_reg_write8 - -m_m68k_write32_regs_comm: @ Handle the 0x10-0x1f range - ldr r0, =(Pico+0x22200) - mov r3, #0xff - ldr r0, [r0] - orr r3, r3, r3, lsl #16 - add r0, r0, #0x110000 - and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap - and r1, r3, r1, ror #24 - orr r1, r1, r12,lsl #8 @ end of byteswap - cmp r2, #0x1e - strh r1, [r2, r0]! - ldr r3, =s68k_poll_adclk - ldr r0, [r3] - movne r1, r1, lsr #16 - strneh r1, [r2, #2] - cmp r0, #0x10 - bxlt lr - ldr r0, =PicoCpuCS68k @ remove poll detected state for s68k - mov r1, #0 - str r1, [r0, #0x58] - str r1, [r3] - bx lr - -m_m68k_write32_misc: - bic r0, r0, #1 - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl OtherWrite16 - ldmfd sp!,{r0,r1,lr} - add r0, r0, #2 - b OtherWrite16 - -m_m68k_write32_regs_spec: - bic r0, r0, #1 - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl m_m68k_write16_regs - ldmfd sp!,{r0,r1,lr} - add r0, r0, #2 - b m_m68k_write16_regs - - -m_m68k_write32_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid - and r2, r0, #0x18 - cmp r2, #0x10 - moveq r0, r1, lsr #16 - beq SN76496Write @ which game is crazy enough to do that? - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl PicoVideoWrite - ldmfd sp!,{r0,r1,lr} - add r0, r0, #2 - b PicoVideoWrite - - -m_m68k_write32_ram: - ldr r2, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - m_write32_gen - bx lr - -.pool - - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - - -.macro m_s68k_read8_ram map_addr - ldr r1, =(Pico+0x22200) - eor r0, r0, #1 - ldr r1, [r1] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - ldrb r0, [r1, r0] - bx lr -.endm - -.macro m_s68k_read8_wordram_2M_decode map_addr +PicoReadS68k8_dec1: + mov r3, #0x0a0000 @ + ^ / 2 +0: ldr r2, =(Pico+0x22200) eor r0, r0, #2 ldr r2, [r2] movs r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address + add r2, r2, r3 @ map to our address ldrb r0, [r2, r0] movcc r0, r0, lsr #4 andcs r0, r0, #0xf bx lr -.endm - -m_s68k_read8_prg: @ 0x000000 - 0x07ffff -m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_read8_ram 0x020000 - - -m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff - m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2 - - -m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff - m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2 - - -m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_read8_ram 0 - - -m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?) - @ must not trash r3 and r12 - ldr r1, =(Pico+0x22200) - mov r0, r0, lsr #1 - ldr r1, [r1] - bic r0, r0, #0xff0000 - bic r0, r0, #0x00e000 - add r1, r1, #0x110000 - add r1, r1, #0x000200 - ldrb r0, [r1, r0] - bx lr - - -m_s68k_read8_pcm: - @ must not trash r3 and r12 - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xff0000 -@ bic r0, r0, #0x008000 - ldr r1, [r1] - mov r2, #0x110000 - orr r2, r2, #0x002200 - cmp r0, #0x2000 - bge m_s68k_read8_pcm_ram - cmp r0, #0x20 - movlt r0, #0 - bxlt lr - orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset - add r1, r1, r2 - and r2, r0, #0x1c - ldr r1, [r1, r2, lsl #2] - tst r0, #2 - moveq r0, r1, lsr #PCM_STEP_SHIFT - movne r0, r1, lsr #(PCM_STEP_SHIFT+8) - and r0, r0, #0xff - bx lr - -m_s68k_read8_pcm_ram: - orr r2, r2, #0x40 - ldr r2, [r1, r2] - add r1, r1, #0x100000 @ pcm_ram - and r2, r2, #0x0f000000 @ bank - add r1, r1, r2, lsr #12 - bic r0, r0, #0x00e000 - mov r0, r0, lsr #1 - ldrb r0, [r1, r0] - bx lr +PicoReadS68k8_pr: + and r2, r0, #0xfe00 + cmp r2, #0x8000 + bne m_s68k_read8_pcm m_s68k_read8_regs: bic r0, r0, #0xff0000 bic r0, r0, #0x008000 - tst r0, #0x7e00 - movne r0, #0 - bxne lr sub r2, r0, #0x0e cmp r2, #(0x30-0x0e) blo m_s68k_read8_comm @@ -1621,301 +449,163 @@ m_s68k_read8_comm: b s68k_poll_detect -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - +m_s68k_read8_pcm: + tst r0, #0x8000 + bne m_read_null -.macro m_s68k_read16_ram map_addr + @ must not trash r3 and r12 ldr r1, =(Pico+0x22200) - bic r0, r0, #1 + bic r0, r0, #0xff0000 +@ bic r0, r0, #0x008000 ldr r1, [r1] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - ldrh r0, [r1, r0] - bx lr -.endm - -.macro m_s68k_read16_wordram_2M_decode map_addr - ldr r2, =(Pico+0x22200) - eor r0, r0, #2 - ldr r2, [r2] - mov r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address - ldrb r0, [r2, r0] - orr r0, r0, r0, lsl #4 - bic r0, r0, #0xf0 + mov r2, #0x110000 + orr r2, r2, #0x002200 + cmp r0, #0x2000 + bge m_s68k_read8_pcm_ram + cmp r0, #0x20 + movlt r0, #0 + bxlt lr + orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset + add r1, r1, r2 + and r2, r0, #0x1c + ldr r1, [r1, r2, lsl #2] + tst r0, #2 + moveq r0, r1, lsr #PCM_STEP_SHIFT + movne r0, r1, lsr #(PCM_STEP_SHIFT+8) + and r0, r0, #0xff bx lr -.endm - - -m_s68k_read16_prg: @ 0x000000 - 0x07ffff -m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_read16_ram 0x020000 - -m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff - m_s68k_read16_wordram_2M_decode 0x080000 - - -m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff - m_s68k_read16_wordram_2M_decode 0x0a0000 - - -m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_read16_ram 0 - - -@ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?) -@ bram is not meant to be accessed by words, does any game do this? -.equiv m_s68k_read16_backup, m_s68k_read8_backup - - -@ m_s68k_read16_pcm: -@ pcm is on 8-bit bus, would this be same as byte access? -.equiv m_s68k_read16_pcm, m_s68k_read8_pcm - - -m_s68k_read16_regs: - bic r0, r0, #0xff0000 - bic r0, r0, #0x008000 - bic r0, r0, #0x000001 - tst r0, #0x7e00 - movne r0, #0 - bxne lr - sub r2, r0, #0x58 - cmp r2, #0x10 - blo gfx_cd_read - cmp r0, #8 - bne s68k_reg_read16 - mov r0, #1 - b Read_CDC_Host +m_s68k_read8_pcm_ram: + orr r2, r2, #0x40 + ldr r2, [r1, r2] + add r1, r1, #0x100000 @ pcm_ram + and r2, r2, #0x0f000000 @ bank + add r1, r1, r2, lsr #12 + bic r0, r0, #0x00e000 + mov r0, r0, lsr #1 + ldrb r0, [r1, r0] + bx lr @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -.macro m_s68k_read32_ram map_addr - ldr r1, =(Pico+0x22200) - bic r0, r0, #1 - ldr r1, [r1] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - m_read32_gen - bx lr -.endm +PicoReadS68k16_dec0: @ 0x080000 - 0x0bffff + mov r3, #0x080000 @ + ^ / 2 + b 0f -.macro m_s68k_read32_wordram_2M_decode map_addr +PicoReadS68k16_dec1: + mov r3, #0x0a0000 @ + ^ / 2 +0: ldr r2, =(Pico+0x22200) eor r0, r0, #2 ldr r2, [r2] mov r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address - ldrb r1, [r2, r0]! - tst r0, #1 - ldrneb r0, [r2, #-1] - ldreqb r0, [r2, #2] - orr r1, r1, r1, lsl #4 - bic r1, r1, #0xf0 + add r2, r2, r3 @ map to our address + ldrb r0, [r2, r0] orr r0, r0, r0, lsl #4 bic r0, r0, #0xf0 - orr r0, r0, r1, lsl #16 bx lr -.endm -m_s68k_read32_prg: @ 0x000000 - 0x07ffff -m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_read32_ram 0x020000 +PicoReadS68k16_pr: + and r2, r0, #0xfe00 + cmp r2, #0x8000 + @ pcm is on 8-bit bus, would this be same as byte access? + bne m_s68k_read8_pcm - -m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff - m_s68k_read32_wordram_2M_decode 0x080000 - - -m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff - m_s68k_read32_wordram_2M_decode 0x0a0000 - - -m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_read32_ram 0 - - -m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?) - @ bram is not meant to be accessed by words, does any game do this? - mov r12,lr - mov r3, r0 - bl m_s68k_read8_backup @ must preserve r3 and r12 - mov r1, r0 - add r0, r3, #2 - mov r3, r1 - bl m_s68k_read8_backup - orr r0, r0, r3, lsl #16 - bx r12 - - -m_s68k_read32_pcm: - mov r12,lr - mov r3, r0 - bl m_s68k_read8_pcm @ must preserve r3 and r12 - mov r1, r0 - add r0, r3, #2 - mov r3, r1 - bl m_s68k_read8_pcm - orr r0, r0, r3, lsl #16 - bx r12 - - -m_s68k_read32_regs: +m_s68k_read16_regs: bic r0, r0, #0xff0000 bic r0, r0, #0x008000 bic r0, r0, #0x000001 - tst r0, #0x7e00 - movne r0, #0 - bxne lr sub r2, r0, #0x58 cmp r2, #0x10 - add r1, r0, #2 - blo m_s68k_read32_regs_gfx - stmfd sp!,{r1,lr} - bl s68k_reg_read16 - swp r0, r0, [sp] - bl s68k_reg_read16 - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - - -m_s68k_read32_regs_gfx: - stmfd sp!,{r1,lr} - bl gfx_cd_read - swp r0, r0, [sp] - bl gfx_cd_read - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr + blo gfx_cd_read + cmp r0, #8 + bne s68k_reg_read16 + mov r0, #1 + b Read_CDC_Host -.pool @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -.macro m_s68k_write8_ram map_addr - ldr r2, =(Pico+0x22200) - eor r0, r0, #1 - ldr r2, [r2] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - strb r1, [r2, r0] - bx lr -.endm - -.macro m_s68k_write8_2M_decode map_addr +.macro m_s68k_write8_2M_decode ldr r2, =(Pico+0x22200) eor r0, r0, #2 - ldr r2, [r2] + ldr r2, [r2] @ Pico.rom movs r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address + add r2, r2, r3 @ map to our address .endm -.macro m_s68k_write8_2M_decode_m0 map_addr @ mode off - m_s68k_write8_2M_decode \map_addr +PicoWriteS68k8_dec_m2b0: @ overwrite + ands r1, r1, #0x0f + bxeq lr + +PicoWriteS68k8_dec_m0b0: + mov r3, #0x080000 + b 0f + +PicoWriteS68k8_dec_m2b1: @ overwrite + ands r1, r1, #0x0f + bxeq lr + +PicoWriteS68k8_dec_m0b1: + mov r3, #0x0a0000 +0: + m_s68k_write8_2M_decode ldrb r0, [r2, r0]! and r1, r1, #0x0f movcc r1, r1, lsl #4 andcc r3, r0, #0x0f andcs r3, r0, #0xf0 orr r3, r3, r1 - cmp r0, r3 @ avoid writing if result is same strneb r3, [r2] bx lr -.endm -.macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite +PicoWriteS68k8_dec_m1b0: @ underwrite + mov r3, #0x080000 + b 0f + +PicoWriteS68k8_dec_m1b1: + mov r3, #0x0a0000 +0: ands r1, r1, #0x0f bxeq lr - m_s68k_write8_2M_decode \map_addr + m_s68k_write8_2M_decode ldrb r0, [r2, r0]! movcc r1, r1, lsl #4 andcc r3, r0, #0x0f andcs r3, r0, #0xf0 - tst r3, r3 - bxeq lr + teq r3, r0 + bxne lr orr r3, r3, r1 - cmp r0, r3 strneb r3, [r2] bx lr -.endm - -.macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite - ands r1, r1, #0x0f - bxeq lr - m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode -.endm - - - -m_s68k_write8_prg: @ 0x000000 - 0x07ffff - ldr r2, =(Pico+0x22200) - eor r0, r0, #1 - ldr r2, [r2] - add r3, r0, #0x020000 @ map to our address - add r12,r2, #0x110000 - ldr r12,[r12] - and r12,r12,#0x00ff0000 @ wp - cmp r0, r12, lsr #8 - strgeb r1, [r2, r3] - bx lr - - -m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_write8_ram 0x020000 - - -m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff - m_s68k_write8_2M_decode_m0 0x080000 -m_s68k_write8_2M_decode_b0_m1: - m_s68k_write8_2M_decode_m1 0x080000 -m_s68k_write8_2M_decode_b0_m2: - m_s68k_write8_2M_decode_m2 0x080000 +PicoWriteS68k8_pr: + and r2, r0, #0xfe00 + cmp r2, #0x8000 + bne m_s68k_write8_pcm -m_s68k_write8_2M_decode_b1_m0: - m_s68k_write8_2M_decode_m0 0x0a0000 - -m_s68k_write8_2M_decode_b1_m1: - m_s68k_write8_2M_decode_m1 0x0a0000 - -m_s68k_write8_2M_decode_b1_m2: - m_s68k_write8_2M_decode_m2 0x0a0000 - - -m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_write8_ram 0 - - -m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?) - @ must not trash r3 and r12 - ldr r2, =(Pico+0x22200) - mov r0, r0, lsr #1 - ldr r2, [r2] +m_s68k_write8_regs: bic r0, r0, #0xff0000 - bic r0, r0, #0x00e000 - add r2, r2, #0x110000 - add r2, r2, #0x000200 - strb r1, [r2, r0] - ldr r1, =SRam - mov r0, #1 - strb r0, [r1, #0x0e] @ SRam.changed = 1 - bx lr + bic r0, r0, #0x008000 + tst r0, #0x7e00 + movne r0, #0 + bxne lr + sub r2, r0, #0x58 + cmp r2, #0x10 + bhs s68k_reg_write8 + bic r0, r0, #1 + orr r1, r1, r1, lsl #8 + b gfx_cd_write16 m_s68k_write8_pcm: + tst r0, #0x8000 + bxne lr bic r0, r0, #0xff0000 cmp r0, #0x12 movlt r0, r0, lsr #1 @@ -1940,56 +630,42 @@ m_s68k_write8_pcm_ram: bx lr -m_s68k_write8_regs: - bic r0, r0, #0xff0000 - bic r0, r0, #0x008000 - tst r0, #0x7e00 - movne r0, #0 - bxne lr - sub r2, r0, #0x58 - cmp r2, #0x10 - bhs s68k_reg_write8 - bic r0, r0, #1 - orr r1, r1, r1, lsl #8 - b gfx_cd_write16 - - @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -.macro m_s68k_write16_ram map_addr - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - strh r1, [r2, r0] - bx lr -.endm - -.macro m_s68k_write16_2M_decode map_addr +.macro m_s68k_write16_2M_decode ldr r2, =(Pico+0x22200) eor r0, r0, #2 ldr r2, [r2] mov r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address + add r2, r2, r3 @ map to our address .endm -.macro m_s68k_write16_2M_decode_m0 map_addr @ mode off - m_s68k_write16_2M_decode \map_addr +PicoWriteS68k16_dec_m0b0: + mov r3, #0x080000 + b 0f + +PicoWriteS68k16_dec_m0b1: + mov r3, #0x0a0000 +0: + m_s68k_write16_2M_decode bic r1, r1, #0xf0 orr r1, r1, r1, lsr #4 strb r1, [r2, r0] bx lr -.endm -.macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite +PicoWriteS68k16_dec_m1b0: @ underwrite + mov r3, #0x080000 + b 0f + +PicoWriteS68k16_dec_m1b1: + mov r3, #0x0a0000 +0: bics r1, r1, #0xf000 bicnes r1, r1, #0x00f0 bxeq lr orr r1, r1, r1, lsr #4 - m_s68k_write16_2M_decode \map_addr + m_s68k_write16_2M_decode ldrb r0, [r2, r0]! and r3, r1, #0x0f and r1, r1, #0xf0 @@ -1999,14 +675,19 @@ m_s68k_write8_regs: orreq r0, r0, r1 strb r0, [r2] bx lr -.endm -.macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite +PicoWriteS68k16_dec_m2b0: @ overwrite + mov r3, #0x080000 + b 0f + +PicoWriteS68k16_dec_m2b1: + mov r3, #0x0a0000 +0: bics r1, r1, #0xf000 bicnes r1, r1, #0x00f0 bxeq lr orr r1, r1, r1, lsr #4 - m_s68k_write16_2M_decode \map_addr + m_s68k_write16_2M_decode ldrb r0, [r2, r0]! ands r3, r1, #0x0f andne r0, r0, #0xf0 @@ -2016,58 +697,12 @@ m_s68k_write8_regs: orrne r0, r0, r1 strb r0, [r2] bx lr -.endm - - - -m_s68k_write16_prg: @ 0x000000 - 0x07ffff - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] - add r3, r0, #0x020000 @ map to our address - add r12,r2, #0x110000 - ldr r12,[r12] - and r12,r12,#0x00ff0000 @ wp - cmp r0, r12, lsr #8 - strgeh r1, [r2, r3] - bx lr - - -m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_write16_ram 0x020000 - - -m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff - m_s68k_write16_2M_decode_m0 0x080000 - -m_s68k_write16_2M_decode_b0_m1: - m_s68k_write16_2M_decode_m1 0x080000 -m_s68k_write16_2M_decode_b0_m2: - m_s68k_write16_2M_decode_m2 0x080000 - -m_s68k_write16_2M_decode_b1_m0: - m_s68k_write16_2M_decode_m0 0x0a0000 - -m_s68k_write16_2M_decode_b1_m1: - m_s68k_write16_2M_decode_m1 0x0a0000 - -m_s68k_write16_2M_decode_b1_m2: - m_s68k_write16_2M_decode_m2 0x0a0000 - - -m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_write16_ram 0 - - -@ m_s68k_write16_backup: -.equiv m_s68k_write16_backup, m_s68k_write8_backup - - -@ m_s68k_write16_pcm: -.equiv m_s68k_write16_pcm, m_s68k_write8_pcm +PicoWriteS68k16_pr: + and r2, r0, #0xfe00 + cmp r2, #0x8000 + bne m_s68k_write8_pcm m_s68k_write16_regs: bic r0, r0, #0xff0000 @@ -2097,268 +732,5 @@ m_s68k_write16_regs_spec: @ special case strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d; bx lr - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - - -.macro m_s68k_write32_ram map_addr - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] -.if \map_addr - add r0, r0, #\map_addr @ map to our address -.endif - m_write32_gen - bx lr -.endm - -.macro m_s68k_write32_2M_decode map_addr - ldr r2, =(Pico+0x22200) - eor r0, r0, #2 - ldr r2, [r2] - mov r0, r0, lsr #1 @ +4-6 <<16 - add r2, r2, #\map_addr @ map to our address -.endm - -.macro m_s68k_write32_2M_decode_m0 map_addr @ mode off - m_s68k_write32_2M_decode \map_addr - bic r1, r1, #0x000000f0 - bic r1, r1, #0x00f00000 - orr r1, r1, r1, lsr #4 - mov r3, r1, lsr #16 - strb r3, [r2, r0]! - tst r0, #1 - strneb r1, [r2, #-1] - streqb r1, [r2, #3] - bx lr -.endm - -.macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite - bics r1, r1, #0x000000f0 - bicnes r1, r1, #0x0000f000 - bicnes r1, r1, #0x00f00000 - bicnes r1, r1, #0xf0000000 - bxeq lr - orr r1, r1, r1, lsr #4 - m_s68k_write32_2M_decode \map_addr - ldrb r3, [r2, r0]! - tst r0, #1 - ldrneb r0, [r2, #-1] - ldreqb r0, [r2, #3] - and r12,r1, #0x0000000f - orr r0, r0, r3, lsl #16 - orrne r0, r0, #0x80000000 @ remember addr lsb bit - tst r0, #0x0000000f - orreq r0, r0, r12 - tst r0, #0x000000f0 - andeq r12,r1, #0x000000f0 - orreq r0, r0, r12 - tst r0, #0x000f0000 - andeq r12,r1, #0x000f0000 - orreq r0, r0, r12 - tst r0, #0x00f00000 - andeq r12,r1, #0x00f00000 - orreq r0, r0, r12 - tst r0, #0x80000000 - strneb r0, [r2, #-1] - streqb r0, [r2, #3] - mov r0, r0, lsr #16 - strb r0, [r2] - bx lr -.endm - -.macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite - bics r1, r1, #0x000000f0 - bicnes r1, r1, #0x0000f000 - bicnes r1, r1, #0x00f00000 - bicnes r1, r1, #0xf0000000 - bxeq lr - orr r1, r1, r1, lsr #4 - m_s68k_write32_2M_decode \map_addr - ldrb r3, [r2, r0]! - tst r0, #1 - ldrneb r0, [r2, #-1] - ldreqb r0, [r2, #3] - orrne r1, r1, #0x80000000 @ remember addr lsb bit - orr r0, r0, r3, lsl #16 - tst r1, #0x0000000f - andeq r12,r0, #0x0000000f - orreq r1, r1, r12 - tst r1, #0x000000f0 - andeq r12,r0, #0x000000f0 - orreq r1, r1, r12 - tst r1, #0x000f0000 - andeq r12,r0, #0x000f0000 - orreq r1, r1, r12 - tst r1, #0x00f00000 - andeq r12,r0, #0x00f00000 - orreq r1, r1, r12 - cmp r0, r1 - bxeq lr - tst r1, #0x80000000 - strneb r1, [r2, #-1] - streqb r1, [r2, #3] - mov r1, r1, lsr #16 - strb r1, [r2] - bx lr -.endm - - - -m_s68k_write32_prg: @ 0x000000 - 0x07ffff - ldr r2, =(Pico+0x22200) - bic r0, r0, #1 - ldr r2, [r2] - add r3, r0, #0x020000 @ map to our address - add r12,r2, #0x110000 - ldr r12,[r12] - and r12,r12,#0x00ff0000 @ wp - cmp r0, r12, lsr #8 - bxlt lr - mov r0, r1, lsr #16 - strh r0, [r2, r3]! - strh r1, [r2, #2] - bx lr - - -m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff -m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000 - m_s68k_write32_ram 0x020000 - - -m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff - m_s68k_write32_2M_decode_m0 0x080000 - -m_s68k_write32_2M_decode_b0_m1: - m_s68k_write32_2M_decode_m1 0x080000 - -m_s68k_write32_2M_decode_b0_m2: - m_s68k_write32_2M_decode_m2 0x080000 - -m_s68k_write32_2M_decode_b1_m0: - m_s68k_write32_2M_decode_m0 0x0a0000 - -m_s68k_write32_2M_decode_b1_m1: - m_s68k_write32_2M_decode_m1 0x0a0000 - -m_s68k_write32_2M_decode_b1_m2: - m_s68k_write32_2M_decode_m2 0x0a0000 - - -m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :) - m_s68k_write32_ram 0 - - -m_s68k_write32_backup: - add r12,r0, #2 - mov r3, r1 - mov r1, r1, lsr #16 - stmfd sp!,{lr} - bl m_s68k_write8_backup @ must preserve r3 and r12 - ldmfd sp!,{lr} - mov r0, r12 - mov r1, r3 - b m_s68k_write8_backup - - -m_s68k_write32_pcm: - bic r0, r0, #0xff0000 - cmp r0, #0x12 - blt m_s68k_write32_pcm_reg - - cmp r0, #0x2000 - bxlt lr - -m_s68k_write32_pcm_ram: - ldr r3, =(Pico+0x22200) - bic r0, r0, #0x00e000 - ldr r3, [r3] - mov r0, r0, lsr #1 - add r2, r3, #0x110000 - add r2, r2, #0x002200 - add r2, r2, #0x000040 - ldr r2, [r2] - add r3, r3, #0x100000 @ pcm_ram - and r2, r2, #0x0f000000 @ bank - add r3, r3, r2, lsr #12 - mov r1, r1, ror #16 - strb r1, [r3, r0]! - mov r1, r1, ror #16 - strb r1, [r3] - bx lr - -m_s68k_write32_pcm_reg: - mov r0, r0, lsr #1 - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl pcm_write - ldmfd sp!,{r0,r1,lr} - add r0, r0, #1 - b pcm_write - - -m_s68k_write32_regs: - bic r0, r0, #0xff0000 - bic r0, r0, #0x008000 - bic r0, r0, #1 - tst r0, #0x7e00 - bxne lr - sub r2, r0, #0x58 - cmp r2, #0x10 - blo m_s68k_write32_regs_gfx - and r2, r0, #0x1fc - cmp r2, #0x0c - beq m_s68k_write32_regs_spec @ hits 0x0f - and r2, r0, #0x1f0 - cmp r2, #0x20 - beq m_s68k_write32_regs_comm - - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #24 - bl s68k_reg_write8 - ldr r0, [sp] - ldr r1, [sp, #4] - add r0, r0, #1 - mov r1, r1, lsr #16 - bl s68k_reg_write8 - ldr r0, [sp] - ldr r1, [sp, #4] - add r0, r0, #2 - mov r1, r1, lsr #8 - bl s68k_reg_write8 - ldmfd sp!,{r0,r1,lr} - add r0, r0, #3 - b s68k_reg_write8 - -m_s68k_write32_regs_gfx: - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl gfx_cd_write16 - ldmfd sp!,{r0,r1,lr} - add r0, r0, #2 - b gfx_cd_write16 - -m_s68k_write32_regs_comm: @ Handle the 0x20-0x2f range - ldr r2, =(Pico+0x22200) - mov r3, #0xff - ldr r2, [r2] - orr r3, r3, r3, lsl #16 - add r2, r2, #0x110000 - and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap - and r1, r3, r1, ror #24 - orr r1, r1, r12,lsl #8 @ end of byteswap - cmp r0, #0x2e - strh r1, [r0, r2]! - movne r1, r1, lsr #16 - strneh r1, [r0, #2] - bx lr - -m_s68k_write32_regs_spec: - stmfd sp!,{r0,r1,lr} - mov r1, r1, lsr #16 - bl m_s68k_write16_regs - ldmfd sp!,{r0,r1,lr} - add r0, r0, #2 - b m_s68k_write16_regs - +.pool diff --git a/pico/cd/pico.c b/pico/cd/pico.c index 8c0bf25..eac8164 100644 --- a/pico/cd/pico.c +++ b/pico/cd/pico.c @@ -30,7 +30,6 @@ PICO_INTERNAL void PicoPowerMCD(void) memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size); - PicoMemRemapCD(1); } PICO_INTERNAL int PicoResetMCD(void) diff --git a/pico/memory.c b/pico/memory.c index 11de641..13fc67e 100644 --- a/pico/memory.c +++ b/pico/memory.c @@ -21,7 +21,7 @@ unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT]; unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT]; static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr, - void *func_or_mh, int is_func) + const void *func_or_mh, int is_func) { unsigned long addr = (unsigned long)func_or_mh; int mask = (1 << shift) - 1; @@ -49,13 +49,13 @@ static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr } void z80_map_set(unsigned long *map, int start_addr, int end_addr, - void *func_or_mh, int is_func) + const void *func_or_mh, int is_func) { xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func); } void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr, - void *func_or_mh, int is_func) + const void *func_or_mh, int is_func) { xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func); } @@ -144,6 +144,10 @@ static u32 ym2612_read_local_68k(void); static int ym2612_write_local(u32 a, u32 d, int is_from_z80); static void z80_mem_setup(void); +#ifdef _ASM_MEMORY_C +u32 PicoRead8_sram(u32 a); +u32 PicoRead16_sram(u32 a); +#endif #ifdef EMU_CORE_DEBUG u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,}; @@ -172,7 +176,10 @@ void cyclone_crashed(u32 pc, struct Cyclone *context) // ----------------------------------------------------------------- // memmap helpers -static int PadRead(int i) +#ifndef _ASM_MEMORY_C +static +#endif +int PadRead(int i) { int pad,value,data_reg; pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU @@ -204,6 +211,8 @@ static int PadRead(int i) return value; // will mirror later } +#ifndef _ASM_MEMORY_C + static u32 io_ports_read(u32 a) { u32 d; @@ -233,7 +242,9 @@ static void NOINLINE io_ports_write(u32 a, u32 d) Pico.ioports[a] = d; } -static void NOINLINE ctl_write_z80busreq(u32 d) +#endif // _ASM_MEMORY_C + +void NOINLINE ctl_write_z80busreq(u32 d) { d&=1; d^=1; elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc); @@ -253,7 +264,7 @@ static void NOINLINE ctl_write_z80busreq(u32 d) } } -static void NOINLINE ctl_write_z80reset(u32 d) +void NOINLINE ctl_write_z80reset(u32 d) { d&=1; d^=1; elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc); @@ -277,6 +288,8 @@ static void NOINLINE ctl_write_z80reset(u32 d) // ----------------------------------------------------------------- +#ifndef _ASM_MEMORY_C + // cart (save) RAM area (usually 0x200000 - ...) static u32 PicoRead8_sram(u32 a) { @@ -322,6 +335,8 @@ static u32 PicoRead16_sram(u32 a) return m68k_unmapped_read16(a); } +#endif // _ASM_MEMORY_C + static void PicoWrite8_sram(u32 a, u32 d) { if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) { @@ -415,7 +430,6 @@ static void PicoWrite8_z80(u32 a, u32 d) SN76496Write(d); return; } -#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) if ((a & 0x7f00) == 0x6000) // Z80 BANK register { Pico.m.z80_bank68k >>= 1; @@ -424,7 +438,6 @@ static void PicoWrite8_z80(u32 a, u32 d) elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15); return; } -#endif elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc); } @@ -435,6 +448,8 @@ static void PicoWrite16_z80(u32 a, u32 d) PicoWrite8_z80(a, d >> 8); } +#ifndef _ASM_MEMORY_C + // IO/control area (0xa10000 - 0xa1ffff) u32 PicoRead8_io(u32 a) { @@ -561,6 +576,8 @@ void PicoWrite16_io(u32 a, u32 d) m68k_unmapped_write16(a, d); } +#endif // _ASM_MEMORY_C + // VDP area (0xc00000 - 0xdfffff) // TODO: verify if lower byte goes to PSG on word writes static u32 PicoRead8_vdp(u32 a) diff --git a/pico/memory.h b/pico/memory.h index a143047..ec7873f 100644 --- a/pico/memory.h +++ b/pico/memory.h @@ -20,9 +20,9 @@ extern unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT]; extern unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT]; void z80_map_set(unsigned long *map, int start_addr, int end_addr, - void *func_or_mh, int is_func); + const void *func_or_mh, int is_func); void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr, - void *func_or_mh, int is_func); + const void *func_or_mh, int is_func); void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub); void m68k_map_unmap(int start_addr, int end_addr); diff --git a/pico/memory_amips.s b/pico/memory_amips.s index 34d3673..4ff400b 100644 --- a/pico/memory_amips.s +++ b/pico/memory_amips.s @@ -2,6 +2,7 @@ # memory handlers with banking support for SSF II - The New Challengers # mostly based on Gens code +# OUT OF DATE # (c) Copyright 2007, Grazvydas "notaz" Ignotas # All Rights Reserved diff --git a/pico/memory_arm.s b/pico/memory_arm.s index b2359db..e2b5990 100644 --- a/pico/memory_arm.s +++ b/pico/memory_arm.s @@ -1,359 +1,74 @@ @ vim:filetype=armasm -@ memory handlers with banking support for SSF II - The New Challengers -@ mostly based on Gens code - -@ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas +@ (c) Copyright 2006-2009, Grazvydas "notaz" Ignotas @ All Rights Reserved -.include "port_config.s" - -.text -.align 4 - -@ default jump tables - -m_read8_def_table: - .long m_read8_rom0 @ 0x000000 - 0x07FFFF - .long m_read8_rom1 @ 0x080000 - 0x0FFFFF - .long m_read8_rom2 @ 0x100000 - 0x17FFFF - .long m_read8_rom3 @ 0x180000 - 0x1FFFFF - .long m_read8_rom4 @ 0x200000 - 0x27FFFF - .long m_read8_rom5 @ 0x280000 - 0x2FFFFF - .long m_read8_rom6 @ 0x300000 - 0x37FFFF - .long m_read8_rom7 @ 0x380000 - 0x3FFFFF - .long m_read8_rom8 @ 0x400000 - 0x47FFFF - for all those large ROM hacks - .long m_read8_rom9 @ 0x480000 - 0x4FFFFF - .long m_read8_romA @ 0x500000 - 0x57FFFF - .long m_read8_romB @ 0x580000 - 0x5FFFFF - .long m_read8_romC @ 0x600000 - 0x67FFFF - .long m_read8_romD @ 0x680000 - 0x6FFFFF - .long m_read8_romE @ 0x700000 - 0x77FFFF - .long m_read8_romF @ 0x780000 - 0x7FFFFF - .long m_read8_rom10 @ 0x800000 - 0x87FFFF - .long m_read8_rom11 @ 0x880000 - 0x8FFFFF - .long m_read8_rom12 @ 0x900000 - 0x97FFFF - .long m_read8_rom13 @ 0x980000 - 0x9FFFFF - .long m_read8_misc @ 0xA00000 - 0xA7FFFF - .long m_read_null @ 0xA80000 - 0xAFFFFF - .long m_read_null @ 0xB00000 - 0xB7FFFF - .long m_read_null @ 0xB80000 - 0xBFFFFF - .long m_read8_vdp @ 0xC00000 - 0xC7FFFF - .long m_read8_vdp @ 0xC80000 - 0xCFFFFF - .long m_read8_vdp @ 0xD00000 - 0xD7FFFF - .long m_read8_vdp @ 0xD80000 - 0xDFFFFF - .long m_read8_ram @ 0xE00000 - 0xE7FFFF - .long m_read8_ram @ 0xE80000 - 0xEFFFFF - .long m_read8_ram @ 0xF00000 - 0xF7FFFF - .long m_read8_ram @ 0xF80000 - 0xFFFFFF - -m_read16_def_table: - .long m_read16_rom0 @ 0x000000 - 0x07FFFF - .long m_read16_rom1 @ 0x080000 - 0x0FFFFF - .long m_read16_rom2 @ 0x100000 - 0x17FFFF - .long m_read16_rom3 @ 0x180000 - 0x1FFFFF - .long m_read16_rom4 @ 0x200000 - 0x27FFFF - .long m_read16_rom5 @ 0x280000 - 0x2FFFFF - .long m_read16_rom6 @ 0x300000 - 0x37FFFF - .long m_read16_rom7 @ 0x380000 - 0x3FFFFF - .long m_read16_rom8 @ 0x400000 - 0x47FFFF - .long m_read16_rom9 @ 0x480000 - 0x4FFFFF - .long m_read16_romA @ 0x500000 - 0x57FFFF - .long m_read16_romB @ 0x580000 - 0x5FFFFF - .long m_read16_romC @ 0x600000 - 0x67FFFF - .long m_read16_romD @ 0x680000 - 0x6FFFFF - .long m_read16_romE @ 0x700000 - 0x77FFFF - .long m_read16_romF @ 0x780000 - 0x7FFFFF - .long m_read16_rom10 @ 0x800000 - 0x87FFFF - .long m_read16_rom11 @ 0x880000 - 0x8FFFFF - .long m_read16_rom12 @ 0x900000 - 0x97FFFF - .long m_read16_rom13 @ 0x980000 - 0x9FFFFF - .long m_read16_misc @ 0xA00000 - 0xA7FFFF - .long m_read_null @ 0xA80000 - 0xAFFFFF - .long m_read_null @ 0xB00000 - 0xB7FFFF - .long m_read_null @ 0xB80000 - 0xBFFFFF - .long m_read16_vdp @ 0xC00000 - 0xC7FFFF - .long m_read16_vdp @ 0xC80000 - 0xCFFFFF - .long m_read16_vdp @ 0xD00000 - 0xD7FFFF - .long m_read16_vdp @ 0xD80000 - 0xDFFFFF - .long m_read16_ram @ 0xE00000 - 0xE7FFFF - .long m_read16_ram @ 0xE80000 - 0xEFFFFF - .long m_read16_ram @ 0xF00000 - 0xF7FFFF - .long m_read16_ram @ 0xF80000 - 0xFFFFFF - -m_read32_def_table: - .long m_read32_rom0 @ 0x000000 - 0x07FFFF - .long m_read32_rom1 @ 0x080000 - 0x0FFFFF - .long m_read32_rom2 @ 0x100000 - 0x17FFFF - .long m_read32_rom3 @ 0x180000 - 0x1FFFFF - .long m_read32_rom4 @ 0x200000 - 0x27FFFF - .long m_read32_rom5 @ 0x280000 - 0x2FFFFF - .long m_read32_rom6 @ 0x300000 - 0x37FFFF - .long m_read32_rom7 @ 0x380000 - 0x3FFFFF - .long m_read32_rom8 @ 0x400000 - 0x47FFFF - .long m_read32_rom9 @ 0x480000 - 0x4FFFFF - .long m_read32_romA @ 0x500000 - 0x57FFFF - .long m_read32_romB @ 0x580000 - 0x5FFFFF - .long m_read32_romC @ 0x600000 - 0x67FFFF - .long m_read32_romD @ 0x680000 - 0x6FFFFF - .long m_read32_romE @ 0x700000 - 0x77FFFF - .long m_read32_romF @ 0x780000 - 0x7FFFFF - .long m_read32_rom10 @ 0x800000 - 0x87FFFF - .long m_read32_rom11 @ 0x880000 - 0x8FFFFF - .long m_read32_rom12 @ 0x900000 - 0x97FFFF - .long m_read32_rom13 @ 0x980000 - 0x9FFFFF - .long m_read32_misc @ 0xA00000 - 0xA7FFFF - .long m_read_null @ 0xA80000 - 0xAFFFFF - .long m_read_null @ 0xB00000 - 0xB7FFFF - .long m_read_null @ 0xB80000 - 0xBFFFFF - .long m_read32_vdp @ 0xC00000 - 0xC7FFFF - .long m_read32_vdp @ 0xC80000 - 0xCFFFFF - .long m_read32_vdp @ 0xD00000 - 0xD7FFFF - .long m_read32_vdp @ 0xD80000 - 0xDFFFFF - .long m_read32_ram @ 0xE00000 - 0xE7FFFF - .long m_read32_ram @ 0xE80000 - 0xEFFFFF - .long m_read32_ram @ 0xF00000 - 0xF7FFFF - .long m_read32_ram @ 0xF80000 - 0xFFFFFF - - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -.bss -.align 4 -@.section .bss, "brw" -@.data - -@ used tables -m_read8_table: - .skip 32*4 - -m_read16_table: - .skip 32*4 - -m_read32_table: - .skip 32*4 +@@ .include "port_config.s" - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ +.equ SRR_MAPPED, (1 << 0) +.equ SRR_READONLY, (1 << 1) +.equ SRF_EEPROM, (1 << 1) +.equ POPT_6BTN_PAD, (1 << 5) +.equ POPT_DIS_32X, (1 << 20) .text .align 4 -.global PicoMemReset -.global PicoRead8 -.global PicoRead16 -.global PicoRead32 -.global PicoWrite8 -.global PicoWriteRomHW_SSF2 -.global m_m68k_read8_misc -.global m_m68k_write8_misc - - -PicoMemReset: - ldr r12,=(Pico+0x22204) - ldr r12,[r12] @ romsize - add r12,r12,#0x80000 - sub r12,r12,#1 - mov r12,r12,lsr #19 - - ldr r0, =m_read8_table - ldr r1, =m_read8_def_table - mov r2, #32 -1: - ldr r3, [r1], #4 - str r3, [r0], #4 - subs r2, r2, #1 - bne 1b - - ldr r0, =m_read16_table - ldr r1, =m_read16_def_table - mov r2, #32 -1: - subs r2, r2, #1 - ldr r3, [r1], #4 - str r3, [r0], #4 - bne 1b - - ldr r0, =m_read32_table - ldr r1, =m_read32_def_table - mov r2, #32 -1: - subs r2, r2, #1 - ldr r3, [r1], #4 - str r3, [r0], #4 - bne 1b - - @ update memhandlers according to ROM size - ldr r1, =m_read8_above_rom - ldr r0, =m_read8_table - mov r2, #20 -1: - sub r2, r2, #1 - cmp r2, r12 - blt 2f - cmp r2, #4 - beq 1b @ do not touch the SRAM area - str r1, [r0, r2, lsl #2] - b 1b -2: - ldr r1, =m_read16_above_rom - ldr r0, =m_read16_table - mov r2, #20 -1: - sub r2, r2, #1 - cmp r2, r12 - blt 2f - cmp r2, #4 - beq 1b - str r1, [r0, r2, lsl #2] - b 1b -2: - ldr r1, =m_read32_above_rom - ldr r0, =m_read32_table - mov r2, #20 -1: - sub r2, r2, #1 - cmp r2, r12 - blt 2f - cmp r2, #4 - beq 1b - str r1, [r0, r2, lsl #2] - b 1b -2: - bx lr - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -PicoRead8: @ u32 a - ldr r2, =m_read8_table - bic r0, r0, #0xff000000 - and r1, r0, #0x00f80000 - ldr pc, [r2, r1, lsr #17] - -PicoRead16: @ u32 a - ldr r2, =m_read16_table - bic r0, r0, #0xff000000 - and r1, r0, #0x00f80000 - ldr pc, [r2, r1, lsr #17] - -PicoRead32: @ u32 a - ldr r2, =m_read32_table - bic r0, r0, #0xff000000 - and r1, r0, #0x00f80000 - ldr pc, [r2, r1, lsr #17] - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -m_read_null: - mov r0, #0 - bx lr - - -.macro m_read8_rom sect - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xf80000 - ldr r1, [r1] -.if \sect - orr r0, r0, #0x080000*\sect -.endif - eor r0, r0, #1 - ldrb r0, [r1, r0] - bx lr -.endm - - -m_read8_rom0: @ 0x000000 - 0x07ffff - m_read8_rom 0 - -m_read8_rom1: @ 0x080000 - 0x0fffff - m_read8_rom 1 - -m_read8_rom2: @ 0x100000 - 0x17ffff - m_read8_rom 2 +.global PicoRead8_sram +.global PicoRead8_io +.global PicoRead16_sram +.global PicoRead16_io +.global PicoWrite8_io +.global PicoWrite16_io -m_read8_rom3: @ 0x180000 - 0x1fffff - m_read8_rom 3 - -m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area +PicoRead8_sram: @ u32 a, u32 d ldr r2, =(SRam) ldr r3, =(Pico+0x22200) ldr r1, [r2, #8] @ SRam.end - bic r0, r0, #0xf80000 - orr r0, r0, #0x200000 cmp r0, r1 - bgt m_read8_nosram + bge m_read8_nosram ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read8_nosram ldrb r1, [r3, #0x11] @ Pico.m.sram_reg - tst r1, #5 - bne SRAMRead + tst r1, #SRR_MAPPED + beq m_read8_nosram + ldr r1, [r2, #0x0c] + tst r1, #SRF_EEPROM + bne m_read8_eeprom + ldr r1, [r2, #4] @ SRam.start + ldr r2, [r2] @ SRam.data + sub r0, r0, r1 + add r0, r0, r2 + ldrb r0, [r0] + bx lr + m_read8_nosram: ldr r1, [r3, #4] @ romsize cmp r0, r1 movgt r0, #0 bxgt lr @ bad location + @ XXX: banking unfriendly ldr r1, [r3] eor r0, r0, #1 ldrb r0, [r1, r0] bx lr -m_read8_rom5: @ 0x280000 - 0x2fffff - m_read8_rom 5 - -m_read8_rom6: @ 0x300000 - 0x37ffff - m_read8_rom 6 - -m_read8_rom7: @ 0x380000 - 0x3fffff - m_read8_rom 7 - -m_read8_rom8: @ 0x400000 - 0x47ffff - m_read8_rom 8 - -m_read8_rom9: @ 0x480000 - 0x4fffff - m_read8_rom 9 - -m_read8_romA: @ 0x500000 - 0x57ffff - m_read8_rom 0xA - -m_read8_romB: @ 0x580000 - 0x5fffff - m_read8_rom 0xB - -m_read8_romC: @ 0x600000 - 0x67ffff - m_read8_rom 0xC - -m_read8_romD: @ 0x680000 - 0x6fffff - m_read8_rom 0xD - -m_read8_romE: @ 0x700000 - 0x77ffff - m_read8_rom 0xE - -m_read8_romF: @ 0x780000 - 0x7fffff - m_read8_rom 0xF - -m_read8_rom10: @ 0x800000 - 0x87ffff - m_read8_rom 0x10 - -m_read8_rom11: @ 0x880000 - 0x8fffff - m_read8_rom 0x11 - -m_read8_rom12: @ 0x900000 - 0x97ffff - m_read8_rom 0x12 +m_read8_eeprom: + stmfd sp!,{r0,lr} + bl EEPROM_read + ldmfd sp!,{r0,lr} + tst r0, #1 + moveq r0, r0, lsr #8 + bx lr -m_read8_rom13: @ 0x980000 - 0x9fffff - m_read8_rom 0x13 +PicoRead8_io: @ u32 a, u32 d + bic r2, r0, #0x001f @ most commonly we get i/o port read, + cmp r2, #0xa10000 @ so check for it first + bne m_read8_not_io -m_m68k_read8_misc: -m_read8_misc: - bic r2, r0, #0x001f @ most commonly we get i/o port read, - cmp r2, #0xa10000 @ so check for it first - bne m_read8_misc2 m_read8_misc_io: ands r0, r0, #0x1e beq m_read8_misc_hwreg @@ -371,458 +86,130 @@ m_read8_misc_hwreg: ldrb r0, [r3, #0x0f] @ Pico.m.hardware bx lr -m_read8_misc2: - mov r2, #0xa10000 @ games also like to poll busreq, - orr r2, r2, #0x001100 @ so we'll try it now - cmp r0, r2 - beq z80ReadBusReq - - and r2, r0, #0xff0000 @ finally it might be - cmp r2, #0xa00000 @ z80 area - bne m_read8_misc3 - tst r0, #0x4000 - beq z80Read8 @ z80 RAM - and r2, r0, #0x6000 - cmp r2, #0x4000 - mvnne r0, #0 - bxne lr @ invalid - b ym2612_read_local_68k - -m_read8_fake_ym2612: +m_read8_not_io: + and r2, r0, #0xfc00 + cmp r2, #0x1000 + bne m_read8_not_brq + ldr r3, =(Pico+0x22200) - ldrb r0, [r3, #8] @ Pico.m.rotate - add r1, r0, #1 - strb r1, [r3, #8] - and r0, r0, #3 - bx lr + mov r1, r0 + ldr r0, [r3, #8] @ Pico.m.rotate + add r0, r0, #1 + strb r0, [r3, #8] + eor r0, r0, r0, lsl #6 -m_read8_misc3: - @ if everything else fails, use generic handler - stmfd sp!,{r0,lr} - bic r0, r0, #1 - mov r1, #8 - bl OtherRead16 - ldmfd sp!,{r1,lr} tst r1, #1 - moveq r0, r0, lsr #8 - bx lr - - -m_read8_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid read - b PicoVideoRead8 - -m_read8_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - eor r0, r0, #1 - ldrb r0, [r1, r0] + bxne lr @ odd addr -> open bus + bic r0, r0, #1 @ bit0 defined in this area + and r2, r1, #0xff00 + cmp r2, #0x1100 + bxne lr @ not busreq + + ldrb r1, [r3, #(8+0x01)] @ Pico.m.z80Run + ldrb r2, [r3, #(8+0x0f)] @ Pico.m.z80_reset + orr r0, r0, r1 + orr r0, r0, r2 bx lr -m_read8_above_rom: - @ might still be SRam (Micro Machines, HardBall '95) - ldr r2, =(SRam) - ldr r3, =(Pico+0x22200) - ldr r1, [r2, #8] @ SRam.end - cmp r0, r1 - bgt m_read8_ar_nosram - ldr r1, [r2, #4] @ SRam.start - cmp r0, r1 - blt m_read8_ar_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg - tst r1, #5 - bne SRAMRead -m_read8_ar_nosram: - ldr r2, =PicoRead16Hook - stmfd sp!,{r0,lr} +m_read8_not_brq: + ldr r2, =PicoOpt ldr r2, [r2] - bic r0, r0, #1 - mov r1, #8 - mov lr, pc - bx r2 - ldmfd sp!,{r1,lr} - tst r1, #1 - moveq r0, r0, lsr #8 + tst r2, #POPT_DIS_32X + beq PicoRead8_32x + mov r0, #0 bx lr -.pool - @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -.macro m_read16_rom sect - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xf80000 - ldr r1, [r1] - bic r0, r0, #1 -.if \sect - orr r0, r0, #0x080000*\sect -.endif - ldrh r0, [r1, r0] - bx lr -.endm - - -m_read16_rom0: @ 0x000000 - 0x07ffff - m_read16_rom 0 - -m_read16_rom1: @ 0x080000 - 0x0fffff - m_read16_rom 1 - -m_read16_rom2: @ 0x100000 - 0x17ffff - m_read16_rom 2 - -m_read16_rom3: @ 0x180000 - 0x1fffff - m_read16_rom 3 - -m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95) +PicoRead16_sram: @ u32 a, u32 d ldr r2, =(SRam) ldr r3, =(Pico+0x22200) ldr r1, [r2, #8] @ SRam.end - bic r0, r0, #0xf80000 - bic r0, r0, #1 - orr r0, r0, #0x200000 cmp r0, r1 - bgt m_read16_nosram + bge m_read16_nosram ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read16_nosram ldrb r1, [r3, #0x11] @ Pico.m.sram_reg - tst r1, #5 + tst r1, #SRR_MAPPED beq m_read16_nosram - stmfd sp!,{lr} - bl SRAMRead16 - ldmfd sp!,{pc} + ldr r1, [r2, #0x0c] + tst r1, #SRF_EEPROM + bne EEPROM_read + ldr r1, [r2, #4] @ SRam.start + ldr r2, [r2] @ SRam.data + sub r0, r0, r1 + add r0, r0, r2 + ldrb r1, [r0], #1 + ldrb r0, [r0] + orr r0, r0, r1, lsl #8 + bx lr + m_read16_nosram: ldr r1, [r3, #4] @ romsize cmp r0, r1 movgt r0, #0 bxgt lr @ bad location - ldr r1, [r3] @ 1ci + @ XXX: banking unfriendly + ldr r1, [r3] ldrh r0, [r1, r0] bx lr -m_read16_rom5: @ 0x280000 - 0x2fffff - m_read16_rom 5 - -m_read16_rom6: @ 0x300000 - 0x37ffff - m_read16_rom 6 - -m_read16_rom7: @ 0x380000 - 0x3fffff - m_read16_rom 7 - -m_read16_rom8: @ 0x400000 - 0x47ffff - m_read16_rom 8 - -m_read16_rom9: @ 0x480000 - 0x4fffff - m_read16_rom 9 -m_read16_romA: @ 0x500000 - 0x57ffff - m_read16_rom 0xA - -m_read16_romB: @ 0x580000 - 0x5fffff - m_read16_rom 0xB - -m_read16_romC: @ 0x600000 - 0x67ffff - m_read16_rom 0xC - -m_read16_romD: @ 0x680000 - 0x6fffff - m_read16_rom 0xD - -m_read16_romE: @ 0x700000 - 0x77ffff - m_read16_rom 0xE - -m_read16_romF: @ 0x780000 - 0x7fffff - m_read16_rom 0xF - -m_read16_rom10: @ 0x800000 - 0x87ffff - m_read16_rom 0x10 - -m_read16_rom11: @ 0x880000 - 0x8fffff - m_read16_rom 0x11 - -m_read16_rom12: @ 0x900000 - 0x97ffff - m_read16_rom 0x12 - -m_read16_rom13: @ 0x980000 - 0x9fffff - m_read16_rom 0x13 - -m_read16_misc: - bic r0, r0, #1 - mov r1, #16 - b OtherRead16 - -m_read16_vdp: - tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000) - tsteq r0, #0x000e0 - bxne lr @ invalid read - bic r0, r0, #1 - b PicoVideoRead - -m_read16_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - ldrh r0, [r1, r0] - bx lr - -m_read16_above_rom: - @ might still be SRam - ldr r2, =(SRam) - ldr r3, =(Pico+0x22200) - ldr r1, [r2, #8] @ SRam.end - bic r0, r0, #1 - cmp r0, r1 - bgt m_read16_ar_nosram - ldr r1, [r2, #4] @ SRam.start - cmp r0, r1 - blt m_read16_ar_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg - tst r1, #5 - beq m_read16_ar_nosram +PicoRead16_io: @ u32 a, u32 d + bic r2, r0, #0x001f @ most commonly we get i/o port read, + cmp r2, #0xa10000 @ so check for it first + bne m_read16_not_io stmfd sp!,{lr} - bl SRAMRead16 + bl m_read8_misc_io @ same as read8 + orr r0, r0, r0, lsl #8 @ only has bytes mirrored ldmfd sp!,{pc} -m_read16_ar_nosram: - ldr r2, =PicoRead16Hook - ldr r2, [r2] - mov r1, #16 - bx r2 - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -.macro m_read32_rom sect - ldr r1, =(Pico+0x22200) - bic r0, r0, #0xf80000 - ldr r1, [r1] - bic r0, r0, #1 -.if \sect - orr r0, r0, #0x080000*\sect -.endif - ldrh r0, [r1, r0]! - ldrh r1, [r1, #2] @ 1ci - orr r0, r1, r0, lsl #16 - bx lr -.endm - - -m_read32_rom0: @ 0x000000 - 0x07ffff - m_read32_rom 0 - -m_read32_rom1: @ 0x080000 - 0x0fffff - m_read32_rom 1 - -m_read32_rom2: @ 0x100000 - 0x17ffff - m_read32_rom 2 -m_read32_rom3: @ 0x180000 - 0x1fffff - m_read32_rom 3 +m_read16_not_io: + and r2, r0, #0xfc00 + cmp r2, #0x1000 + bne m_read16_not_brq -m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?) - ldr r2, =(SRam) ldr r3, =(Pico+0x22200) - ldr r1, [r2, #8] @ SRam.end - bic r0, r0, #0xf80000 - bic r0, r0, #1 - orr r0, r0, #0x200000 - cmp r0, r1 - bgt m_read32_nosram - ldr r1, [r2, #4] @ SRam.start - cmp r0, r1 - blt m_read32_nosram - ldrb r1, [r3, #0x11] @ Pico.m.sram_reg - tst r1, #5 - beq m_read32_nosram - stmfd sp!,{r0,lr} - bl SRAMRead16 - ldmfd sp!,{r1,lr} - stmfd sp!,{r0,lr} - add r0, r1, #2 - bl SRAMRead16 - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr -m_read32_nosram: - ldr r1, [r3, #4] @ romsize - cmp r0, r1 - movgt r0, #0 - bxgt lr @ bad location - ldr r1, [r3] @ (1ci) - ldrh r0, [r1, r0]! - ldrh r1, [r1, #2] @ (2ci) - orr r0, r1, r0, lsl #16 + and r2, r0, #0xff00 + ldr r0, [r3, #8] @ Pico.m.rotate + add r0, r0, #1 + strb r0, [r3, #8] + eor r0, r0, r0, lsl #5 + eor r0, r0, r0, lsl #8 + bic r0, r0, #0x100 @ bit8 defined in this area + cmp r2, #0x1100 + bxne lr @ not busreq + + ldrb r1, [r3, #(8+0x01)] @ Pico.m.z80Run + ldrb r2, [r3, #(8+0x0f)] @ Pico.m.z80_reset + orr r0, r0, r1, lsl #8 + orr r0, r0, r2, lsl #8 bx lr -m_read32_rom5: @ 0x280000 - 0x2fffff - m_read32_rom 5 - -m_read32_rom6: @ 0x300000 - 0x37ffff - m_read32_rom 6 - -m_read32_rom7: @ 0x380000 - 0x3fffff - m_read32_rom 7 - -m_read32_rom8: @ 0x400000 - 0x47ffff - m_read32_rom 8 - -m_read32_rom9: @ 0x480000 - 0x4fffff - m_read32_rom 9 - -m_read32_romA: @ 0x500000 - 0x57ffff - m_read32_rom 0xA - -m_read32_romB: @ 0x580000 - 0x5fffff - m_read32_rom 0xB - -m_read32_romC: @ 0x600000 - 0x67ffff - m_read32_rom 0xC - -m_read32_romD: @ 0x680000 - 0x6fffff - m_read32_rom 0xD - -m_read32_romE: @ 0x700000 - 0x77ffff - m_read32_rom 0xE - -m_read32_romF: @ 0x780000 - 0x7fffff - m_read32_rom 0xF - -m_read32_rom10: @ 0x800000 - 0x87ffff - m_read32_rom 0x10 - -m_read32_rom11: @ 0x880000 - 0x8fffff - m_read32_rom 0x11 - -m_read32_rom12: @ 0x900000 - 0x97ffff - m_read32_rom 0x12 - -m_read32_rom13: @ 0x980000 - 0x9fffff - m_read32_rom 0x13 - -m_read32_misc: - bic r0, r0, #1 - stmfd sp!,{r0,lr} - mov r1, #32 - bl OtherRead16 - mov r1, r0 - ldmfd sp!,{r0} - stmfd sp!,{r1} - add r0, r0, #2 - mov r1, #32 - bl OtherRead16 - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - -m_read32_vdp: - tst r0, #0x70000 - tsteq r0, #0x000e0 - bxne lr @ invalid read - bic r0, r0, #1 - add r1, r0, #2 - stmfd sp!,{r1,lr} - bl PicoVideoRead - swp r0, r0, [sp] - bl PicoVideoRead - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - -m_read32_ram: - ldr r1, =Pico - bic r0, r0, #0xff0000 - bic r0, r0, #1 - ldrh r0, [r1, r0]! - ldrh r1, [r1, #2] @ 2ci - orr r0, r1, r0, lsl #16 - bx lr - -m_read32_above_rom: - ldr r2, =PicoRead16Hook - bic r0, r0, #1 +m_read16_not_brq: + ldr r2, =PicoOpt ldr r2, [r2] - mov r1, #32 - stmfd sp!,{r0,r2,lr} - mov lr, pc - bx r2 - mov r1, r0 - ldmfd sp!,{r0,r2} - stmfd sp!,{r1} - add r0, r0, #2 - mov r1, #32 - mov lr, pc - bx r2 - ldmfd sp!,{r1,lr} - orr r0, r0, r1, lsl #16 - bx lr - -.pool - -@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ - -PicoWriteRomHW_SSF2: @ u32 a, u32 d - and r0, r0, #0xe - movs r0, r0, lsr #1 - bne pwr_banking - - @ sram register - ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg - ldrb r0, [r2] - and r1, r1, #3 - bic r0, r0, #3 - orr r0, r0, r1 - strb r0, [r2] - bx lr - -pwr_banking: - and r1, r1, #0x1f - - ldr r3, =m_read8_def_table - ldr r2, =m_read8_table - ldr r12, [r3, r1, lsl #2] - str r12, [r2, r0, lsl #2] - - ldr r3, =m_read16_def_table - ldr r2, =m_read16_table - ldr r12, [r3, r1, lsl #2] - str r12, [r2, r0, lsl #2] - - ldr r3, =m_read32_def_table - ldr r2, =m_read32_table - ldr r12, [r3, r1, lsl #2] - str r12, [r2, r0, lsl #2] - + tst r2, #POPT_DIS_32X + beq PicoRead16_32x + mov r0, #0 bx lr @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -@ Here we only handle most often used locations, -@ everything else is passed to generic handlers +PicoWrite8_io: @ u32 a, u32 d + bic r2, r0, #0x1e @ most commonly we get i/o port write, + eor r2, r2, #0xa10000 @ so check for it first + eors r2, r2, #1 + bne m_write8_not_io -PicoWrite8: @ u32 a, u8 d - bic r0, r0, #0xff000000 - and r2, r0, #0x00e00000 - cmp r2, #0x00e00000 @ RAM? - ldr r3, =Pico - biceq r0, r0, #0x00ff0000 - eoreq r0, r0, #1 - streqb r1, [r3, r0] - bxeq lr - -m_m68k_write8_misc: - bic r2, r0, #0x1f @ most commonly we get i/o port write, - cmp r2, #0xa10000 @ so check for it first - bne m_write8_misc2 m_write8_io: ldr r2, =PicoOpt and r0, r0, #0x1e ldr r2, [r2] ldr r3, =(Pico+0x22000) @ Pico.ioports - tst r2, #0x20 @ 6 button pad? - streqb r1, [r3, r0, lsr #1] - bxeq lr + tst r2, #POPT_6BTN_PAD + beq m_write8_io_done cmp r0, #2 cmpne r0, #4 bne m_write8_io_done @ not likely to happen @@ -846,80 +233,74 @@ m_write8_io_done: strb r1, [r3, r0, lsr #1] bx lr - -m_write8_misc2: - and r2, r0, #0xff0000 - cmp r2, #0xa00000 @ z80 area? - bne m_write8_not_z80 - tst r0, #0x4000 - bne m_write8_z80_not_ram - ldr r3, =(Pico+0x20000) @ Pico.zram - add r2, r3, #0x02200 @ Pico+0x22200 - ldrb r2, [r2, #9] @ Pico.m.z80Run - bic r0, r0, #0xff0000 - bic r0, r0, #0x00e000 - tst r2, #1 - ldr r2, =SekCycleCnt - streqb r1, [r3, r0] @ zram - ldr r0, [r2] - add r0, r0, #2 @ hack? - str r0, [r2] +m_write8_not_io: + tst r0, #1 + bne m_write8_not_z80ctl @ even addrs only + and r2, r0, #0xff00 + cmp r2, #0x1100 + moveq r0, r1 + beq ctl_write_z80busreq + cmp r2, #0x1200 + moveq r0, r1 + beq ctl_write_z80reset + +m_write8_not_z80ctl: + @ unlikely + eor r2, r0, #0xa10000 + eor r2, r2, #0x003000 + eors r2, r2, #0x0000f1 + bne m_write8_not_sreg + ldr r3, =(Pico+0x22200) + ldrb r2, [r3, #(8+9)] @ Pico.m.sram_reg + and r1, r1, #(SRR_MAPPED|SRR_READONLY) + bic r2, r2, #(SRR_MAPPED|SRR_READONLY) + orr r2, r2, r1 + strb r2, [r3, #(8+9)] bx lr -m_write8_z80_not_ram: - and r2, r0, #0x6000 - cmp r2, #0x4000 - bne m_write8_z80_not_ym2612 - ldr r3, =PicoOpt - and r0, r0, #3 - ldr r3, [r3] - mov r2, #0 @ is_from_z80 = 0 - tst r3, #1 - bxeq lr - stmfd sp!,{lr} - and r1, r1, #0xff - bl ym2612_write_local - ldr r2, =emustatus - ldmfd sp!,{lr} - ldr r1, [r2] - and r0, r0, #1 - orr r1, r0, r1 - str r1, [r2] @ emustatus|=ym2612_write_local(a&3, d); +m_write8_not_sreg: + ldr r2, =PicoOpt + ldr r2, [r2] + tst r2, #POPT_DIS_32X + beq PicoWrite8_32x bx lr -m_write8_z80_not_ym2612: @ not too likely - mov r2, r0, lsl #17 - bic r2, r2, #6<<17 - mov r3, #0x7f00 - orr r3, r3, #0x0011 - cmp r3, r2, lsr #17 @ psg @ z80 area? - beq m_write8_psg - and r2, r0, #0x7f00 - cmp r2, #0x6000 @ bank register? - bxne lr @ invalid write - -m_write8_z80_bank_reg: - ldr r3, =(Pico+0x22208) @ Pico.m - ldrh r2, [r3, #0x0a] - mov r1, r1, lsl #8 - orr r2, r1, r2, lsr #1 - bic r2, r2, #0xfe00 - strh r2, [r3, #0x0a] - bx lr +@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ +PicoWrite16_io: @ u32 a, u32 d + bic r2, r0, #0x1f @ most commonly we get i/o port write, + cmp r2, #0xa10000 @ so check for it first + beq m_write8_io + +m_write16_not_io: + and r2, r0, #0xff00 + cmp r2, #0x1100 + moveq r0, r1, lsr #8 + beq ctl_write_z80busreq + cmp r2, #0x1200 + moveq r0, r1, lsr #8 + beq ctl_write_z80reset + +m_write16_not_z80ctl: + @ unlikely + eor r2, r0, #0xa10000 + eor r2, r2, #0x003000 + eors r2, r2, #0x0000f0 + bne m_write16_not_sreg + ldr r3, =(Pico+0x22200) + ldrb r2, [r3, #(8+9)] @ Pico.m.sram_reg + and r1, r1, #(SRR_MAPPED|SRR_READONLY) + bic r2, r2, #(SRR_MAPPED|SRR_READONLY) + orr r2, r2, r1 + strb r2, [r3, #(8+9)] + bx lr -m_write8_not_z80: - and r2, r0, #0xe70000 - cmp r2, #0xc00000 @ VDP area? - bne OtherWrite8 @ passthrough - and r2, r0, #0xf9 - cmp r2, #0x11 - bne OtherWrite8 -m_write8_psg: +m_write16_not_sreg: ldr r2, =PicoOpt - and r0, r1, #0xff ldr r2, [r2] - tst r2, #2 - bxeq lr - b SN76496Write + tst r2, #POPT_DIS_32X + beq PicoWrite16_32x + bx lr + +.pool diff --git a/pico/pico_int.h b/pico/pico_int.h index 55da526..3cdd997 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -259,7 +259,7 @@ struct PicoMisc unsigned short z80_bank68k; // 0a unsigned short pad0; unsigned char pad1; - unsigned char z80_reset; // z80 reset held + unsigned char z80_reset; // 0f z80 reset held unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay unsigned short eeprom_addr; // EEPROM address register unsigned char eeprom_cycle; // EEPROM cycle number @@ -482,8 +482,7 @@ PICO_INTERNAL void PicoMemSetupPico(void); // cd/memory.c PICO_INTERNAL void PicoMemSetupCD(void); -PICO_INTERNAL_ASM void PicoMemRemapCD(int r3); -PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3); +void PicoMemStateLoaded(void); // pico.c extern struct Pico Pico; diff --git a/platform/gp2x/Makefile b/platform/gp2x/Makefile index 7b827b5..329da36 100644 --- a/platform/gp2x/Makefile +++ b/platform/gp2x/Makefile @@ -3,12 +3,12 @@ export CROSS = arm-linux- # settings #mz80 = 1 #debug_cyclone = 1 -#asm_memory = 1 # TODO +asm_memory = 1 asm_render = 1 asm_ym2612 = 1 asm_misc = 1 asm_cdpico = 1 -#asm_cdmemory = 1 # TODO +asm_cdmemory = 1 amalgamate = 0 #profile = 1 #use_musashi = 1 -- 2.39.2