From 05138bbd89ff0006119070a817d49a5a23e8034c Mon Sep 17 00:00:00 2001 From: kub Date: Wed, 19 Jan 2022 17:09:55 +0000 Subject: [PATCH] sh2 drc, fixes for mips, ppc, i386 backends (mostly 64 bit related) --- cpu/drc/emit_arm.c | 2 +- cpu/drc/emit_arm64.c | 2 +- cpu/drc/emit_mips.c | 26 ++++++++++++++------------ cpu/drc/emit_ppc.c | 6 +++--- cpu/drc/emit_riscv.c | 2 +- cpu/drc/emit_x86.c | 2 +- cpu/sh2/compiler.c | 14 ++++++++------ cpu/sh2/sh2.c | 2 ++ 8 files changed, 31 insertions(+), 25 deletions(-) diff --git a/cpu/drc/emit_arm.c b/cpu/drc/emit_arm.c index 2e5a1bb5..d83aae21 100644 --- a/cpu/drc/emit_arm.c +++ b/cpu/drc/emit_arm.c @@ -1288,7 +1288,7 @@ static inline void emith_pool_adjust(int tcache_offs, int move_offs) emith_lsr(func, a, SH2_WRITE_SHIFT); \ EOP_LDR_REG_LSL(A_COND_AL,func,tab,func,2); \ emith_move_r_r(2, CONTEXT_REG); /* arg2 */ \ - emith_jump_reg(func); \ + emith_abijump_reg(func); \ } while (0) #define emith_sh2_dtbf_loop() do { \ diff --git a/cpu/drc/emit_arm64.c b/cpu/drc/emit_arm64.c index 089cfdb2..cb2546dc 100644 --- a/cpu/drc/emit_arm64.c +++ b/cpu/drc/emit_arm64.c @@ -1225,7 +1225,7 @@ static void emith_ldst_offs(int sz, int rd, int rn, int o9, int ld, int mode) emith_lsl(func, func, 3); \ emith_read_r_r_r_ptr(func, tab, func); \ emith_move_r_r_ptr(2, CONTEXT_REG); /* arg2 */ \ - emith_jump_reg(func); \ + emith_abijump_reg(func); \ } while (0) #define emith_sh2_delay_loop(cycles, reg) do { \ diff --git a/cpu/drc/emit_mips.c b/cpu/drc/emit_mips.c index e98073d7..35d928e3 100644 --- a/cpu/drc/emit_mips.c +++ b/cpu/drc/emit_mips.c @@ -73,7 +73,7 @@ enum { OP_ADDI=010, OP_ADDIU, OP_SLTI, OP_SLTIU, OP_ANDI, OP_ORI, OP_XORI, OP_LU enum { OP_DADDI=030, OP_DADDIU, OP_LDL, OP_LDR, OP__FN2=034, OP__FN3=037 }; enum { OP_LB=040, OP_LH, OP_LWL, OP_LW, OP_LBU, OP_LHU, OP_LWR, OP_LWU }; enum { OP_SB=050, OP_SH, OP_SWL, OP_SW, OP_SDL, OP_SDR, OP_SWR }; -enum { OP_SD=067, OP_LD=077 }; +enum { OP_LD=067, OP_SD=077 }; // function field (encoded in fn if opcode = OP__FN) enum { FN_SLL=000, __(01), FN_SRL, FN_SRA, FN_SLLV, __(05), FN_SRLV, FN_SRAV }; enum { FN_JR=010, FN_JALR, FN_MOVZ, FN_MOVN, FN_SYNC=017 }; @@ -693,6 +693,8 @@ static void emith_set_compare_flags(int rs, int rt, s32 imm) #define emith_eor_r_r_lsr(d, s, lsrimm) \ emith_eor_r_r_r_lsr(d, d, s, lsrimm) +#define emith_add_r_r_r_ptr(d, s1, s2) \ + emith_add_r_r_r_lsl_ptr(d, s1, s2, 0) #define emith_add_r_r_r(d, s1, s2) \ emith_add_r_r_r_lsl(d, s1, s2, 0) @@ -840,7 +842,7 @@ static void emith_move_imm(int r, uintptr_t imm) emith_move_imm(r, (uintptr_t)(imm)) #define emith_move_r_imm(r, imm) \ - emith_move_imm(r, (u32)(imm)) + emith_move_imm(r, (s32)(imm)) #define emith_move_r_imm_c(cond, r, imm) \ emith_move_r_imm(r, imm) @@ -1185,12 +1187,12 @@ static void emith_lohi_nops(void) emith_read_r_r_offs(r, rs, offs) #define emith_read_r_r_r_ptr(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_OP_IMM(OP_LP, r, AT, 0)); \ } while (0) #define emith_read_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_LW(r, AT, 0)); \ } while (0) #define emith_read_r_r_r_c(cond, r, rs, rm) \ @@ -1202,7 +1204,7 @@ static void emith_lohi_nops(void) emith_read8_r_r_offs(r, rs, offs) #define emith_read8_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_LBU(r, AT, 0)); \ } while (0) #define emith_read8_r_r_r_c(cond, r, rs, rm) \ @@ -1214,7 +1216,7 @@ static void emith_lohi_nops(void) emith_read16_r_r_offs(r, rs, offs) #define emith_read16_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_LHU(r, AT, 0)); \ } while (0) #define emith_read16_r_r_r_c(cond, r, rs, rm) \ @@ -1226,7 +1228,7 @@ static void emith_lohi_nops(void) emith_read8s_r_r_offs(r, rs, offs) #define emith_read8s_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_LB(r, AT, 0)); \ } while (0) #define emith_read8s_r_r_r_c(cond, r, rs, rm) \ @@ -1238,7 +1240,7 @@ static void emith_lohi_nops(void) emith_read16s_r_r_offs(r, rs, offs) #define emith_read16s_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_LH(r, AT, 0)); \ } while (0) #define emith_read16s_r_r_r_c(cond, r, rs, rm) \ @@ -1251,7 +1253,7 @@ static void emith_lohi_nops(void) emith_write_r_r_offs_ptr(r, rs, offs) #define emith_write_r_r_r_ptr(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_OP_IMM(OP_SP, r, AT, 0)); \ } while (0) #define emith_write_r_r_r_ptr_c(cond, r, rs, rm) \ @@ -1263,7 +1265,7 @@ static void emith_lohi_nops(void) emith_write_r_r_offs(r, rs, offs) #define emith_write_r_r_r(r, rs, rm) do { \ - emith_add_r_r_r(AT, rs, rm); \ + emith_add_r_r_r_ptr(AT, rs, rm); \ EMIT(MIPS_SW(r, AT, 0)); \ } while (0) #define emith_write_r_r_r_c(cond, r, rs, rm) \ @@ -1643,9 +1645,9 @@ static NOINLINE void host_instructions_updated(void *base, void *end, int force) #define emith_sh2_wcall(a, val, tab, func) do { \ emith_lsr(func, a, SH2_WRITE_SHIFT); \ emith_lsl(func, func, PTR_SCALE); \ - emith_read_r_r_r_ptr(func, tab, func); \ + emith_read_r_r_r_ptr(CR, tab, func); \ emith_move_r_r_ptr(6, CONTEXT_REG); /* arg2 */ \ - emith_abijump_reg(func); \ + emith_abijump_reg(CR); \ } while (0) #define emith_sh2_delay_loop(cycles, reg) do { \ diff --git a/cpu/drc/emit_ppc.c b/cpu/drc/emit_ppc.c index 0b4f0649..db52c9ae 100644 --- a/cpu/drc/emit_ppc.c +++ b/cpu/drc/emit_ppc.c @@ -1449,7 +1449,7 @@ static int emith_cond_check(int cond) #define emith_jump_cond_inrange(target) \ ((u8 *)target - (u8 *)tcache_ptr < 0x8000 && \ - (u8 *)target - (u8 *)tcache_ptr >= -0x8000+0x10) //mind cond_check + (u8 *)target - (u8 *)tcache_ptr >= -0x8000+0x14) //mind cond_check // NB: returns position of patch for cache maintenance #define emith_jump_patch(ptr, target, pos) do { \ @@ -1631,9 +1631,9 @@ static NOINLINE void host_instructions_updated(void *base, void *end, int force) #define emith_sh2_wcall(a, val, tab, func) do { \ emith_lsr(func, a, SH2_WRITE_SHIFT); \ emith_lsl(func, func, PTR_SCALE); \ - emith_read_r_r_r_ptr(func, tab, func); \ + emith_read_r_r_r_ptr(CR, tab, func); \ emith_move_r_r_ptr(5, CONTEXT_REG); /* arg2 */ \ - emith_jump_reg(func); \ + emith_abijump_reg(CR); \ } while (0) #define emith_sh2_delay_loop(cycles, reg) do { \ diff --git a/cpu/drc/emit_riscv.c b/cpu/drc/emit_riscv.c index 7b4eb2a8..04121772 100644 --- a/cpu/drc/emit_riscv.c +++ b/cpu/drc/emit_riscv.c @@ -1466,7 +1466,7 @@ static int emith_cond_check(int cond, int *r, int *s) emith_lsl(func, func, PTR_SCALE); \ emith_read_r_r_r_ptr(func, tab, func); \ emith_move_r_r_ptr(12, CONTEXT_REG); /* arg2 */ \ - emith_jump_reg(func); \ + emith_abijump_reg(func); \ } while (0) #define emith_sh2_delay_loop(cycles, reg) do { \ diff --git a/cpu/drc/emit_x86.c b/cpu/drc/emit_x86.c index 3ef2ed62..06612710 100644 --- a/cpu/drc/emit_x86.c +++ b/cpu/drc/emit_x86.c @@ -1229,7 +1229,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI, // x86-64,i386 common EMIT_OP_MODRM64(0x8b, 0, func, 4); \ EMIT_SIB64(PTR_SCALE, func, tab); /* mov tmp, [tab + tmp * {4,8}] */ \ emith_move_r_r_ptr(arg2_, CONTEXT_REG); \ - emith_jump_reg(func); \ + emith_abijump_reg(func); \ } while (0) #define emith_sh2_dtbf_loop() do { \ diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c index 7e622cda..9c791b69 100644 --- a/cpu/sh2/compiler.c +++ b/cpu/sh2/compiler.c @@ -49,7 +49,7 @@ #define LOOP_DETECTION 1 #define LOOP_OPTIMIZER 1 #define T_OPTIMIZER 1 -#define DIV_OPTIMIZER 0 +#define DIV_OPTIMIZER 1 #define MAX_LITERAL_OFFSET 0x200 // max. MOVA, MOV @(PC) offset #define MAX_LOCAL_TARGETS (BLOCK_INSN_LIMIT / 4) @@ -2588,9 +2588,9 @@ static void emit_le_swap(int cond, int r) { #if CPU_IS_LE if (cond == -1) - emith_ror(r, r, 16); + emith_ror(r, r, 16); else - emith_ror_c(cond, r, r, 16); + emith_ror_c(cond, r, r, 16); #endif } @@ -2599,9 +2599,9 @@ static void emit_le_ptr8(int cond, int r) { #if CPU_IS_LE if (cond == -1) - emith_eor_r_imm_ptr(r, 1); + emith_eor_r_imm_ptr(r, 1); else - emith_eor_r_imm_ptr_c(cond, r, 1); + emith_eor_r_imm_ptr_c(cond, r, 1); #endif } @@ -3837,7 +3837,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id) else u = (s16)FETCH_OP(opd->imm); // tweak for Blackthorne: avoid stack overwriting - if (GET_Rn() == SHR_SP && u == 0x0603f800) u = 0x0603f880; + if (GET_Rn() == SHR_SP && u == 0x0603f800) u = 0x0603f900; gconst_new(GET_Rn(), u); } else @@ -3980,6 +3980,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id) // divide 64/32 tmp4 = rcache_get_reg(div(opd).ro, RC_GR_READ, NULL); emith_ctx_write(tmp4, offsetof(SH2, drc_tmp)); + rcache_free(tmp4); tmp = rcache_get_tmp_arg(1); emith_add_r_r_ptr_imm(tmp, CONTEXT_REG, offsetof(SH2, drc_tmp)); rcache_get_reg_arg(0, div(opd).rn, NULL); @@ -4100,6 +4101,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id) // divide 64/32 tmp4 = rcache_get_reg(div(opd).ro, RC_GR_READ, NULL); emith_ctx_write(tmp4, offsetof(SH2, drc_tmp)); + rcache_free(tmp4); tmp = rcache_get_reg_arg(0, div(opd).rn, NULL); tmp2 = rcache_get_reg_arg(2, div(opd).rm, NULL); tmp3 = rcache_get_tmp_arg(1); diff --git a/cpu/sh2/sh2.c b/cpu/sh2/sh2.c index ba260718..0229a1f1 100644 --- a/cpu/sh2/sh2.c +++ b/cpu/sh2/sh2.c @@ -115,6 +115,7 @@ void sh2_pack(const SH2 *sh2, unsigned char *buff) p[0] = sh2->pending_int_irq; p[1] = sh2->pending_int_vector; + p[2] = sh2->m68krcycles_done; } void sh2_unpack(SH2 *sh2, const unsigned char *buff) @@ -127,6 +128,7 @@ void sh2_unpack(SH2 *sh2, const unsigned char *buff) sh2->pending_int_irq = p[0]; sh2->pending_int_vector = p[1]; sh2->test_irq = 1; + sh2->m68krcycles_done = p[2]; } #ifdef DRC_CMP -- 2.39.2