From 086adfff4fe6352e401d00c052071a6b91245b40 Mon Sep 17 00:00:00 2001
From: Paul Cercueil <paul@crapouillou.net>
Date: Fri, 13 Sep 2019 23:01:57 +0200
Subject: [PATCH] Make sure hardware registers are manipulated as little-endian

The hardware registers should be represented in little-endian format.
Therefore, on big-endian systems the values need to be byte-swapped.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 libpcsxcore/gpu.h         |  4 ++--
 libpcsxcore/misc.c        |  2 +-
 libpcsxcore/psxcounters.c |  8 ++++----
 libpcsxcore/psxdma.c      |  6 +++---
 libpcsxcore/psxhw.c       | 10 +++++-----
 5 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/libpcsxcore/gpu.h b/libpcsxcore/gpu.h
index 63a55720..9dfe6347 100644
--- a/libpcsxcore/gpu.h
+++ b/libpcsxcore/gpu.h
@@ -35,6 +35,6 @@
 #define PSXGPU_TIMING_BITS (PSXGPU_LCF | PSXGPU_nBUSY)
 
 #define gpuSyncPluginSR() { \
-	HW_GPU_STATUS &= PSXGPU_TIMING_BITS; \
-	HW_GPU_STATUS |= GPU_readStatus() & ~PSXGPU_TIMING_BITS; \
+	HW_GPU_STATUS &= SWAP32(PSXGPU_TIMING_BITS); \
+	HW_GPU_STATUS |= SWAP32(GPU_readStatus() & ~PSXGPU_TIMING_BITS); \
 }
diff --git a/libpcsxcore/misc.c b/libpcsxcore/misc.c
index 3a063067..b2dd9a12 100644
--- a/libpcsxcore/misc.c
+++ b/libpcsxcore/misc.c
@@ -680,7 +680,7 @@ int LoadState(const char *file) {
 	GPU_freeze(0, gpufP);
 	free(gpufP);
 	if (HW_GPU_STATUS == 0)
-		HW_GPU_STATUS = GPU_readStatus();
+		HW_GPU_STATUS = SWAP32(GPU_readStatus());
 
 	// spu
 	SaveFuncs.read(f, &Size, 4);
diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index 3342770e..5198646d 100644
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -328,7 +328,7 @@ void psxRcntUpdate()
         // VSync irq.
         if( hSyncCount == VBlankStart )
         {
-            HW_GPU_STATUS &= ~PSXGPU_LCF;
+            HW_GPU_STATUS &= SWAP32(~PSXGPU_LCF);
             GPU_vBlank( 1, 0 );
             setIrq( 0x01 );
 
@@ -348,9 +348,9 @@ void psxRcntUpdate()
             frame_counter++;
 
             gpuSyncPluginSR();
-            if( (HW_GPU_STATUS & PSXGPU_ILACE_BITS) == PSXGPU_ILACE_BITS )
-                HW_GPU_STATUS |= frame_counter << 31;
-            GPU_vBlank( 0, HW_GPU_STATUS >> 31 );
+            if ((HW_GPU_STATUS & SWAP32(PSXGPU_ILACE_BITS)) == SWAP32(PSXGPU_ILACE_BITS))
+                HW_GPU_STATUS |= SWAP32(frame_counter << 31);
+            GPU_vBlank(0, SWAP32(HW_GPU_STATUS) >> 31);
         }
 
         // Schedule next call, in hsyncs
diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
index cb84fbcc..d3b85724 100644
--- a/libpcsxcore/psxdma.c
+++ b/libpcsxcore/psxdma.c
@@ -185,7 +185,7 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 			size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
 			if ((int)size <= 0)
 				size = gpuDmaChainSize(madr);
-			HW_GPU_STATUS &= ~PSXGPU_nBUSY;
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 
 			// we don't emulate progress, just busy flag and end irq,
 			// so pretend we're already at the last block
@@ -217,7 +217,7 @@ void gpuInterrupt() {
 		HW_DMA2_CHCR &= SWAP32(~0x01000000);
 		DMA_INTERRUPT(2);
 	}
-	HW_GPU_STATUS |= PSXGPU_nBUSY; // GPU no longer busy
+	HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
 }
 
 void psxDma6(u32 madr, u32 bcr, u32 chcr) {
@@ -245,7 +245,7 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
 			*mem-- = SWAP32((madr - 4) & 0xffffff);
 			madr -= 4;
 		}
-		mem++; *mem = 0xffffff;
+		*++mem = SWAP32(0xffffff);
 
 		//GPUOTCDMA_INT(size);
 		// halted
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index dbcb9892..7b2401b1 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -38,7 +38,7 @@ void psxHwReset() {
 	mdecInit(); // initialize mdec decoder
 	cdrReset();
 	psxRcntInit();
-	HW_GPU_STATUS = 0x14802000;
+	HW_GPU_STATUS = SWAP32(0x14802000);
 }
 
 u8 psxHwRead8(u32 add) {
@@ -248,8 +248,8 @@ u32 psxHwRead32(u32 add) {
 			return hard;
 		case 0x1f801814:
 			gpuSyncPluginSR();
-			hard = HW_GPU_STATUS;
-			if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+			hard = SWAP32(HW_GPU_STATUS);
+			if (hSyncCount < 240 && (hard & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
 				hard |= PSXGPU_LCF & (psxRegs.cycle << 20);
 #ifdef PSXHW_LOG
 			PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
@@ -446,7 +446,7 @@ void psxHwWrite16(u32 add, u16 value) {
 			PSXHW_LOG("IMASK 16bit write %x\n", value);
 #endif
 			psxHu16ref(0x1074) = SWAPu16(value);
-			if (psxHu16ref(0x1070) & value)
+			if (psxHu16ref(0x1070) & SWAPu16(value))
 				new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
 			return;
 
@@ -560,7 +560,7 @@ void psxHwWrite32(u32 add, u32 value) {
 			PSXHW_LOG("IMASK 32bit write %x\n", value);
 #endif
 			psxHu32ref(0x1074) = SWAPu32(value);
-			if (psxHu32ref(0x1070) & value)
+			if (psxHu32ref(0x1070) & SWAPu32(value))
 				new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
 			return;
 
-- 
2.39.5