From 4e484ca077fb6e95fd539ed31889338f31d3c82d Mon Sep 17 00:00:00 2001 From: notaz Date: Wed, 15 Apr 2026 03:02:14 +0300 Subject: [PATCH] drc: rm an impossible condition First instruction can't be a delay slot since long ago --- libpcsxcore/new_dynarec/new_dynarec.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 6a08079e..2c7bb702 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -7555,14 +7555,6 @@ static noinline void pass3_register_alloc(struct compile_state *st, u_int addr) int hr; int i, j; - if (addr & 1) { - // First instruction is delay slot - cc=-1; - dops[1].bt=1; - ds=1; - st->unneeded_reg[0]=1; - } - for(i=0;islen;i++) { if(dops[i].bt) -- 2.47.3