From 4f55097de04a34ddcc83647f3b1f69570d7f1e36 Mon Sep 17 00:00:00 2001 From: notaz Date: Wed, 26 Oct 2011 02:38:58 +0300 Subject: [PATCH] psxcounters: use higher precision for vsync timing don't know why this is needed (having things like BIAS in mind), maybe desyncs with cdrom code or SPU? Tuned this on RE1. --- libpcsxcore/psxcounters.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c index 3f6e1395..177ccb75 100644 --- a/libpcsxcore/psxcounters.c +++ b/libpcsxcore/psxcounters.c @@ -74,6 +74,7 @@ static u32 hSyncCount = 0; static u32 spuSyncCount = 0; static u32 hsync_steps = 0; static u32 gpu_wants_hcnt = 0; +static u32 base_cycle = 0; u32 psxNextCounter = 0, psxNextsCounter = 0; @@ -322,7 +323,14 @@ void psxRcntUpdate() hsync_steps = 1; rcnts[3].cycleStart = cycle - leftover_cycles; - rcnts[3].cycle = hsync_steps * rcnts[3].target; + if (Config.PsxType) + // 20.12 precision, clk / 50 / 313 ~= 2164.14 + base_cycle += hsync_steps * 8864320; + else + // clk / 60 / 263 ~= 2146.31 + base_cycle += hsync_steps * 8791293; + rcnts[3].cycle = base_cycle >> 12; + base_cycle &= 0xfff; psxRcntSet(); } @@ -494,6 +502,8 @@ s32 psxRcntFreeze( gzFile f, s32 Mode ) if (Mode == 0) hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target; + base_cycle = 0; + return 0; } -- 2.39.5