From 506adbd5eb585f3c1fe6ee424ba53bdb55c2ce5f Mon Sep 17 00:00:00 2001
From: kub <derkub@gmail.com>
Date: Sat, 2 Mar 2024 10:34:50 +0100
Subject: [PATCH] core, another fix for z80 reset

---
 cpu/DrZ80/drz80.S | 17 +++++++++++++----
 cpu/cz80/cz80.c   |  2 --
 pico/z80if.c      |  7 -------
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/cpu/DrZ80/drz80.S b/cpu/DrZ80/drz80.S
index 37e6e884..f047664a 100644
--- a/cpu/DrZ80/drz80.S
+++ b/cpu/DrZ80/drz80.S
@@ -827,6 +827,7 @@ z80_xmap_rebase_sp:
 	mov r0,z80sp
 	readmem16
 	add z80sp,z80sp,#2
+	bic z80sp,z80sp,#1<<16
 .endif
 .endm
 
@@ -856,7 +857,7 @@ z80_xmap_rebase_sp:
 .else
     mov r0,\reg
 	subs z80sp,z80sp,#2
-	@ addcc z80sp,z80sp,#1<<16
+	addcc z80sp,z80sp,#1<<16
 	mov r1,z80sp
 	writemem16
 .endif
@@ -874,7 +875,7 @@ z80_xmap_rebase_sp:
 .else
 	mov r0,\reg,lsr #16
 	subs z80sp,z80sp,#2
-	@ addcc z80sp,z80sp,#1<<16
+	addcc z80sp,z80sp,#1<<16
 	mov r1,z80sp
 	writemem16
 .endif
@@ -1506,7 +1507,7 @@ DoInterrupt_mode0:
 	strb r0,[z80sp,#-1]!
 .else
 	subs z80sp,z80sp,#2
-	@ addcc z80sp,z80sp,#1<<16
+	addcc z80sp,z80sp,#1<<16
 	mov r1,z80sp
 	writemem16
 	ldr r2,[cpucontext, #z80irqvector]
@@ -4732,6 +4733,9 @@ opcode_3_2:
 ;@INC SP
 opcode_3_3:
 	add z80sp,z80sp,#1
+.if !FAST_Z80SP
+	bic z80sp,z80sp,#1<<16
+.endif
 	fetch 6
 ;@INC (HL)
 opcode_3_4:
@@ -4782,7 +4786,10 @@ opcode_3_A:
 	fetch 13
 ;@DEC SP
 opcode_3_B:
-	sub z80sp,z80sp,#1
+	subs z80sp,z80sp,#1
+.if !FAST_Z80SP
+	addcc z80sp,z80sp,#1<<16
+.endif
 	fetch 6
 ;@INC A
 opcode_3_C:
@@ -5745,6 +5752,7 @@ opcode_F_1:
 	mov r0,z80sp
 	readmem16
 	add z80sp,z80sp,#2
+	bic z80sp,z80sp,#1<<16
 	and z80a,r0,#0xFF00
 	mov z80a,z80a,lsl#16
 	and z80f,r0,#0xFF
@@ -7638,6 +7646,7 @@ opcode_DD_E1:
 	readmem16
 	ldmfd sp!,{r2,z80xx}
 	add z80sp,z80sp,#2
+	bic z80sp,z80sp,#1<<16
 .endif
 	strh r0,[z80xx,#2]
 	fetch 14
diff --git a/cpu/cz80/cz80.c b/cpu/cz80/cz80.c
index 90356019..888478ef 100644
--- a/cpu/cz80/cz80.c
+++ b/cpu/cz80/cz80.c
@@ -212,8 +212,6 @@ void Cz80_Reset(cz80_struc *CPU)
 {
 	// I, R, CPU and interrupts logic is reset, registers are untouched
 	memset(&CPU->R, 0, (FPTR)&CPU->BasePC - (FPTR)&CPU->R);
-	Cz80_Set_Reg(CPU, CZ80_FA, 0xffff);
-	Cz80_Set_Reg(CPU, CZ80_SP, 0xffff);
 	Cz80_Set_Reg(CPU, CZ80_PC, 0);
 }
 
diff --git a/pico/z80if.c b/pico/z80if.c
index 35710cba..4df40da6 100644
--- a/pico/z80if.c
+++ b/pico/z80if.c
@@ -112,14 +112,7 @@ void z80_reset(void)
   drZ80.Z80IF = 0;
   drZ80.z80irqvector = 0xff0000; // RST 38h
   drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1;
-  drZ80.Z80SP = 0xffff;
-  drZ80.Z80F = 0xff;
-  drZ80.Z80A = 0xff << 24;
   // others not changed, undefined on cold boot
-/*
-  drZ80.Z80IX = 0xFFFF << 16;
-  drZ80.Z80IY = 0xFFFF << 16;
-*/
 #ifdef FAST_Z80SP
   // drZ80 is locked in single bank
   drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000;
-- 
2.39.5