From 5180232e0fd1a12590fe3543ab36be589a186769 Mon Sep 17 00:00:00 2001 From: kub Date: Sun, 30 Mar 2025 19:11:01 +0200 Subject: [PATCH] core md, add interlace field info to video status --- pico/pico.c | 2 -- pico/pico_cmn.c | 5 +++++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/pico/pico.c b/pico/pico.c index ee3d1438..e305e3b1 100644 --- a/pico/pico.c +++ b/pico/pico.c @@ -297,8 +297,6 @@ void PicoFrame(void) goto end; } - //if(Pico.video.reg[12]&0x2) Pico.video.status ^= SR_ODD; // change odd bit in interlace mode - PicoFrameStart(); PicoFrameHints(); diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c index 39a3d158..37198f11 100644 --- a/pico/pico_cmn.c +++ b/pico/pico_cmn.c @@ -231,6 +231,11 @@ static int PicoFrameHints(void) p32x_start_blank(); #endif + if (pv->reg[12] & 2) + pv->status ^= SR_ODD; // change odd bit in interlace modes + else + pv->status &= ~SR_ODD; // never set in non-interlace modes + // the following SekRun is there for several reasons: // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga) // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants) -- 2.39.5