From 576bbd8f94b6163abfc4c02b65002249d768da00 Mon Sep 17 00:00:00 2001 From: notaz Date: Wed, 12 Jan 2011 15:46:23 +0200 Subject: [PATCH] drc: support RFE, remove ERET (it's not in r3k) --- libpcsxcore/new_dynarec/assem_arm.c | 20 +++++++++++++++++++ libpcsxcore/new_dynarec/emu_if.c | 6 ------ libpcsxcore/new_dynarec/linkage_arm.s | 28 +-------------------------- libpcsxcore/new_dynarec/new_dynarec.c | 4 ++++ 4 files changed, 25 insertions(+), 33 deletions(-) diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 4065afaa..a22c3c0f 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -1003,6 +1003,15 @@ void emit_or_and_set_flags(int rs1,int rs2,int rt) output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2)); } +void emit_orrshr_imm(u_int rs,u_int imm,u_int rt) +{ + assert(rs<16); + assert(rt<16); + assert(imm<32); + assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm); + output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7)); +} + void emit_xor(u_int rs1,u_int rs2,u_int rt) { assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]); @@ -3463,6 +3472,16 @@ void cop0_assemble(int i,struct regstat *i_regs) if((source[i]&0x3f)==0x08) // TLBP emit_call((int)TLBP); #endif +#ifdef PCSX + if((source[i]&0x3f)==0x10) // RFE + { + emit_readword((int)&Status,0); + emit_andimm(0,0x3c,1); + emit_andimm(0,~0xf,0); + emit_orrshr_imm(1,2,0); + emit_writeword(0,(int)&Status); + } +#else if((source[i]&0x3f)==0x18) // ERET { int count=ccadj[i]; @@ -3470,6 +3489,7 @@ void cop0_assemble(int i,struct regstat *i_regs) emit_addimm(HOST_CCREG,CLOCK_DIVIDER*count,HOST_CCREG); // TODO: Should there be an extra cycle here? emit_jmp((int)jump_eret); } +#endif } } diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index 9b16537b..897791fe 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -118,12 +118,6 @@ void MTC0_() gen_interupt(); /* FIXME: checking pending irqs should be enough */ } -void check_interupt() -{ - /* FIXME (also asm) */ - printf("ari64_check_interupt\n"); -} - void new_dyna_save(void) { // psxRegs.intCycle is always maintained, no need to convert diff --git a/libpcsxcore/new_dynarec/linkage_arm.s b/libpcsxcore/new_dynarec/linkage_arm.s index b5922ddb..f8bdca2e 100644 --- a/libpcsxcore/new_dynarec/linkage_arm.s +++ b/libpcsxcore/new_dynarec/linkage_arm.s @@ -1,7 +1,7 @@ /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * linkage_arm.s for PCSX * * Copyright (C) 2009-2010 Ari64 * - * Copyright (C) 2010 Gražvydas "notaz" Ignotas * + * Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -739,32 +739,6 @@ indirect_jump: .size indirect_jump, .-indirect_jump .size indirect_jump_indexed, .-indirect_jump_indexed - .align 2 - .global jump_eret - .type jump_eret, %function -jump_eret: - ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */ - ldr r0, [fp, #last_count-dynarec_local] - bic r1, r1, #2 - add r10, r0, r10 - str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */ - str r10, [fp, #cycle-dynarec_local] - bl check_interupt - ldr r1, [fp, #next_interupt-dynarec_local] - ldr r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */ - str r1, [fp, #last_count-dynarec_local] - subs r10, r10, r1 - bpl .E11 -.E8: - bl get_addr - mov pc, r0 -.E11: - str r0, [fp, #pcaddr-dynarec_local] - bl cc_interrupt - ldr r0, [fp, #pcaddr-dynarec_local] - b .E8 - .size jump_eret, .-jump_eret - .align 2 .global new_dyna_start .type new_dyna_start, %function diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 74ee8e6e..cfdec432 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -7933,7 +7933,11 @@ int new_recompile_block(int addr) case 0x02: strcpy(insn[i],"TLBWI"); type=COP0; break; case 0x06: strcpy(insn[i],"TLBWR"); type=COP0; break; case 0x08: strcpy(insn[i],"TLBP"); type=COP0; break; +#ifdef PCSX + case 0x10: strcpy(insn[i],"RFE"); type=COP0; break; +#else case 0x18: strcpy(insn[i],"ERET"); type=COP0; break; +#endif } } break; -- 2.39.5