From ad43165afc30cda2600da40f52e95a77cdf5b884 Mon Sep 17 00:00:00 2001 From: kub Date: Thu, 22 Feb 2024 21:01:37 +0100 Subject: [PATCH] core, fix z80 irq handling, reset defaults (cz80, drz80) --- cpu/DrZ80/drz80.S | 20 ++++++++++++++------ cpu/cz80/cz80.c | 2 ++ cpu/cz80/cz80_op.c | 11 +---------- cpu/cz80/cz80_opED.c | 31 ++++++++++++------------------- pico/pico_int.h | 2 +- pico/z80if.c | 5 +++-- 6 files changed, 33 insertions(+), 38 deletions(-) diff --git a/cpu/DrZ80/drz80.S b/cpu/DrZ80/drz80.S index edcebb8b..37e6e884 100644 --- a/cpu/DrZ80/drz80.S +++ b/cpu/DrZ80/drz80.S @@ -855,7 +855,8 @@ z80_xmap_rebase_sp: strb \reg,[z80sp,#-1]! .else mov r0,\reg - sub z80sp,z80sp,#2 + subs z80sp,z80sp,#2 + @ addcc z80sp,z80sp,#1<<16 mov r1,z80sp writemem16 .endif @@ -872,7 +873,8 @@ z80_xmap_rebase_sp: strb r1,[z80sp,#-1]! .else mov r0,\reg,lsr #16 - sub z80sp,z80sp,#2 + subs z80sp,z80sp,#2 + @ addcc z80sp,z80sp,#1<<16 mov r1,z80sp writemem16 .endif @@ -1472,7 +1474,7 @@ DoInterrupt: ;@ r0 == z80if stmfd sp!,{r2,lr} - tst r0,#4 ;@ check halt + tst r0,#Z80_HALT ;@ check halt addne z80pc,z80pc,#1 ldrb r1,[cpucontext,#z80im] @@ -1503,7 +1505,8 @@ DoInterrupt_mode0: strb r1,[z80sp,#-1]! strb r0,[z80sp,#-1]! .else - sub z80sp,z80sp,#2 + subs z80sp,z80sp,#2 + @ addcc z80sp,z80sp,#1<<16 mov r1,z80sp writemem16 ldr r2,[cpucontext, #z80irqvector] @@ -1577,7 +1580,9 @@ DoInterrupt_end: ;@ interupt accepted so callback irq interface ldr r0,[cpucontext, #z80irqcallback] tst r0,r0 - streqb r0,[cpucontext,#z80irq] ;@ default handling + ldreqb r0,[cpucontext,#z80irq] ;@ default handling + biceq r0,r0,#1 + streqb r0,[cpucontext,#z80irq] ldmeqfd sp!,{r2,pc} stmfd sp!,{r3,r12} mov lr,pc @@ -5758,7 +5763,10 @@ opcode_F_3: ldrb r1,[cpucontext,#z80if] bic r1,r1,#(Z80_IF1)|(Z80_IF2) strb r1,[cpucontext,#z80if] - fetch 4 + + ldrb r0,[z80pc],#1 + eatcycles 4 + ldr pc,[opcodes, r0, lsl #2] ;@CALL P,NN opcode_F_4: tst z80f,#1<R, 0, (FPTR)&CPU->BasePC - (FPTR)&CPU->R); + Cz80_Set_Reg(CPU, CZ80_FA, 0xffff); + Cz80_Set_Reg(CPU, CZ80_SP, 0xffff); Cz80_Set_Reg(CPU, CZ80_PC, 0); } diff --git a/cpu/cz80/cz80_op.c b/cpu/cz80/cz80_op.c index cf3062e2..566782cf 100644 --- a/cpu/cz80/cz80_op.c +++ b/cpu/cz80/cz80_op.c @@ -711,15 +711,6 @@ OP_EI: USE_CYCLES(4) if (!zIFF1) { - zIFF1 = zIFF2 = (1 << 2); - while (GET_OP() == 0xfb) - { - USE_CYCLES(4) - PC++; -#if CZ80_EMULATE_R_EXACTLY - zR++; -#endif - } if (CPU->IRQState) { CPU->Status |= CZ80_HAS_INT; @@ -727,7 +718,7 @@ OP_EI: CPU->ICount = 0; } } - else zIFF2 = (1 << 2); + zIFF1 = zIFF2 = (1 << 2); goto Cz80_Exec_nocheck; /*----------------------------------------- diff --git a/cpu/cz80/cz80_opED.c b/cpu/cz80/cz80_opED.c index 71f7dbce..844d91ee 100644 --- a/cpu/cz80/cz80_opED.c +++ b/cpu/cz80/cz80_opED.c @@ -407,36 +407,29 @@ OP_SBC16: RET(8) /*----------------------------------------- - RETN + RETI/RETN -----------------------------------------*/ - OPED(0x45): // RETN; - OPED(0x55): // RETN; - OPED(0x65): // RETN; - OPED(0x75): // RETN; + // works the same, but Z80 PIO can detect the opcode + OPED(0x45): // RETN + OPED(0x55): // RETN + OPED(0x65): // RETN + OPED(0x75): // RETN + + OPED(0x4d): // RETI + OPED(0x5d): // RETI + OPED(0x6d): // RETI + OPED(0x7d): // RETI POP_16(res); SET_PC(res); if (!zIFF1 && zIFF2) { - zIFF1 = (1 << 2); if (CPU->IRQState) { CPU->Status |= CZ80_HAS_INT; } } - else zIFF1 = zIFF2; - RET(10) - -/*----------------------------------------- - RETI ------------------------------------------*/ - - OPED(0x4d): // RETI - OPED(0x5d): // RETI - OPED(0x6d): // RETI - OPED(0x7d): // RETI - POP_16(res); - SET_PC(res); + zIFF1 = zIFF2; RET(10) /*----------------------------------------- diff --git a/pico/pico_int.h b/pico/pico_int.h index 86259cd7..a3c87567 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -166,7 +166,7 @@ extern struct DrZ80 drZ80; #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles)) #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles) #define z80_int() drZ80.Z80_IRQ = 1 -#define z80_int_assert(a) drZ80.Z80_IRQ = (a) +#define z80_int_assert(a) drZ80.Z80_IRQ = (a ? 2 : 0) #define z80_nmi() drZ80.Z80IF |= 8 #define z80_cyclesLeft drZ80.cycles diff --git a/pico/z80if.c b/pico/z80if.c index 7fbfc342..35710cba 100644 --- a/pico/z80if.c +++ b/pico/z80if.c @@ -112,10 +112,11 @@ void z80_reset(void) drZ80.Z80IF = 0; drZ80.z80irqvector = 0xff0000; // RST 38h drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1; + drZ80.Z80SP = 0xffff; + drZ80.Z80F = 0xff; + drZ80.Z80A = 0xff << 24; // others not changed, undefined on cold boot /* - drZ80.Z80F = (1<<2); // set ZFlag - drZ80.Z80F2 = (1<<2); // set ZFlag drZ80.Z80IX = 0xFFFF << 16; drZ80.Z80IY = 0xFFFF << 16; */ -- 2.39.5