From af700b411e17806c3afb9e5f607317adc00dd546 Mon Sep 17 00:00:00 2001 From: notaz Date: Fri, 15 Jul 2022 00:41:58 +0300 Subject: [PATCH] drc: simplify cache flush for some platforms untested, may break 3DS, if it happens please report --- libpcsxcore/new_dynarec/new_dynarec.c | 24 +++++++++++++++++++- libpcsxcore/new_dynarec/new_dynarec_config.h | 3 +++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index cabf4871..c9e16884 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -506,6 +506,28 @@ static void end_block(void *start) end_tcache_write(start, out); } +#ifdef NDRC_CACHE_FLUSH_ALL + +static int needs_clear_cache; + +static void mark_clear_cache(void *target) +{ + if (!needs_clear_cache) { + start_tcache_write(ndrc, ndrc + 1); + needs_clear_cache = 1; + } +} + +static void do_clear_cache(void) +{ + if (needs_clear_cache) { + end_tcache_write(ndrc, ndrc + 1); + needs_clear_cache = 0; + } +} + +#else + // also takes care of w^x mappings when patching code static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)]; @@ -549,7 +571,7 @@ static void do_clear_cache(void) } } -//#define DEBUG_CYCLE_COUNT 1 +#endif // NDRC_CACHE_FLUSH_ALL #define NO_CYCLE_PENALTY_THR 12 diff --git a/libpcsxcore/new_dynarec/new_dynarec_config.h b/libpcsxcore/new_dynarec/new_dynarec_config.h index 64c58492..5aee85df 100644 --- a/libpcsxcore/new_dynarec/new_dynarec_config.h +++ b/libpcsxcore/new_dynarec/new_dynarec_config.h @@ -15,3 +15,6 @@ #if defined(HAVE_LIBNX) #define NDRC_WRITE_OFFSET 1 #endif +#if defined(HAVE_LIBNX) || defined(_3DS) +#define NDRC_CACHE_FLUSH_ALL 1 +#endif -- 2.39.5