From b7697ca351f2a2d4118ab9904275ad3b7133facc Mon Sep 17 00:00:00 2001 From: kub Date: Wed, 22 Sep 2021 00:08:02 +0200 Subject: [PATCH] core, more superfighter mapper stuff --- pico/cart.c | 2 + pico/carthw.cfg | 9 ++- pico/carthw/carthw.c | 142 +++++++++++++++++++++++++++++++++++++------ pico/carthw/carthw.h | 3 + pico/carthw_cfg.c | 5 ++ 5 files changed, 141 insertions(+), 20 deletions(-) diff --git a/pico/cart.c b/pico/cart.c index 903b3bef..44b17073 100644 --- a/pico/cart.c +++ b/pico/cart.c @@ -1137,6 +1137,8 @@ static void parse_carthw(const char *carthw_cfg, int *fill_sram, carthw_sf001_startup(); else if (strcmp(p, "sf002_mapper") == 0) carthw_sf002_startup(); + else if (strcmp(p, "sf004_mapper") == 0) + carthw_sf004_startup(); else if (strcmp(p, "prot_lk3") == 0) carthw_prot_lk3_startup(); else { diff --git a/pico/carthw.cfg b/pico/carthw.cfg index bf8715c0..f7cfcb1f 100644 --- a/pico/carthw.cfg +++ b/pico/carthw.cfg @@ -16,8 +16,7 @@ # realtec_mapper # radica_mapper - similar to x_in_1_mapper # piersolar_mapper - used in Pier Solar -# sf001_mapper -# sf002_mapper +# sf00x_mapper - versions x=1,2,4 used by superfighter team # # save storage memory range (inclusive, overrides ROM header): # sram_range = @@ -103,6 +102,12 @@ prop = filled_sram check_str = 0x150, "LEGEND OF WUKONG" hw = sf002_mapper +# Star Odyssey, r/w in SRAM mirror (double SRAM as a kludge) +[Star Odyssey] +check_str = 0x150, "STAR ODYSSEY" +hw = sf004_mapper +sram_range = 0x200000,0x207fff + # detect *_in_1 based on first game and if it's larger than it should be, # as some dumps look like to be incomplete. # This will also pick overdumps, but those should still work with the mapper applied. diff --git a/pico/carthw/carthw.c b/pico/carthw/carthw.c index c6d89936..83cb2da3 100644 --- a/pico/carthw/carthw.c +++ b/pico/carthw/carthw.c @@ -483,7 +483,7 @@ void carthw_pier_startup(void) carthw_chunks = carthw_pier_state; } -/* superfighter mappers */ +/* superfighter mappers, see mame: mame/src/devices/bus/megadrive/rom.cpp */ unsigned int carthw_sf00x_reg; static carthw_state_chunk carthw_sf00x_state[] = @@ -492,37 +492,39 @@ static carthw_state_chunk carthw_sf00x_state[] = { 0, 0, NULL } }; -// hack to remap SRAM from 0x400000 to 0x3c0000 (there are 2 versions of sf001) -u32 carthw_sf001_read8_sram(u32 a) +// SF-001 + +// additionally map SRAM at 0x3c0000 for the newer version of sf001 +static u32 carthw_sf001_read8_sram(u32 a) { - return m68k_read8((a & 0xffff) + 0x400000); + return m68k_read8((a & 0xffff) + Pico.sv.start); } -u32 carthw_sf001_read16_sram(u32 a) +static u32 carthw_sf001_read16_sram(u32 a) { - return m68k_read16((a & 0xffff) + 0x400000); + return m68k_read16((a & 0xffff) + Pico.sv.start); } -void carthw_sf001_write8_sram(u32 a, u32 d) +static void carthw_sf001_write8_sram(u32 a, u32 d) { - m68k_write8((a & 0xffff) + 0x400000, d); + m68k_write8((a & 0xffff) + Pico.sv.start, d); } -void carthw_sf001_write16_sram(u32 a, u32 d) +static void carthw_sf001_write16_sram(u32 a, u32 d) { - m68k_write16((a & 0xffff) + 0x400000, d); + m68k_write16((a & 0xffff) + Pico.sv.start, d); } -void carthw_sf001_write8(u32 a, u32 d) +static void carthw_sf001_write8(u32 a, u32 d) { - if ((a & 0xf00) != 0x0e00) + if ((a & 0xf00) != 0xe00 || (carthw_sf00x_reg & 0x20)) // wrong addr / locked return; if (d & 0x80) { // bank 0xe at addr 0x000000 cpu68k_map_set(m68k_read8_map, 0x000000, 0x040000-1, Pico.rom+0x380000, 0); cpu68k_map_set(m68k_read16_map, 0x000000, 0x040000-1, Pico.rom+0x380000, 0); - // SRAM at 0x3c0000; hack to map SRAM from old to new location + // SRAM also at 0x3c0000 for newer mapper version cpu68k_map_set(m68k_read8_map, 0x3c0000, 0x400000-1, carthw_sf001_read8_sram, 1); cpu68k_map_set(m68k_read16_map, 0x3c0000, 0x400000-1, carthw_sf001_read16_sram, 1); cpu68k_map_set(m68k_write8_map, 0x3c0000, 0x400000-1, carthw_sf001_write8_sram, 1); @@ -540,25 +542,29 @@ void carthw_sf001_write8(u32 a, u32 d) carthw_sf00x_reg = d; } -void carthw_sf001_write16(u32 a, u32 d) +static void carthw_sf001_write16(u32 a, u32 d) { carthw_sf001_write8(a + 1, d); } static void carthw_sf001_mem_setup(void) { + // writing to low cartridge addresses cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf001_write8, 1); cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf001_write16, 1); } static void carthw_sf001_reset(void) { + carthw_sf00x_reg = 0; carthw_sf001_write8(0x0e01, 0); } static void carthw_sf001_statef(void) { - carthw_sf001_write8(0x0e01, carthw_sf00x_reg); + int reg = carthw_sf00x_reg; + carthw_sf00x_reg = 0; + carthw_sf001_write8(0x0e01, reg); } void carthw_sf001_startup(void) @@ -569,10 +575,11 @@ void carthw_sf001_startup(void) carthw_chunks = carthw_sf00x_state; } +// SF-002 -void carthw_sf002_write8(u32 a, u32 d) +static void carthw_sf002_write8(u32 a, u32 d) { - if ((a & 0xf00) != 0x0e00) + if ((a & 0xf00) != 0xe00) return; if (d & 0x80) { @@ -587,13 +594,14 @@ void carthw_sf002_write8(u32 a, u32 d) carthw_sf00x_reg = d; } -void carthw_sf002_write16(u32 a, u32 d) +static void carthw_sf002_write16(u32 a, u32 d) { carthw_sf002_write8(a + 1, d); } static void carthw_sf002_mem_setup(void) { + // writing to low cartridge addresses cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf002_write8, 1); cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf002_write16, 1); } @@ -616,6 +624,104 @@ void carthw_sf002_startup(void) carthw_chunks = carthw_sf00x_state; } +// SF-004 + +// reading from cartridge I/O region returns the current bank index +static u32 carthw_sf004_read8(u32 a) +{ + if ((a & ~0xff) == 0xa13000) + return carthw_sf00x_reg & 0xf0; // bank index + return PicoRead8_io(a); +} + +static u32 carthw_sf004_read16(u32 a) +{ + if ((a & ~0xff) == 0xa13000) + return carthw_sf00x_reg & 0xf0; + return PicoRead16_io(a); +} + +// writing to low cartridge adresses changes mappings +static void carthw_sf004_write8(u32 a, u32 d) +{ + int idx, i; + unsigned bs = 0x40000; // bank size + + // there are 3 byte-sized regs, stored together in carthw_sf00x_reg + if (!(carthw_sf00x_reg & 0x8000)) + return; // locked + + switch (a & 0xf00) { + case 0xd00: + carthw_sf00x_reg = (carthw_sf00x_reg & ~0xff0000) | ((d & 0xff) << 16); + return PicoWrite8_io(0xa130f1, (d & 0x80) ? SRR_MAPPED : 0); // SRAM mapping + case 0xe00: + carthw_sf00x_reg = (carthw_sf00x_reg & ~0x00ff00) | ((d & 0xff) << 8); + break; + case 0xf00: + carthw_sf00x_reg = (carthw_sf00x_reg & ~0x0000ff) | ((d & 0xff) << 0); + break; + default: + return; // wrong addr + } + + // bank mapping changed + idx = ((carthw_sf00x_reg>>4) & 0x7); // bank index + if ((carthw_sf00x_reg>>8) & 0x40) { + // linear bank mapping, starting at idx + for (i = 0; i < 8; i++, idx = (idx+1) & 0x7) { + cpu68k_map_set(m68k_read8_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0); + cpu68k_map_set(m68k_read16_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0); + } + } else { + // single bank mapping + for (i = 0; i < 8; i++) { + cpu68k_map_set(m68k_read8_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0); + cpu68k_map_set(m68k_read16_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0); + } + } +} + +static void carthw_sf004_write16(u32 a, u32 d) +{ + carthw_sf004_write8(a + 1, d); +} + +static void carthw_sf004_mem_setup(void) +{ + // writing to low cartridge addresses + cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf004_write8, 1); + cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf004_write16, 1); + // reading from the cartridge I/O region + cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, carthw_sf004_read8, 1); + cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_sf004_read16, 1); +} + +static void carthw_sf004_reset(void) +{ + carthw_sf00x_reg = -1; + carthw_sf004_write8(0x0d01, 0); + carthw_sf004_write8(0x0f01, 0); + carthw_sf004_write8(0x0e01, 0x80); +} + +static void carthw_sf004_statef(void) +{ + int reg = carthw_sf00x_reg; + carthw_sf00x_reg = -1; + carthw_sf004_write8(0x0d01, reg >> 16); + carthw_sf004_write8(0x0f01, reg >> 0); + carthw_sf004_write8(0x0e01, reg >> 8); +} + +void carthw_sf004_startup(void) +{ + PicoCartMemSetup = carthw_sf004_mem_setup; + PicoResetHook = carthw_sf004_reset; + PicoLoadStateHook = carthw_sf004_statef; + carthw_chunks = carthw_sf00x_state; +} + /* Simple unlicensed ROM protection emulation */ static struct { u32 addr; diff --git a/pico/carthw/carthw.h b/pico/carthw/carthw.h index a1875b6b..bea69f0d 100644 --- a/pico/carthw/carthw.h +++ b/pico/carthw/carthw.h @@ -26,6 +26,9 @@ void carthw_Xin1_startup(void); void carthw_realtec_startup(void); void carthw_radica_startup(void); void carthw_pier_startup(void); +void carthw_sf001_startup(void); +void carthw_sf002_startup(void); +void carthw_sf004_startup(void); void carthw_sprot_startup(void); void carthw_sprot_new_location(unsigned int a, diff --git a/pico/carthw_cfg.c b/pico/carthw_cfg.c index 4ff097a2..89d5e0b0 100644 --- a/pico/carthw_cfg.c +++ b/pico/carthw_cfg.c @@ -45,10 +45,15 @@ static const char builtin_carthw_cfg[] = "check_str=0x150,\"BEGGAR PRINCE\"\n" "hw=sf001_mapper\n" "sram_range=0x400000,0x40ffff\n" + "prop=filled_sram\n" "[]\n" "check_str=0x150,\"LEGEND OF WUKONG\"\n" "hw=sf002_mapper\n" "[]\n" + "check_str=0x150,\"STAR ODYSSEY\"\n" + "hw=sf004_mapper\n" + "sram_range=0x200000,0x207fff\n" + "[]\n" "check_str=0x120,\"FLICKY\"\n" "check_size_gt=0x020000\n" "hw=x_in_1_mapper\n" -- 2.39.5