From c9d5f41b0a50deb3dea5c02b15f221e12a071474 Mon Sep 17 00:00:00 2001
From: kub <derkub@gmail.com>
Date: Fri, 14 Oct 2022 18:46:49 +0000
Subject: [PATCH] 32x, minor poll detection fix

---
 pico/32x/32x.c  | 11 ++++++-----
 pico/pico_cmn.c | 17 +++++++++--------
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index 16bd73f4..dad13616 100644
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -54,14 +54,14 @@ void p32x_update_irls(SH2 *active_sh2, unsigned int m68k_cycles)
 
   mrun = sh2_irl_irq(&msh2, mlvl, msh2.state & SH2_STATE_RUN);
   if (mrun) {
-    p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, m68k_cycles);
+    p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
     if (msh2.state & SH2_STATE_RUN)
       sh2_end_run(&msh2, 0);
   }
 
   srun = sh2_irl_irq(&ssh2, slvl, ssh2.state & SH2_STATE_RUN);
   if (srun) {
-    p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, m68k_cycles);
+    p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
     if (ssh2.state & SH2_STATE_RUN)
       sh2_end_run(&ssh2, 0);
   }
@@ -268,6 +268,9 @@ static void p32x_end_blank(void)
     Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
   if (!(Pico32x.sh2_regs[0] & 0x80))
     p32x_schedule_hint(NULL, SekCyclesDone());
+
+  p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, SekCyclesDone());
+  p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
 }
 
 void p32x_schedule_hint(SH2 *sh2, unsigned int m68k_cycles)
@@ -577,12 +580,10 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
 
 void PicoFrame32x(void)
 {
+  // XXX this is somehow misplaced here
   sh2_execute_prepare(&msh2, PicoIn.opt & POPT_EN_DRC);
   sh2_execute_prepare(&ssh2, PicoIn.opt & POPT_EN_DRC);
 
-  p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, SekCyclesDone());
-  p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
-
   if (PicoIn.AHW & PAHW_MCD)
     pcd_prepare_frame();
 
diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c
index b48deae5..b2b34750 100644
--- a/pico/pico_cmn.c
+++ b/pico/pico_cmn.c
@@ -162,9 +162,6 @@ static int PicoFrameHints(void)
 
   SyncCPUs(Pico.t.m68c_aim);
 
-  // === VBLANK, 1st line ===
-  pv->status &= ~PVS_ACTIVE;
-
   if (!skip)
   {
     if (Pico.est.DrawScanline < y)
@@ -177,6 +174,9 @@ static int PicoFrameHints(void)
   p32x_render_frame();
 #endif
 
+  // === VBLANK, 1st line ===
+  pv->status &= ~PVS_ACTIVE;
+
   memcpy(PicoIn.padInt, PicoIn.pad, sizeof(PicoIn.padInt));
   PAD_DELAY();
 
@@ -188,6 +188,9 @@ static int PicoFrameHints(void)
   }
 
   pv->status |= SR_VB | PVS_VB2; // go into vblank
+#ifdef PICO_32X
+  p32x_start_blank();
+#endif
 
   // the following SekRun is there for several reasons:
   // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
@@ -198,8 +201,11 @@ static int PicoFrameHints(void)
   do_timing_hacks_start(pv);
   CPUS_RUN(CYCLES_M68K_VINT_LAG);
 
+  SyncCPUs(Pico.t.m68c_aim);
+
   pv->status |= SR_F;
   pv->pending_ints |= 0x20;
+
   if (pv->reg[1] & 0x20) {
     if (Pico.t.m68c_cnt - Pico.t.m68c_aim < 60) // CPU blocked?
       SekExecM68k(11); // HACK
@@ -208,15 +214,10 @@ static int PicoFrameHints(void)
   }
 
   if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) {
-    PicoSyncZ80(Pico.t.m68c_aim);
     elprintf(EL_INTS, "zint");
     z80_int();
   }
 
-#ifdef PICO_32X
-  p32x_start_blank();
-#endif
-
   // Run scanline:
   CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG);
   do_timing_hacks_end(pv);
-- 
2.39.5