From c9f729d05b31bba1988b9336233f080421c16de5 Mon Sep 17 00:00:00 2001 From: notaz Date: Tue, 24 Oct 2023 01:00:55 +0300 Subject: [PATCH] improve field status after enable sort of a hack (as usual) but ohwell... --- libpcsxcore/gpu.h | 2 +- libpcsxcore/psxhw.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/libpcsxcore/gpu.h b/libpcsxcore/gpu.h index ef9c7183..ec5019c9 100644 --- a/libpcsxcore/gpu.h +++ b/libpcsxcore/gpu.h @@ -31,7 +31,7 @@ #define PSXGPU_FIELD (1u<<13) // both must be set for interlace to work -#define PSXGPU_ILACE_BITS (PSXGPU_ILACE | PSXGPU_DHEIGHT | PSXGPU_FIELD) +#define PSXGPU_ILACE_BITS (PSXGPU_ILACE | PSXGPU_DHEIGHT) #define HW_GPU_STATUS psxHu32ref(0x1814) diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c index 4811f99b..832e6d7d 100644 --- a/libpcsxcore/psxhw.c +++ b/libpcsxcore/psxhw.c @@ -85,8 +85,13 @@ void psxHwWriteDmaIcr32(u32 value) void psxHwWriteGpuSR(u32 value) { + u32 old_sr = HW_GPU_STATUS, new_sr; GPU_writeStatus(value); gpuSyncPluginSR(); + new_sr = HW_GPU_STATUS; + // "The Next Tetris" seems to rely on the field order after enable + if ((old_sr ^ new_sr) & new_sr & SWAP32(PSXGPU_ILACE)) + frame_counter |= 1; } u32 psxHwReadGpuSR(void) -- 2.39.5