From cdc2da64d4c55a97c4507b6c9389bf4dca04695b Mon Sep 17 00:00:00 2001 From: notaz Date: Thu, 3 Feb 2022 02:04:52 +0200 Subject: [PATCH] drc: use optimized get_reg arm32-only for now --- libpcsxcore/new_dynarec/linkage_arm.S | 40 +++++++++++++++++++++++++++ libpcsxcore/new_dynarec/new_dynarec.c | 9 ++++++ 2 files changed, 49 insertions(+) diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S index 8d9074f4..1a16aa04 100644 --- a/libpcsxcore/new_dynarec/linkage_arm.S +++ b/libpcsxcore/new_dynarec/linkage_arm.S @@ -840,4 +840,44 @@ FUNCTION(call_gteStall): add r10, r10, r0 bx lr +#ifdef HAVE_ARMV6 + +FUNCTION(get_reg): + ldr r12, [r0] + and r1, r1, #0xff + ldr r2, [r0, #4] + orr r1, r1, r1, lsl #8 + ldr r3, [r0, #8] + orr r1, r1, r1, lsl #16 @ searched char in every byte + ldrb r0, [r0, #12] @ last byte + eor r12, r12, r1 + eor r2, r2, r1 + eor r3, r3, r1 + cmp r0, r1, lsr #24 + mov r0, #12 + mvn r1, #0 @ r1=~0 + bxeq lr + orr r3, r3, #0xff000000 @ EXCLUDE_REG + uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match) + mov r12, #0 + sel r0, r12, r1 @ 0 if no match, else ff in some byte + uadd8 r2, r2, r1 + sel r2, r12, r1 + uadd8 r3, r3, r1 + sel r3, r12, r1 + mov r12, #3 + clz r0, r0 @ 0, 8, 16, 24 or 32 + clz r2, r2 + clz r3, r3 + sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1 + sub r2, r12, r2, lsr #3 + sub r3, r12, r3, lsr #3 + orr r2, r2, #4 + orr r3, r3, #8 + and r0, r0, r2 + and r0, r0, r3 + bx lr + +#endif /* HAVE_ARMV6 */ + @ vim:filetype=armasm diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index abb0d076..0dea9a35 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -35,6 +35,7 @@ #include "../psxinterpreter.h" #include "../gte.h" #include "emu_if.h" // emulator interface +#include "arm_features.h" #define noinline __attribute__((noinline,noclone)) #ifndef ARRAY_SIZE @@ -607,6 +608,12 @@ static void clear_all_regs(signed char regmap[]) memset(regmap, -1, sizeof(regmap[0]) * HOST_REGS); } +#if defined(__arm__) && defined(HAVE_ARMV6) && HOST_REGS == 13 && EXCLUDE_REG == 11 + +extern signed char get_reg(const signed char regmap[], signed char r); + +#else + static signed char get_reg(const signed char regmap[], signed char r) { int hr; @@ -619,6 +626,8 @@ static signed char get_reg(const signed char regmap[], signed char r) return -1; } +#endif + static signed char get_reg_temp(const signed char regmap[]) { int hr; -- 2.39.5