From 0a3e0c3e6abf41503981c0ac2dd0e0eae1e19c2a Mon Sep 17 00:00:00 2001 From: notaz Date: Tue, 7 Oct 2008 14:20:39 +0000 Subject: [PATCH 1/1] added sh/hi test, to be built with gas --- nshtest/Makefile | 21 +++ nshtest/md.ld | 122 +++++++++++++ nshtest/sega_gcc.s | 443 +++++++++++++++++++++++++++++++++++++++++++++ nshtest/test.s | 442 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 1028 insertions(+) create mode 100644 nshtest/Makefile create mode 100644 nshtest/md.ld create mode 100644 nshtest/sega_gcc.s create mode 100644 nshtest/test.s diff --git a/nshtest/Makefile b/nshtest/Makefile new file mode 100644 index 0000000..bfe4a04 --- /dev/null +++ b/nshtest/Makefile @@ -0,0 +1,21 @@ +CROSS = m68k-elf- +AS = $(CROSS)as +LD = $(CROSS)ld +OBJCOPY = $(CROSS)objcopy + +ASFLAGS = -m68000 --register-prefix-optional --bitwise-or + +TARGET = nshtest.bin +OBJS = sega_gcc.o test.o + +all : $(TARGET) + +$(TARGET) : a.out + $(OBJCOPY) -I elf32-m68k -O binary $^ $@ + +a.out : $(OBJS) + $(LD) -Tmd.ld -Map $(TARGET).map $^ + +clean: + $(RM) $(TARGET) $(OBJS) $(TARGET).map a.out + diff --git a/nshtest/md.ld b/nshtest/md.ld new file mode 100644 index 0000000..208bfa7 --- /dev/null +++ b/nshtest/md.ld @@ -0,0 +1,122 @@ +OUTPUT_ARCH(m68k) +SEARCH_DIR(.) +/*GROUP(-lbcc -lc -lgcc)*/ +__DYNAMIC = 0; + +/* + * Setup the memory map of the SEGA Genesis. + * stack grows down from high memory. + * + * The memory map look like this: + * +--------------------+ <- low memory + * | .text | + * | _etext | + * | ctor list | the ctor and dtor lists are for + * | dtor list | C++ support + * +--------------------+ + * | .data | initialized data goes here + * | _edata | + * +--------------------+ + * | .bss | + * | __bss_start | start of bss, cleared by crt0 + * | _end | start of heap, used by sbrk() + * +--------------------+ + * . . + * . . + * . . + * | __stack | top of stack + * +--------------------+ + */ +/* +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x00400000 + ram : ORIGIN = 0xffff0000, LENGTH = 0x00010000 +} +*/ + +MEMORY { + ram : ORIGIN = 0x0, LENGTH = 0xfffffff +} + +/* + * allocate the stack to be at the top of memory, since the stack + * grows down + */ + +PROVIDE (__stack = 0x00fffff0); + +PROVIDE (ram = 0xffff0000); +/* + * Initalize some symbols to be zero so we can reference them in the + * crt0 without core dumping. These functions are all optional, but + * we do this so we can have our crt0 always use them if they exist. + * This is so BSPs work better when using the crt0 installed with gcc. + * We have to initalize them twice, so we cover a.out (which prepends + * an underscore) and coff object file formats. + */ +PROVIDE (hardware_init_hook = 0); +PROVIDE (_hardware_init_hook = 0); +PROVIDE (software_init_hook = 0); +PROVIDE (_software_init_hook = 0); + +SECTIONS +{ + .text 0x00000000: + { + *(.text) + . = ALIGN(0x4); + __CTOR_LIST__ = .; + LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) + *(.ctors) + LONG(0) + __CTOR_END__ = .; + __DTOR_LIST__ = .; + LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) + *(.dtors) + LONG(0) + __DTOR_END__ = .; + *(.rodata) + *(.gcc_except_table) + + __INIT_SECTION__ = . ; + *(.init) + SHORT (0x4e75) /* rts */ + + __FINI_SECTION__ = . ; + *(.fini) + SHORT (0x4e75) /* rts */ + + _etext = .; + *(.lit) + } > ram + + .data BLOCK (0x4) : + { + *(.shdata) + *(.data) + _edata = .; + } > ram + + .bss 0xff0000 : + { + __bss_start = . ; + *(.shbss) + *(.bss) + *(COMMON) + *(.eh_fram) + *(.eh_frame) + _end = ALIGN (0x8); + __end = _end; + } > ram + + .stab 0 (NOLOAD) : + { + *(.stab) + } + + .stabstr 0 (NOLOAD) : + { + *(.stabstr) + } +} diff --git a/nshtest/sega_gcc.s b/nshtest/sega_gcc.s new file mode 100644 index 0000000..a295692 --- /dev/null +++ b/nshtest/sega_gcc.s @@ -0,0 +1,443 @@ +*------------------------------------------------------- +* +* Sega startup code for the GNU Assembler +* Translated from: +* Sega startup code for the Sozobon C compiler +* Written by Paul W. Lee +* Modified from Charles Coty's code +* +*------------------------------------------------------- + + dc.l 0x0,0x200 + dc.l INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,HBL,INT,VBL,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT,INT + dc.l INT,INT,INT,INT,INT,INT,INT + .ascii "SEGA GENESIS " + .ascii "notaz's Shadow / Hilight test " + .ascii "NOTAZ'S SHADOW HILIGHT TEST " + .ascii "GM 00000000-00" + .byte 0xa5,0xfb + .ascii "JD " + .byte 0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00 + .byte 0x00,0xff,0x00,0x00,0xff,0xff,0xff,0xff + .ascii " " + .ascii " " + .ascii " " + .ascii "JUE " +*debugee: +* bra debugee + tst.l 0xa10008 + bne SkipJoyDetect + tst.w 0xa1000c +SkipJoyDetect: + bne SkipSetup + lea Table,%a5 + movem.w (%a5)+,%d5-%d7 + movem.l (%a5)+,%a0-%a4 +* Check Version Number + move.b -0x10ff(%a1),%d0 + andi.b #0x0f,%d0 + beq WrongVersion +* Sega Security Code (SEGA) + move.l #0x53454741,0x2f00(%a1) +WrongVersion: + move.w (%a4),%d0 + moveq #0x00,%d0 + movea.l %d0,%a6 + move %a6,%usp +* Set VDP registers + moveq #0x17,%d1 +FillLoop: + move.b (%a5)+,%d5 + move.w %d5,(%a4) + add.w %d7,%d5 + dbra %d1,FillLoop + move.l (%a5)+,(%a4) + move.w %d0,(%a3) + move.w %d7,(%a1) + move.w %d7,(%a2) +L0250: + btst %d0,(%a1) + bne L0250 +* Put initial values into a00000 + moveq #0x25,%d2 +Filla: + move.b (%a5)+,(%a0)+ + dbra %d2,Filla + move.w %d0,(%a2) + move.w %d0,(%a1) + move.w %d7,(%a2) +L0262: + move.l %d0,-(%a6) + dbra %d6,L0262 + move.l (%a5)+,(%a4) + move.l (%a5)+,(%a4) +* Put initial values into c00000 + moveq #0x1f,%d3 +Filc0: + move.l %d0,(%a3) + dbra %d3,Filc0 + move.l (%a5)+,(%a4) +* Put initial values into c00000 + moveq #0x13,%d4 +Fillc1: + move.l %d0,(%a3) + dbra %d4,Fillc1 +* Put initial values into c00011 + moveq #0x03,%d5 +Fillc2: + move.b (%a5)+,0x0011(%a3) + dbra %d5,Fillc2 + move.w %d0,(%a2) + movem.l (%a6),%d0-%d7/%a0-%a6 + move #0x2700,%sr +SkipSetup: + bra Continue +Table: + dc.w 0x8000, 0x3fff, 0x0100, 0x00a0, 0x0000, 0x00a1, 0x1100, 0x00a1 + dc.w 0x1200, 0x00c0, 0x0000, 0x00c0, 0x0004, 0x0414, 0x302c, 0x0754 + dc.w 0x0000, 0x0000, 0x0000, 0x812b, 0x0001, 0x0100, 0x00ff, 0xff00 + dc.w 0x0080, 0x4000, 0x0080, 0xaf01, 0xd91f, 0x1127, 0x0021, 0x2600 + dc.w 0xf977, 0xedb0, 0xdde1, 0xfde1, 0xed47, 0xed4f, 0xd1e1, 0xf108 + dc.w 0xd9c1, 0xd1e1, 0xf1f9, 0xf3ed, 0x5636, 0xe9e9, 0x8104, 0x8f01 + dc.w 0xc000, 0x0000, 0x4000, 0x0010, 0x9fbf, 0xdfff + +Continue: + tst.w 0x00C00004 + +* set stack pointer +* clr.l %a7 + move.w #0,%a7 + +* user mode + move.w #0x2300,%sr + +* clear Genesis RAM + lea 0xff0000,%a0 + moveq #0,%d0 +clrram: move.w #0,(%a0)+ + subq.w #2,%d0 + bne clrram + +*---------------------------------------------------------- +* +* Load driver into the Z80 memory +* +*---------------------------------------------------------- + +* halt the Z80 + move.w #0x100,0xa11100 +* reset it + move.w #0x100,0xa11200 + + lea Z80Driver,%a0 + lea 0xa00000,%a1 + move.l #Z80DriverEnd,%d0 + move.l #Z80Driver,%d1 + sub.l %d1,%d0 +Z80loop: + move.b (%a0)+,(%a1)+ + subq.w #1,%d0 + bne Z80loop + +* enable the Z80 + move.w #0x0,0xa11100 + +*---------------------------------------------------------- + jmp main + +INT: + rte + +HBL: + /* addq.l #1,htimer */ + rte + +VBL: + /* addq.l #1,vtimer */ + move.l #vtimer,a0 + addq.l #1,(a0) + rte + +*------------------------------------------------ +* +* Get a random number. This routine +* was found in TOS. +* +* Output +* ------ +* d0 = random number +* +*------------------------------------------------ + + .globl random + +random: + move.l rand_num,%d0 + tst.l %d0 + bne .L1 + moveq #16,%d1 + lsl.l %d1,%d0 + or.l htimer,%d0 + move.l %d0,rand_num +.L1: + move.l #-1153374675,-(%sp) + move.l rand_num,-(%sp) + bsr lmul + addq.w #8,%sp + addq.l #1,%d0 + move.l %d0,rand_num + + lsr.l #8,%d0 + and.l #16777215,%d0 + rts + + +*------------------------------------------------ +* +* Copyright (c) 1988 by Sozobon, Limited. Author: Johann Ruegg +* +* Permission is granted to anyone to use this software for any purpose +* on any computer system, and to redistribute it freely, with the +* following restrictions: +* 1) No charge may be made other than reasonable charges for reproduction. +* 2) Modified versions must be clearly marked as such. +* 3) The authors are not responsible for any harmful consequences +* of using this software, even if they result from defects in it. +* +*------------------------------------------------ + +ldiv: + move.l 4(%a7),%d0 + bpl ld1 + neg.l %d0 +ld1: + move.l 8(%a7),%d1 + bpl ld2 + neg.l %d1 + eor.b #0x80,4(%a7) +ld2: + bsr i_ldiv /* d0 = d0/d1 */ + tst.b 4(%a7) + bpl ld3 + neg.l %d0 +ld3: + rts + +lmul: + move.l 4(%a7),%d0 + bpl lm1 + neg.l %d0 +lm1: + move.l 8(%a7),%d1 + bpl lm2 + neg.l %d1 + eor.b #0x80,4(%a7) +lm2: + bsr i_lmul /* d0 = d0*d1 */ + tst.b 4(%a7) + bpl lm3 + neg.l %d0 +lm3: + rts + +lrem: + move.l 4(%a7),%d0 + bpl lr1 + neg.l %d0 +lr1: + move.l 8(%a7),%d1 + bpl lr2 + neg.l %d1 +lr2: + bsr i_ldiv /* d1 = d0%d1 */ + move.l %d1,%d0 + tst.b 4(%a7) + bpl lr3 + neg.l %d0 +lr3: + rts + +ldivu: + move.l 4(%a7),%d0 + move.l 8(%a7),%d1 + bsr i_ldiv + rts + +lmulu: + move.l 4(%a7),%d0 + move.l 8(%a7),%d1 + bsr i_lmul + rts + +lremu: + move.l 4(%a7),%d0 + move.l 8(%a7),%d1 + bsr i_ldiv + move.l %d1,%d0 + rts +* +* A in d0, B in d1, return A*B in d0 +* +i_lmul: + move.l %d3,%a2 /* save d3 */ + move.w %d1,%d2 + mulu %d0,%d2 /* d2 = Al * Bl */ + + move.l %d1,%d3 + swap %d3 + mulu %d0,%d3 /* d3 = Al * Bh */ + + swap %d0 + mulu %d1,%d0 /* d0 = Ah * Bl */ + + add.l %d3,%d0 /* d0 = (Ah*Bl + Al*Bh) */ + swap %d0 + clr.w %d0 /* d0 = (Ah*Bl + Al*Bh) << 16 */ + + add.l %d2,%d0 /* d0 = A*B */ + move.l %a2,%d3 /* restore d3 */ + rts +* +*A in d0, B in d1, return A/B in d0, A%B in d1 +* +i_ldiv: + tst.l %d1 + bne nz1 + +* divide by zero +* divu #0,%d0 /* cause trap */ + move.l #0x80000000,%d0 + move.l %d0,%d1 + rts +nz1: + move.l %d3,%a2 /* save d3 */ + cmp.l %d1,%d0 + bhi norm + beq is1 +* AB and B is not 0 +norm: + cmp.l #1,%d1 + bne not1 +* B==1, so ret A, rem 0 + clr.l %d1 + move.l %a2,%d3 /* restore d3 */ + rts +* check for A short (implies B short also) +not1: + cmp.l #0xffff,%d0 + bhi slow +* A short and B short -- use 'divu' + divu %d1,%d0 /* d0 = REM:ANS */ + swap %d0 /* d0 = ANS:REM */ + clr.l %d1 + move.w %d0,%d1 /* d1 = REM */ + clr.w %d0 + swap %d0 + move.l %a2,%d3 /* restore d3 */ + rts +* check for B short +slow: + cmp.l #0xffff,%d1 + bhi slower +* A long and B short -- use special stuff from gnu + move.l %d0,%d2 + clr.w %d2 + swap %d2 + divu %d1,%d2 /* d2 = REM:ANS of Ahi/B */ + clr.l %d3 + move.w %d2,%d3 /* d3 = Ahi/B */ + swap %d3 + + move.w %d0,%d2 /* d2 = REM << 16 + Alo */ + divu %d1,%d2 /* d2 = REM:ANS of stuff/B */ + + move.l %d2,%d1 + clr.w %d1 + swap %d1 /* d1 = REM */ + + clr.l %d0 + move.w %d2,%d0 + add.l %d3,%d0 /* d0 = ANS */ + move.l %a2,%d3 /* restore d3 */ + rts +* A>B, B > 1 +slower: + move.l #1,%d2 + clr.l %d3 +moreadj: + cmp.l %d0,%d1 + bhs adj + add.l %d2,%d2 + add.l %d1,%d1 + bpl moreadj +* we shifted B until its >A or sign bit set +* we shifted #1 (d2) along with it +adj: + cmp.l %d0,%d1 + bhi ltuns + or.l %d2,%d3 + sub.l %d1,%d0 +ltuns: + lsr.l #1,%d1 + lsr.l #1,%d2 + bne adj +* d3=answer, d0=rem + move.l %d0,%d1 + move.l %d3,%d0 + move.l %a2,%d3 /* restore d3 */ + rts +*---------------------------------------------------------- +* +* Z80 Sound Driver +* +*---------------------------------------------------------- +Z80Driver: + dc.b 0xc3,0x46,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + dc.b 0x00,0x00,0x00,0x00,0x00,0x00,0xf3,0xed + dc.b 0x56,0x31,0x00,0x20,0x3a,0x39,0x00,0xb7 + dc.b 0xca,0x4c,0x00,0x21,0x3a,0x00,0x11,0x40 + dc.b 0x00,0x01,0x06,0x00,0xed,0xb0,0x3e,0x00 + dc.b 0x32,0x39,0x00,0x3e,0xb4,0x32,0x02,0x40 + dc.b 0x3e,0xc0,0x32,0x03,0x40,0x3e,0x2b,0x32 + dc.b 0x00,0x40,0x3e,0x80,0x32,0x01,0x40,0x3a + dc.b 0x43,0x00,0x4f,0x3a,0x44,0x00,0x47,0x3e + dc.b 0x06,0x3d,0xc2,0x81,0x00,0x21,0x00,0x60 + dc.b 0x3a,0x41,0x00,0x07,0x77,0x3a,0x42,0x00 + dc.b 0x77,0x0f,0x77,0x0f,0x77,0x0f,0x77,0x0f + dc.b 0x77,0x0f,0x77,0x0f,0x77,0x0f,0x77,0x3a + dc.b 0x40,0x00,0x6f,0x3a,0x41,0x00,0xf6,0x80 + dc.b 0x67,0x3e,0x2a,0x32,0x00,0x40,0x7e,0x32 + dc.b 0x01,0x40,0x21,0x40,0x00,0x7e,0xc6,0x01 + dc.b 0x77,0x23,0x7e,0xce,0x00,0x77,0x23,0x7e + dc.b 0xce,0x00,0x77,0x3a,0x39,0x00,0xb7,0xc2 + dc.b 0x4c,0x00,0x0b,0x78,0xb1,0xc2,0x7f,0x00 + dc.b 0x3a,0x45,0x00,0xb7,0xca,0x4c,0x00,0x3d + dc.b 0x3a,0x45,0x00,0x06,0xff,0x0e,0xff,0xc3 + dc.b 0x7f,0x00 +Z80DriverEnd: + + diff --git a/nshtest/test.s b/nshtest/test.s new file mode 100644 index 0000000..6e55b6c --- /dev/null +++ b/nshtest/test.s @@ -0,0 +1,442 @@ +################################################## +# # +# KeroDemo # +# # +# mic, 2005 # +# # +# # +# Assemble with m68k-coff-as # +# # +################################################## + +.text +.globl main + + + +################################################## +# # +# Register and bitmask definitions # +# # +################################################## + +.equ GFXDATA, 0xc00000 +.equ GFXCNTL, 0xc00004 + +.equ VDP0_E_HBI, 0x10 +.equ VDP0_E_DISPLAY, 0x02 +.equ VDP0_PLTT_FULL, 0x04 + +.equ VDP1_SMS_MODE, 0x80 +.equ VDP1_E_DISPLAY, 0x40 +.equ VDP1_E_VBI, 0x20 +.equ VDP1_E_DMA, 0x10 +.equ VDP1_NTSC, 0x00 +.equ VDP1_PAL, 0x08 +.equ VDP1_RESERVED, 0x04 + +.equ VDP12_SPR_SHADOWS, 0x08 +.equ VDP12_SCREEN_V224, 0x00 +.equ VDP12_SCREEN_V448, 0x04 +.equ VDP12_PROGRESSIVE, 0x00 +.equ VDP12_INTERLACED, 0x02 +.equ VDP12_SCREEN_H256, 0x00 +.equ VDP12_SCREEN_H320, 0x81 + +.equ VDP16_MAP_V32, 0x00 +.equ VDP16_MAP_V64, 0x10 +.equ VDP16_MAP_V128, 0x30 +.equ VDP16_MAP_H32, 0x00 +.equ VDP16_MAP_H64, 0x01 +.equ VDP16_MAP_H128, 0x03 + + + +################################################## +# # +# MACROS # +# # +################################################## + + +/* Write val to VDP register reg */ +.macro write_vdp_reg reg val + move.w #((\reg << 8) + 0x8000 + \val),(a3) +.endm + + +/* For immediate addresses */ +.macro VRAM_ADDR reg adr + move.l #(((0x4000 + (\adr & 0x3fff)) << 16) + (\adr >> 14)),\reg +.endm + + +/* For indirect (variable) addresses. + Destroys d6-d7. */ +.macro VRAM_ADDR_var reg adr + move.l \adr,d6 + move.l \adr,d7 + and.w #0x3fff,d6 + lsr.w #7,d7 + lsr.w #7,d7 + add.w #0x4000,d6 + lsl.l #7,d6 + lsl.l #7,d6 + lsl.l #2,d6 + or.l d7,d6 + move.l d6,\reg +.endm + + +.macro CRAM_ADDR reg adr + move.l #(((0xc000 + (\adr & 0x3fff)) << 16) + (\adr >> 14)),\reg +.endm + + +/* For indirect (variable) addresses */ +.macro CRAM_ADDR_var reg adr + move.l \adr,d6 + move.l \adr,d7 + and.w #0x3fff,d6 + lsr.w #7,d7 + lsr.w #7,d7 + add.w #0xc000,d6 + lsl.l #7,d6 + lsl.l #7,d6 + lsl.l #2,d6 + or.l d7,d6 + move.l d6,\reg +.endm + + +.macro VSCROLL_ADDR reg adr + move.l #(((0x4000 + (\adr & 0x3fff)) << 16) + ((\adr >> 14) | 0x10)),\reg +.endm + + +.macro HSCROLL_ADDR reg adr + move.l #(((0x4000 + (\adr & 0x3fff)) << 16) + (\adr >> 14)),\reg +.endm + + +colors: + dc.w 0x0040,0x0080,0x000e,0x00e0,0x0e00,0x00ee +pattern: + dc.l 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000 + dc.l 0x22334455,0x22334455,0x22334455,0x22334455,0x22334455,0x22334455,0x22334455,0x22334455 + /* shadow sprite */ + dc.l 0x00000fff + dc.l 0x0000ffff + dc.l 0x00ffffff + dc.l 0x00ffffff + dc.l 0x0fffffff + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0xffffffff + /* */ + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0x0fffffff + dc.l 0x00ffffff + dc.l 0x00ffffff + dc.l 0x0000ffff + dc.l 0x00000fff + /* */ + dc.l 0xfff00000 + dc.l 0xffff0000 + dc.l 0xffffff00 + dc.l 0xffffff00 + dc.l 0xfffffff0 + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0xffffffff + /* */ + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0xffffffff + dc.l 0xfffffff0 + dc.l 0xffffff00 + dc.l 0xffffff00 + dc.l 0xffff0000 + dc.l 0xfff00000 + /* hilight sprite */ + dc.l 0x00000eee + dc.l 0x0000eeee + dc.l 0x00eeeeee + dc.l 0x00eeeeee + dc.l 0x0eeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + /* */ + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0x0eeeeeee + dc.l 0x00eeeeee + dc.l 0x00eeeeee + dc.l 0x0000eeee + dc.l 0x00000eee + /* */ + dc.l 0xeee00000 + dc.l 0xeeee0000 + dc.l 0xeeeeee00 + dc.l 0xeeeeee00 + dc.l 0xeeeeeee0 + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + /* */ + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeeee + dc.l 0xeeeeeee0 + dc.l 0xeeeeee00 + dc.l 0xeeeeee00 + dc.l 0xeeee0000 + dc.l 0xeee00000 + + +sprite_data: + /* Y size link attr X */ + dc.w 10+128; dc.b 0x05; dc.b 1; dc.w 0x6002; dc.w 0 + dc.w 30+128; dc.b 0x05; dc.b 2; dc.w 0x6006; dc.w 0 + dc.w 60+128; dc.b 0x05; dc.b 3; dc.w 0xe002; dc.w 0 + dc.w 80+128; dc.b 0x05; dc.b 4; dc.w 0xe006; dc.w 0 + dc.w 120+128; dc.b 0x05; dc.b 5; dc.w 0x6002; dc.w 0 + dc.w 140+128; dc.b 0x05; dc.b 6; dc.w 0x6006; dc.w 0 + dc.w 170+128; dc.b 0x05; dc.b 7; dc.w 0xe002; dc.w 0 + dc.w 190+128; dc.b 0x05; dc.b 0; dc.w 0xe006; dc.w 0 +sprite_data_end: + + +################################################## +# # +# MAIN PROGRAM # +# # +################################################## + +main: + /* Initialize VDP */ + jsr init_gfx + + /* Load color data */ + movea.l #0,a3 + move.l #colors,a4 + moveq.l #6,d4 + jsr load_colors + + /* load patterns */ + movea.l #0,a3 + movea.l #pattern,a4 + move.l #10,d4 + jsr load_tiles + + /* generate A layer map */ + movea.l #0xe000+10*2,a6 + move.l #28-1,d4 +lmaploop0: + movea.l a6,a3 + jsr load_prepare + + moveq.l #6-1,d3 +0: move.l #0x00010001,(a3) + dbra d3,0b + + moveq.l #9-1,d3 +0: move.l #0x80018001,(a3) + dbra d3,0b + + add.l #64*2,a6 + dbra d4,lmaploop0 + + /* generate B layer map */ + movea.l #0xc000+64*14*2,a3 + jsr load_prepare + + move.l #64*14/2-1,d3 +0: move.l #0x80008000,(a3) + dbra d3,0b + + /* upload sprite data */ + movea.l #0xfc00,a3 + jsr load_prepare + movea.l #sprite_data,a0 + + move.l #(sprite_data_end-sprite_data)/2-1,d3 +0: move.l (a0)+,(a3) + dbra d3,0b + + jsr wait_vsync + +################################################## +# # +# MAIN LOOP # +# # +################################################## + +forever: + movea.l #vtimer,a0 + move.l (a0),d4 + and.w #0x1ff,d4 + movea.l #0xfc06,a6 + moveq.l #8-1,d5 + +0: + movea.l a6,a3 + jsr load_prepare + move.w d4,(a3) + addq.w #8,a6 + dbra d5,0b + + jsr wait_vsync + bra forever + + + +################################################# +# # +# Initialize VDP registers # +# # +################################################# + +init_gfx: + move.l #GFXCNTL,a3 + write_vdp_reg 0,(VDP0_E_DISPLAY + VDP0_PLTT_FULL) + write_vdp_reg 1,(VDP1_E_VBI + VDP1_E_DISPLAY + VDP1_E_DMA + VDP1_RESERVED) + write_vdp_reg 2,(0xe000 >> 10) /* Screen map a adress */ + write_vdp_reg 3,(0xe000 >> 10) /* Window address */ + write_vdp_reg 4,(0xc000 >> 13) /* Screen map b address */ + write_vdp_reg 5,(0xfc00 >> 9) /* Sprite address */ + write_vdp_reg 6,0 + write_vdp_reg 7,1 /* Border color */ + write_vdp_reg 10,1 /* Lines per hblank interrupt */ + write_vdp_reg 11,0 /* 2-cell vertical scrolling */ + write_vdp_reg 12,(VDP12_SCREEN_V224 | VDP12_SCREEN_H320 | VDP12_SPR_SHADOWS) + write_vdp_reg 13,(0x6000 >> 10) /* Horizontal scroll address */ + write_vdp_reg 15,2 + write_vdp_reg 16,(VDP16_MAP_V32 + VDP16_MAP_H64) + write_vdp_reg 17,0 + write_vdp_reg 18,0xff + rts + + + +################################################# +# # +# Load tile data from ROM # +# # +# Parameters: # +# a3: VRAM base # +# a4: pattern address # +# d4: number of tiles to load # +# Destroys a2,d0,d6-d7... # +# # +################################################# + +load_tiles: + move.l #GFXCNTL,a2 + VRAM_ADDR_var d0,a3 + move.l d0,(a2) + lsl #3,d4 + + move.l #GFXDATA,a3 + subq.l #1,d4 +_copy_tile_data: + move.l (a4)+,(a3) + dbra d4,_copy_tile_data + + rts + + +load_prepare: + move.l #GFXCNTL,a2 + VRAM_ADDR_var d0,a3 + move.l d0,(a2) + move.l #GFXDATA,a3 + + rts + + +################################################# +# # +# Clear one of the screen maps # +# # +# Parameters: # +# a0: Map address # +# d0: Data to write to each map entry # +# # +################################################# + +clear_map: + move.l #GFXCNTL,a4 + VRAM_ADDR_var d1,a0 + move.l d1,(a4) + move.l #GFXDATA,a3 + move.w #1023,d1 /* Loop counter */ +_clear_map_loop: + move.w d0,(a3) + move.w d0,(a3) + dbra d1,_clear_map_loop + rts + + +################################################# +# # +# Load color data from ROM # +# # +# Parameters: # +# a3: CRAM base # +# a4: color list address # +# d4: number of colors to load # +# # +################################################# + +load_colors: + move.l #GFXCNTL,a2 + CRAM_ADDR_var d0,a3 + move.l d0,(a2) + + move.l #GFXDATA,a3 + subq.w #1,d4 +_copy_color_data: + move.w (a4)+,(a3) + dbra d4,_copy_color_data + + rts + + +################################################# +# # +# Wait for next VBlank interrupt # +# # +################################################# + +wait_vsync: + movea.l #vtimer,a0 + move.l (a0),a1 +_wait_change: + stop #0x2000 + cmp.l (a0),a1 + beq _wait_change + rts + + +################################################# +# # +# RAM DATA # +# # +################################################# + +.bss +.globl htimer +.globl vtimer +.globl rand_num +htimer: .long 0 +vtimer: .long 0 +rand_num: .long 0 +scrollx: .long 0 + +.end + -- 2.39.5