[cyclone68000.git] / OpAny.cpp

\r
// This file is part of the Cyclone 68000 Emulator\r
\r
// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r
// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)\r
\r
// This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r
// You can choose the license that has the most advantages for you.\r
\r
// SVN repository can be found at http://code.google.com/p/cyclone68000/\r
\r
\r
#include "app.h"\r
\r
int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
\r
static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
\r
static unsigned short OpRead16(unsigned int a)\r
{\r
  return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );\r
}\r
\r
// For opcode 'op' use handler 'use'\r
void OpUse(int op,int use)\r
{\r
  char text[64]="";\r
  CyJump[op]=use;\r
\r
  if (op!=use) return;\r
\r
  // Disassemble opcode\r
  DisaPc=0;\r
  DisaText=text;\r
  DisaWord=OpRead16;\r
\r
  DisaGet();\r
  ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
}\r
\r
void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)\r
{\r
  int last_op_count=arm_op_count;\r
\r
  Cycles=0;\r
  OpUse(op,op); // This opcode obviously uses this handler\r
  ot("Op%.4x%s\n", op, ms?"":":");\r
\r
  if (supervisor_check)\r
  {\r
    // checks for supervisor bit, if not set, jumps to SuperEnd()\r
    // also sets r11 to SR high value, SuperChange() uses this\r
    ot("  ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
  }\r
  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
  {\r
#if MEMHANDLERS_NEED_PREV_PC\r
    ot("  str r4,[r7,#0x50] ;@ Save prev PC + 2\n");\r
#endif\r
#if MEMHANDLERS_NEED_CYCLES\r
    ot("  str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
#endif\r
  }\r
  if (supervisor_check)\r
  {\r
    ot("  tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
    ot("  beq WrongPrivilegeMode ;@ No\n");\r
  }\r
  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
#if MEMHANDLERS_CHANGE_CYCLES\r
    if (op_changes_cycles)\r
      ot("  mov r5,#0\n");\r
#endif\r
  }\r
  if (last_op_count!=arm_op_count)\r
    ot("\n");\r
  pc_dirty = 1;\r
  opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
}\r
\r
void OpEnd(int sea, int tea)\r
{\r
  int did_fetch=0;\r
  opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
#if MEMHANDLERS_CHANGE_CYCLES\r
  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
  {\r
    if (opend_op_changes_cycles)\r
    {\r
      ot("  ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
      ot("  ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
      ot("  add r5,r0,r5\n");\r
      did_fetch=1;\r
    }\r
    else\r
    {\r
      ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
    }\r
  }\r
#endif\r
  if (!did_fetch)\r
    ot("  ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
  if (opend_check_trace)\r
    ot("  ldr r1,[r7,#0x44]\n");\r
  ot("  subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
  if (opend_check_trace)\r
  {\r
    ot(";@ CheckTrace:\n");\r
    ot("  tst r1,#0x80\n");\r
    ot("  bne CycloneDoTraceWithChecks\n");\r
    ot("  cmp r5,#0\n");\r
  }\r
  if (opend_check_interrupt)\r
  {\r
    ot("  ble CycloneEnd\n");\r
    ot(";@ CheckInterrupt:\n");\r
    if (!opend_check_trace)\r
      ot("  ldr r1,[r7,#0x44]\n");\r
    ot("  movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as  ldrb r0,[r7,#0x47]\r
    ot("  ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
    ot("  cmp r0,#6 ;@ irq>6 ?\n");\r
    ot("  andle r1,r1,#7 ;@ Get interrupt mask\n");\r
    ot("  cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
    ot("  ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
    ot("  b CycloneDoInterruptGoBack\n");\r
  }\r
  else\r
  {\r
    ot("  ldrgt pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
    ot("  b CycloneEnd\n");\r
  }\r
  ot("\n");\r
}\r
\r
int OpBase(int op,int size,int sepa)\r
{\r
  int ea=op&0x3f; // Get Effective Address\r
  if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7\r
  if (size==0&&(ea==0x1f || ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)\r
  if (ea<0x38) return op&~7;   // Use 1 handler for (a0)-(a7), etc...\r
  return op;\r
}\r
\r
// Get flags, trashes r2\r
int OpGetFlags(int subtract,int xbit,int specialz)\r
{\r
  if (specialz) ot("  orr r2,r10,#0xb0000000 ;@ for old Z\n");\r
\r
  ot("  mrs r10,cpsr ;@ r10=flags\n");\r
\r
  if (specialz) ot("  andeq r10,r10,r2 ;@ fix Z\n");\r
\r
  if (subtract) ot("  eor r10,r10,#0x20000000 ;@ Invert carry\n");\r
\r
  if (xbit)\r
  {\r
    ot("  str r10,[r7,#0x4c] ;@ Save X bit\n");\r
  }\r
  return 0;\r
}\r
\r
void OpGetFlagsNZ(int rd)\r
{\r
  ot("  and r10,r%d,#0x80000000 ;@ r10=N_flag\n",rd);\r
  ot("  orreq r10,r10,#0x40000000 ;@ get NZ, clear CV\n");\r
}\r
\r
// size 0=8bit, 1=16bit\r
void SignExtend(int rd, int rs, int size)\r
{\r
  if (size >= 2)\r
  {\r
    if (rd != rs)\r
      ot("  mov r%d,r%d\n", rd, rs);\r
    return;\r
  }\r
#if defined(HAVE_ARMv6) && (HAVE_ARMv6)\r
  if (size == 1)\r
    ot("  sxth r%d,r%d ;@ sign extend\n", rd, rs);\r
  else\r
    ot("  sxtb r%d,r%d ;@ sign extend\n", rd, rs);\r
#else\r
  int shift = size ? 16 : 24;\r
  ot("  mov r%d,r%d,asl #%d\n", rd, rs, shift);\r
  ot("  mov r%d,r%d,asr #%d ;@ sign extend\n", rd, rd, shift);\r
#endif\r
}\r
\r
void ZeroExtend(int rd, int rs, int size)\r
{\r
  if (size >= 2)\r
  {\r
    if (rd != rs)\r
      ot("  mov r%d,r%d\n", rd, rs);\r
    return;\r
  }\r
#if defined(HAVE_ARMv6) && (HAVE_ARMv6)\r
  if (size == 1)\r
    ot("  uxth r%d,r%d ;@ zero extend\n", rd, rs);\r
  else\r
#else\r
  if (size == 1)\r
  {\r
    ot("  mov r%d,r%d,lsl #16\n", rd, rs);\r
    ot("  mov r%d,r%d,lsr #16 ;@ zero extend\n", rd, rd);\r
  }\r
  else\r
#endif\r
  {\r
    ot("  and r%d,r%d,#0xff ;@ zero extend\n", rd, rs);\r
  }\r
}\r
\r
// -----------------------------------------------------------------\r
\r
int g_op;\r
\r
void OpAny(int op)\r
{\r
  memset(OpData,0x33,sizeof(OpData));\r
  OpData[0]=(unsigned char)(op>>8);\r
  OpData[1]=(unsigned char)op;\r
  g_op=op;\r
\r
  if ((op&0xf100)==0x0000) OpArith(op);    // +\r
  if ((op&0xc000)==0x0000) OpMove(op);     // +\r
  if ((op&0xf5bf)==0x003c) OpArithSr(op);  // + Ori/Andi/Eori $nnnn,sr\r
  if ((op&0xf100)==0x0100) OpBtstReg(op);  // +\r
  if ((op&0xf138)==0x0108) OpMovep(op);    // +\r
  if ((op&0xff00)==0x0800) OpBtstImm(op);  // +\r
  if ((op&0xf900)==0x4000) OpNeg(op);      // +\r
  if ((op&0xf140)==0x4100) OpChk(op);      // +\r
  if ((op&0xf1c0)==0x41c0) OpLea(op);      // +\r
  if ((op&0xf9c0)==0x40c0) OpMoveSr(op);   // +\r
  if ((op&0xffc0)==0x4800) OpNbcd(op);     // +\r
  if ((op&0xfff8)==0x4840) OpSwap(op);     // +\r
  if ((op&0xffc0)==0x4840) OpPea(op);      // +\r
  if ((op&0xffb8)==0x4880) OpExt(op);      // +\r
  if ((op&0xfb80)==0x4880) OpMovem(op);    // +\r
  if ((op&0xff00)==0x4a00) OpTst(op);      // +\r
  if ((op&0xffc0)==0x4ac0) OpTas(op);      // +\r
  if ((op&0xfff0)==0x4e40) OpTrap(op);     // +\r
  if ((op&0xfff8)==0x4e50) OpLink(op);     // +\r
  if ((op&0xfff8)==0x4e58) OpUnlk(op);     // +\r
  if ((op&0xfff0)==0x4e60) OpMoveUsp(op);  // +\r
  if ((op&0xfff8)==0x4e70) Op4E70(op);     // + Reset/Rts etc\r
  if ((op&0xfffd)==0x4e70) OpStopReset(op);// +\r
  if ((op&0xff80)==0x4e80) OpJsr(op);      // +\r
  if ((op&0xf000)==0x5000) OpAddq(op);     // +\r
  if ((op&0xf0c0)==0x50c0) OpSet(op);      // +\r
  if ((op&0xf0f8)==0x50c8) OpDbra(op);     // +\r
  if ((op&0xf000)==0x6000) OpBranch(op);   // +\r
  if ((op&0xf100)==0x7000) OpMoveq(op);    // +\r
  if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add\r
  if ((op&0xb1f0)==0x8100) OpAbcd(op);     // +\r
  if ((op&0xb0c0)==0x80c0) OpMul(op);      // +\r
  if ((op&0x90c0)==0x90c0) OpAritha(op);   // +\r
  if ((op&0xb130)==0x9100) OpAddx(op);     // +\r
  if ((op&0xf000)==0xb000) OpCmpEor(op);   // +\r
  if ((op&0xf138)==0xb108) OpCmpm(op);     // +\r
  if ((op&0xf130)==0xc100) OpExg(op);      // +\r
  if ((op&0xf000)==0xe000) OpAsr(op);      // + Asr/l/Ror/l etc\r
  if ((op&0xf8c0)==0xe0c0) OpAsrEa(op);    // +\r
\r
  if (op==0xffff)\r
  {\r
    SuperEnd();\r
  }\r
}\r
\r
Commit	Line	Data
6003a768	1	\r
619b1824	2	// This file is part of the Cyclone 68000 Emulator\r
619b1824	3	\r
d9d77995	4	// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r
d9d77995	5	// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)\r
c41b9b97	6	\r
619b1824	7	// This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r
	8	// You can choose the license that has the most advantages for you.\r
	9	\r
	10	// SVN repository can be found at http://code.google.com/p/cyclone68000/\r
	11	\r
d9d77995	12	\r
6003a768	13	#include "app.h"\r
6003a768	14	\r
d9d77995	15	int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
d9d77995	16	\r
6003a768	17	static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
6003a768	18	\r
d9d77995	19	static unsigned short OpRead16(unsigned int a)\r
6003a768	20	{\r
	21	return (unsigned short)( (OpData[a&15]<<8) \| OpData[(a+1)&15] );\r
	22	}\r
	23	\r
	24	// For opcode 'op' use handler 'use'\r
	25	void OpUse(int op,int use)\r
	26	{\r
	27	char text[64]="";\r
d9d77995	28	CyJump[op]=use;\r
6003a768	29	\r
	30	if (op!=use) return;\r
	31	\r
	32	// Disassemble opcode\r
	33	DisaPc=0;\r
	34	DisaText=text;\r
	35	DisaWord=OpRead16;\r
	36	\r
	37	DisaGet();\r
	38	ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
	39	}\r
	40	\r
d9d77995	41	void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)\r
6003a768	42	{\r
d9d77995	43	int last_op_count=arm_op_count;\r
6003a768	44	\r
6003a768	45	Cycles=0;\r
	46	OpUse(op,op); // This opcode obviously uses this handler\r
	47	ot("Op%.4x%s\n", op, ms?"":":");\r
d9d77995	48	\r
	49	if (supervisor_check)\r
	50	{\r
	51	// checks for supervisor bit, if not set, jumps to SuperEnd()\r
	52	// also sets r11 to SR high value, SuperChange() uses this\r
	53	ot(" ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
	54	}\r
	55	if ((sea >= 0x10 && sea != 0x3c) \|\| (tea >= 0x10 && tea != 0x3c))\r
	56	{\r
	57	#if MEMHANDLERS_NEED_PREV_PC\r
	58	ot(" str r4,[r7,#0x50] ;@ Save prev PC + 2\n");\r
	59	#endif\r
	60	#if MEMHANDLERS_NEED_CYCLES\r
	61	ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
	62	#endif\r
	63	}\r
	64	if (supervisor_check)\r
	65	{\r
	66	ot(" tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
	67	ot(" beq WrongPrivilegeMode ;@ No\n");\r
	68	}\r
	69	if ((sea >= 0x10 && sea != 0x3c) \|\| (tea >= 0x10 && tea != 0x3c)) {\r
	70	#if MEMHANDLERS_CHANGE_CYCLES\r
	71	if (op_changes_cycles)\r
	72	ot(" mov r5,#0\n");\r
	73	#endif\r
	74	}\r
	75	if (last_op_count!=arm_op_count)\r
	76	ot("\n");\r
	77	pc_dirty = 1;\r
	78	opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
6003a768	79	}\r
6003a768	80	\r
d9d77995	81	void OpEnd(int sea, int tea)\r
6003a768	82	{\r
d9d77995	83	int did_fetch=0;\r
	84	opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
	85	#if MEMHANDLERS_CHANGE_CYCLES\r
	86	if ((sea >= 0x10 && sea != 0x3c) \|\| (tea >= 0x10 && tea != 0x3c))\r
	87	{\r
	88	if (opend_op_changes_cycles)\r
	89	{\r
	90	ot(" ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
	91	ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
	92	ot(" add r5,r0,r5\n");\r
	93	did_fetch=1;\r
	94	}\r
	95	else\r
	96	{\r
	97	ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
	98	}\r
	99	}\r
	100	#endif\r
	101	if (!did_fetch)\r
	102	ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
	103	if (opend_check_trace)\r
	104	ot(" ldr r1,[r7,#0x44]\n");\r
6003a768	105	ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
d9d77995	106	if (opend_check_trace)\r
	107	{\r
	108	ot(";@ CheckTrace:\n");\r
	109	ot(" tst r1,#0x80\n");\r
	110	ot(" bne CycloneDoTraceWithChecks\n");\r
	111	ot(" cmp r5,#0\n");\r
	112	}\r
	113	if (opend_check_interrupt)\r
	114	{\r
c204973a	115	ot(" ble CycloneEnd\n");\r
d9d77995	116	ot(";@ CheckInterrupt:\n");\r
	117	if (!opend_check_trace)\r
	118	ot(" ldr r1,[r7,#0x44]\n");\r
	119	ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
	120	ot(" ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
	121	ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
	122	ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
	123	ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
	124	ot(" ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
	125	ot(" b CycloneDoInterruptGoBack\n");\r
	126	}\r
	127	else\r
	128	{\r
c204973a	129	ot(" ldrgt pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
d9d77995	130	ot(" b CycloneEnd\n");\r
d9d77995	131	}\r
6003a768	132	ot("\n");\r
	133	}\r
	134	\r
d9d77995	135	int OpBase(int op,int size,int sepa)\r
6003a768	136	{\r
6003a768	137	int ea=op&0x3f; // Get Effective Address\r
d9d77995	138	if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7\r
d9d77995	139	if (size==0&&(ea==0x1f \|\| ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)\r
6003a768	140	if (ea<0x38) return op&~7; // Use 1 handler for (a0)-(a7), etc...\r
	141	return op;\r
	142	}\r
	143	\r
	144	// Get flags, trashes r2\r
d9d77995	145	int OpGetFlags(int subtract,int xbit,int specialz)\r
6003a768	146	{\r
d9d77995	147	if (specialz) ot(" orr r2,r10,#0xb0000000 ;@ for old Z\n");\r
	148	\r
	149	ot(" mrs r10,cpsr ;@ r10=flags\n");\r
6003a768	150	\r
d9d77995	151	if (specialz) ot(" andeq r10,r10,r2 ;@ fix Z\n");\r
6003a768	152	\r
d9d77995	153	if (subtract) ot(" eor r10,r10,#0x20000000 ;@ Invert carry\n");\r
	154	\r
	155	if (xbit)\r
6003a768	156	{\r
d9d77995	157	ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
6003a768	158	}\r
	159	return 0;\r
	160	}\r
	161	\r
3504ce94	162	void OpGetFlagsNZ(int rd)\r
	163	{\r
	164	ot(" and r10,r%d,#0x80000000 ;@ r10=N_flag\n",rd);\r
	165	ot(" orreq r10,r10,#0x40000000 ;@ get NZ, clear CV\n");\r
	166	}\r
	167	\r
19881760	168	// size 0=8bit, 1=16bit\r
	169	void SignExtend(int rd, int rs, int size)\r
	170	{\r
	171	if (size >= 2)\r
	172	{\r
	173	if (rd != rs)\r
	174	ot(" mov r%d,r%d\n", rd, rs);\r
	175	return;\r
	176	}\r
	177	#if defined(HAVE_ARMv6) && (HAVE_ARMv6)\r
	178	if (size == 1)\r
	179	ot(" sxth r%d,r%d ;@ sign extend\n", rd, rs);\r
	180	else\r
	181	ot(" sxtb r%d,r%d ;@ sign extend\n", rd, rs);\r
	182	#else\r
	183	int shift = size ? 16 : 24;\r
	184	ot(" mov r%d,r%d,asl #%d\n", rd, rs, shift);\r
	185	ot(" mov r%d,r%d,asr #%d ;@ sign extend\n", rd, rd, shift);\r
	186	#endif\r
	187	}\r
	188	\r
	189	void ZeroExtend(int rd, int rs, int size)\r
	190	{\r
	191	if (size >= 2)\r
	192	{\r
	193	if (rd != rs)\r
	194	ot(" mov r%d,r%d\n", rd, rs);\r
	195	return;\r
	196	}\r
	197	#if defined(HAVE_ARMv6) && (HAVE_ARMv6)\r
	198	if (size == 1)\r
	199	ot(" uxth r%d,r%d ;@ zero extend\n", rd, rs);\r
	200	else\r
	201	#else\r
	202	if (size == 1)\r
	203	{\r
	204	ot(" mov r%d,r%d,lsl #16\n", rd, rs);\r
	205	ot(" mov r%d,r%d,lsr #16 ;@ zero extend\n", rd, rd);\r
	206	}\r
	207	else\r
	208	#endif\r
	209	{\r
	210	ot(" and r%d,r%d,#0xff ;@ zero extend\n", rd, rs);\r
	211	}\r
	212	}\r
	213	\r
6003a768	214	// -----------------------------------------------------------------\r
6003a768	215	\r
d9d77995	216	int g_op;\r
d9d77995	217	\r
6003a768	218	void OpAny(int op)\r
	219	{\r
	220	memset(OpData,0x33,sizeof(OpData));\r
	221	OpData[0]=(unsigned char)(op>>8);\r
	222	OpData[1]=(unsigned char)op;\r
d9d77995	223	g_op=op;\r
	224	\r
	225	if ((op&0xf100)==0x0000) OpArith(op); // +\r
	226	if ((op&0xc000)==0x0000) OpMove(op); // +\r
	227	if ((op&0xf5bf)==0x003c) OpArithSr(op); // + Ori/Andi/Eori $nnnn,sr\r
	228	if ((op&0xf100)==0x0100) OpBtstReg(op); // +\r
	229	if ((op&0xf138)==0x0108) OpMovep(op); // +\r
	230	if ((op&0xff00)==0x0800) OpBtstImm(op); // +\r
	231	if ((op&0xf900)==0x4000) OpNeg(op); // +\r
	232	if ((op&0xf140)==0x4100) OpChk(op); // +\r
	233	if ((op&0xf1c0)==0x41c0) OpLea(op); // +\r
	234	if ((op&0xf9c0)==0x40c0) OpMoveSr(op); // +\r
	235	if ((op&0xffc0)==0x4800) OpNbcd(op); // +\r
	236	if ((op&0xfff8)==0x4840) OpSwap(op); // +\r
	237	if ((op&0xffc0)==0x4840) OpPea(op); // +\r
	238	if ((op&0xffb8)==0x4880) OpExt(op); // +\r
	239	if ((op&0xfb80)==0x4880) OpMovem(op); // +\r
	240	if ((op&0xff00)==0x4a00) OpTst(op); // +\r
	241	if ((op&0xffc0)==0x4ac0) OpTas(op); // +\r
	242	if ((op&0xfff0)==0x4e40) OpTrap(op); // +\r
	243	if ((op&0xfff8)==0x4e50) OpLink(op); // +\r
	244	if ((op&0xfff8)==0x4e58) OpUnlk(op); // +\r
	245	if ((op&0xfff0)==0x4e60) OpMoveUsp(op); // +\r
	246	if ((op&0xfff8)==0x4e70) Op4E70(op); // + Reset/Rts etc\r
	247	if ((op&0xfffd)==0x4e70) OpStopReset(op);// +\r
	248	if ((op&0xff80)==0x4e80) OpJsr(op); // +\r
	249	if ((op&0xf000)==0x5000) OpAddq(op); // +\r
	250	if ((op&0xf0c0)==0x50c0) OpSet(op); // +\r
	251	if ((op&0xf0f8)==0x50c8) OpDbra(op); // +\r
	252	if ((op&0xf000)==0x6000) OpBranch(op); // +\r
	253	if ((op&0xf100)==0x7000) OpMoveq(op); // +\r
	254	if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add\r
	255	if ((op&0xb1f0)==0x8100) OpAbcd(op); // +\r
	256	if ((op&0xb0c0)==0x80c0) OpMul(op); // +\r
	257	if ((op&0x90c0)==0x90c0) OpAritha(op); // +\r
	258	if ((op&0xb130)==0x9100) OpAddx(op); // +\r
	259	if ((op&0xf000)==0xb000) OpCmpEor(op); // +\r
	260	if ((op&0xf138)==0xb108) OpCmpm(op); // +\r
	261	if ((op&0xf130)==0xc100) OpExg(op); // +\r
	262	if ((op&0xf000)==0xe000) OpAsr(op); // + Asr/l/Ror/l etc\r
	263	if ((op&0xf8c0)==0xe0c0) OpAsrEa(op); // +\r
	264	\r
	265	if (op==0xffff)\r
	266	{\r
	267	SuperEnd();\r
	268	}\r
6003a768	269	}\r
d9d77995	270	\r