X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=cyclone68000.git;a=blobdiff_plain;f=Cyclone%2FOpBranch.cpp;h=c37620ad7b975547f406a86ca2c20e528be77596;hp=145fd086258073e20d1a5374a48caf200987d95e;hb=d9d77995ec88700f438b3638df179a014bf4f6b3;hpb=7441f043a0ba83bd919db25bf3b8e35ae635012a

diff --git a/Cyclone/OpBranch.cpp b/Cyclone/OpBranch.cpp
index 145fd08..c37620a 100644
--- a/Cyclone/OpBranch.cpp
+++ b/Cyclone/OpBranch.cpp
@@ -1,26 +1,33 @@
 
 // This file is part of the Cyclone 68000 Emulator
 
-// Copyright (c) 2011 FinalDave (emudave (at) gmail.com)
+// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)
+// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)
 
 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
 // You can choose the license that has the most advantages for you.
 
 // SVN repository can be found at http://code.google.com/p/cyclone68000/
 
+
 #include "app.h"
 
-static void CheckPc()
+// in/out address in r0, trashes all temp regs
+static void CheckPc(void)
 {
-  ot(";@ Check Memory Base+pc (r4)\n");
-  ot("  add lr,pc,#4\n");
-  ot("  mov r0,r4\n");
+#if USE_CHECKPC_CALLBACK
+ #ifdef MEMHANDLERS_DIRECT_PREFIX
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);
+ #else
+  ot(";@ Check Memory Base+pc\n");
+  ot("  mov lr,pc\n");
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
-  ot("  mov r4,r0\n");
   ot("\n");
+ #endif
+#endif
 }
 
-// Push 32-bit value in r1 - trashes r0-r3
+// Push 32-bit value in r1 - trashes r0-r3,r12,lr
 void OpPush32()
 {
   ot(";@ Push r1 onto stack\n");
@@ -31,7 +38,7 @@ void OpPush32()
   ot("\n");
 }
 
-// Push SR - trashes r0-r3
+// Push SR - trashes r0-r3,r12,lr
 void OpPushSr(int high)
 {
   ot(";@ Push SR:\n");
@@ -55,7 +62,7 @@ static void PopSr(int high)
   OpRegToFlags(high);
 }
 
-// Pop PC - assumes r10=Memory Base - trashes r0-r3
+// Pop PC - trashes r0-r3
 static void PopPc()
 {
   ot(";@ Pop PC:\n");
@@ -63,9 +70,15 @@ static void PopPc()
   ot("  add r1,r0,#4 ;@ Postincrement A7\n");
   ot("  str r1,[r7,#0x3c] ;@ Save A7\n");
   MemHandler(0,2);
-  ot("  add r4,r0,r10 ;@ r4=Memory Base+PC\n");
+  ot("  ldr r1,[r7,#0x60] ;@ Get Memory base\n");
+  ot("  add r0,r0,r1 ;@ Memory Base+PC\n");
   ot("\n");
   CheckPc();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+  ot("  mov r4,r0\n");
+#else
+  ot("  bic r4,r0,#1\n");
+#endif
 }
 
 int OpTrap(int op)
@@ -75,15 +88,13 @@ int OpTrap(int op)
   use=op&~0xf;
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(use);
+  OpStart(op,0x10);
   ot("  and r0,r8,#0xf ;@ Get trap number\n");
-  ot("  orr r0,r0,#0x20\n");
-  ot("  mov r0,r0,asl #2\n");
-  ot("  str r0,[r7,#0x50] ;@ Save Exception Vector\n");
+  ot("  orr r0,r0,#0x20 ;@ 32+n\n");
   ot("  bl Exception\n");
   ot("\n");
 
-  Cycles=38; OpEnd();
+  Cycles=38; OpEnd(0x10);
 
   return 0;
 }
@@ -91,38 +102,44 @@ int OpTrap(int op)
 // --------------------- Opcodes 0x4e50+ ---------------------
 int OpLink(int op)
 {
-  int use=0;
+  int use=0,reg;
 
   use=op&~7;
+  reg=op&7;
+  if (reg==7) use=op;
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(use);
+  OpStart(op,0x10);
 
-  ot(";@ Get An\n");
-  EaCalc(10, 7, 8, 2);
-  EaRead(10, 1, 8, 2, 1);
+  if(reg!=7) {
+    ot(";@ Get An\n");
+    EaCalc(11, 7, 8, 2, 1);
+    EaRead(11, 1, 8, 2, 7, 1);
+  }
 
   ot("  ldr r0,[r7,#0x3c] ;@ Get A7\n");
   ot("  sub r0,r0,#4 ;@ A7-=4\n");
-  ot("  mov r11,r0\n");
+  ot("  mov r8,r0 ;@ abuse r8\n");
+  if(reg==7) ot("  mov r1,r0\n");
   ot("\n");
   
   ot(";@ Write An to Stack\n");
   MemHandler(1,2);
 
   ot(";@ Save to An\n");
-  EaWrite(10,11, 8, 2, 1);
+  if(reg!=7)
+    EaWrite(11,8, 8, 2, 7, 1);
 
   ot(";@ Get offset:\n");
-  EaCalc(0,0,0x3c,1);
-  EaRead(0,0,0x3c,1);
+  EaCalc(0,0,0x3c,1);    // abused r8 is ok because of imm EA
+  EaRead(0,0,0x3c,1,0);
 
-  ot("  add r11,r11,r0 ;@ Add offset to A7\n");
-  ot("  str r11,[r7,#0x3c]\n");
+  ot("  add r8,r8,r0 ;@ Add offset to A7\n");
+  ot("  str r8,[r7,#0x3c]\n");
   ot("\n");
 
   Cycles=16;
-  OpEnd();
+  OpEnd(0x10);
   return 0;
 }
 
@@ -134,61 +151,101 @@ int OpUnlk(int op)
   use=op&~7;
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(use);
+  OpStart(op,0x10);
 
   ot(";@ Get An\n");
-  EaCalc(10, 7, 8, 2);
-  EaRead(10, 0, 8, 2, 1);
+  EaCalc(11, 0xf, 8, 2,   1);
+  EaRead(11,   0, 8, 2, 0xf, 1);
 
-  ot("  add r11,r0,#4 ;@ A7+=4\n");
+  ot("  add r8,r0,#4 ;@ A7+=4, abuse r8\n");
   ot("\n");
   ot(";@ Pop An from stack:\n");
   MemHandler(0,2);
   ot("\n");
-  ot("  str r11,[r7,#0x3c] ;@ Save A7\n");
+  ot("  str r8,[r7,#0x3c] ;@ Save A7\n");
   ot("\n");
   ot(";@ An = value from stack:\n");
-  EaWrite(10, 0, 8, 2, 1);
-  
+  EaWrite(11, 0, 8, 2, 7, 1);
+
   Cycles=12;
-  OpEnd();
+  OpEnd(0x10);
   return 0;
 }
 
 // --------------------- Opcodes 0x4e70+ ---------------------
+// 01001110 01110ttt
 int Op4E70(int op)
 {
   int type=0;
 
-  type=op&7;
-  // 01001110 01110ttt, reset/nop/stop/rte/rtd/rts/trapv/rtr
-  if (type==1) { OpStart(op); Cycles=4; OpEnd(); return 0; } // nop
+  type=op&7; // reset/nop/stop/rte/rtd/rts/trapv/rtr
 
-  if (type==3 || type==7) // rte/rtr
+  switch (type)
   {
-    OpStart(op); Cycles=20;
-    PopSr(type==3);
-    ot("  ldr r10,[r7,#0x60] ;@ Get Memory base\n");
-    PopPc();
-    if (type==3) CheckInterrupt();
+    case 1:  // nop
+    OpStart(op);
+    Cycles=4;
     OpEnd();
     return 0;
-  }
 
-  if (type==5) // rts
-  {
-    OpStart(op); Cycles=16;
-    ot("  ldr r10,[r7,#0x60] ;@ Get Memory base\n");
+    case 3: // rte
+    OpStart(op,0x10,0,0,1); Cycles=20;
+    PopSr(1);
     PopPc();
-    OpEnd();
+    ot("  ldr r1,[r7,#0x44] ;@ reload SR high\n");
+    SuperChange(op,1);
+#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO || EMULATE_HALT
+    ot("  ldr r1,[r7,#0x58]\n");
+    ot("  bic r1,r1,#0x0c ;@ clear 'not processing instruction' and 'doing addr error' bits\n");
+    ot("  str r1,[r7,#0x58]\n");
+#endif
+#if EMULATE_ADDRESS_ERRORS_JUMP
+    ot("  tst r4,#1 ;@ address error?\n");
+    ot("  bne ExceptionAddressError_r_prg_r4\n");
+#endif
+    opend_check_interrupt = 1;
+    opend_check_trace = 1;
+    OpEnd(0x10,0);
+    return 0;
+
+    case 5: // rts
+    OpStart(op,0x10); Cycles=16;
+    PopPc();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+    ot("  tst r4,#1 ;@ address error?\n");
+    ot("  bne ExceptionAddressError_r_prg_r4\n");
+#endif
+    OpEnd(0x10);
+    return 0;
+
+    case 6: // trapv
+    OpStart(op,0x10,0,1); Cycles=4;
+    ot("  tst r10,#0x10000000\n");
+    ot("  subne r5,r5,#%i\n",34);
+    ot("  movne r0,#7 ;@ TRAPV exception\n");
+    ot("  blne Exception\n");
+    opend_op_changes_cycles = 1;
+    OpEnd(0x10,0);
     return 0;
-  }
 
-  return 1;
+    case 7: // rtr
+    OpStart(op,0x10); Cycles=20;
+    PopSr(0);
+    PopPc();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+    ot("  tst r4,#1 ;@ address error?\n");
+    ot("  bne ExceptionAddressError_r_prg_r4\n");
+#endif
+    OpEnd(0x10);
+    return 0;
+
+    default:
+    return 1;
+  }
 }
 
 // --------------------- Opcodes 0x4e80+ ---------------------
-// Emit a Jsr/Jmp opcode, 01001110 1mEEEeee
+// Emit a Jsr/Jmp opcode, 01001110 1meeeeee
 int OpJsr(int op)
 {
   int use=0;
@@ -199,38 +256,46 @@ int OpJsr(int op)
   // See if we can do this opcode:
   if (EaCanRead(sea,-1)==0) return 1;
 
-  use=OpBase(op);
+  use=OpBase(op,0);
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
 
-  OpStart(op); Cycles=14; // Correct?
+  OpStart(op,(op&0x40)?0:0x10);
 
-  ot("  ldr r10,[r7,#0x60] ;@ Get Memory base\n");
+  ot("  ldr r11,[r7,#0x60] ;@ Get Memory base\n");
   ot("\n");
-  EaCalc(0,0x003f,sea,0);
+  EaCalc(12,0x003f,sea,0);
 
-  ot(";@ Jump - Get new PC from r0\n");
-  if (op&0x40)
+  ot(";@ Jump - Get new PC from r12\n");
+  ot("  add r0,r12,r11 ;@ Memory Base + New PC\n");
+  ot("\n");
+  CheckPc();
+  if (!(op&0x40))
   {
-    // Jmp - Get new PC from r0
-    ot("  add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
-    ot("\n");
+    ot("  ldr r2,[r7,#0x3c]\n");
+    ot("  sub r1,r4,r11 ;@ r1 = Old PC\n");
   }
-  else
-  {
-    ot(";@ Jsr - Push old PC first\n");
-    ot("  sub r1,r4,r10 ;@ r1 = Old PC\n");
-    ot("  add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
-    ot("\n");
-    OpPush32();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+  // jsr prefetches next instruction before pushing old PC,
+  // according to http://pasti.fxatari.com/68kdocs/68kPrefetch.html
+  ot("  mov r4,r0\n");
+  ot("  tst r4,#1 ;@ address error?\n");
+  ot("  bne ExceptionAddressError_r_prg_r4\n");
+#else
+  ot("  bic r4,r0,#1\n");
+#endif
 
-    Cycles+=8;
+  if (!(op&0x40))
+  {
+    ot(";@ Push old PC onto stack\n");
+    ot("  sub r0,r2,#4 ;@ Predecrement A7\n");
+    ot("  str r0,[r7,#0x3c] ;@ Save A7\n");
+    MemHandler(1,2);
   }
 
-  if (Amatch && sea==0x10) Cycles-=2; // (An) Correct?
-
-  CheckPc();
+  Cycles=(op&0x40) ? 4 : 12;
+  Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);
 
-  OpEnd();
+  OpEnd((op&0x40)?0:0x10);
 
   return 0;
 }
@@ -238,7 +303,7 @@ int OpJsr(int op)
 // --------------------- Opcodes 0x50c8+ ---------------------
 
 // ARM version of 68000 condition codes:
-static char *Cond[16]=
+static const char * const Cond[16]=
 {
   "",  "",  "hi","ls","cc","cs","ne","eq",
   "vc","vs","pl","mi","ge","lt","gt","le"
@@ -254,43 +319,93 @@ int OpDbra(int op)
   cc=(op>>8)&15;
   
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
-  OpStart(op); Cycles=10;
-
-  ot(";@ Decrement Dn.w\n");
-  ot("  and r1,r8,#0x0007\n");
-  ot("  mov r1,r1,lsl #2\n");
-  ot("  ldrsh r0,[r7,r1]\n");
-  ot("  sub r0,r0,#1\n");
-  ot("  strh r0,[r7,r1]\n");
-  ot("\n");
+  OpStart(op);
 
-  if (cc>=2)
+  switch (cc)
   {
-    ot(";@ Is the condition true?\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
-    ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000\n");
-    ot(";@ If so, don't dbra\n");
-    ot("  b%s DbraEnd%.4x\n",Cond[cc],op);
-    ot("\n");
+    case 0: // T
+    case 1: // F
+      break;
+    case 2: // hi
+      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");
+      ot("  beq DbraTrue\n\n");
+      break;
+    case 3: // ls
+      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");
+      ot("  bne DbraTrue\n\n");
+      break;
+    default:
+      ot(";@ Is the condition true?\n");
+      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
+      ot(";@ If so, don't dbra\n");
+      ot("  b%s DbraTrue\n\n",Cond[cc]);
+      break;
   }
 
-  ot(";@ Check if Dn.w is -1\n");
-  ot("  cmps r0,#-1\n");
-  ot("  beq DbraEnd%.4x\n",op);
-  ot("\n");
+  if (cc!=0)
+  {
+    ot(";@ Decrement Dn.w\n");
+    ot("  and r1,r8,#0x0007\n");
+    ot("  mov r1,r1,lsl #2\n");
+    ot("  ldrsh r0,[r7,r1]\n");
+    ot("  sub r0,r0,#1\n");
+    ot("  strh r0,[r7,r1]\n");
+    ot("\n");
 
-  ot(";@ Get Branch offset:\n");
-  ot("  ldrsh r0,[r4]\n");
-  ot("  add r4,r4,r0 ;@ r4 = New PC\n");
-  ot("\n");
-  OpEnd();
+    ot(";@ Check if Dn.w is -1\n");
+    ot("  cmn r0,#1\n");
+
+#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP
+    ot("  beq DbraMin1\n");
+    ot("\n");
+
+    ot(";@ Get Branch offset:\n");
+    ot("  ldrsh r0,[r4]\n");
+    ot("  add r0,r4,r0 ;@ r0 = New PC\n");
+    CheckPc();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+    ot("  mov r4,r0\n");
+    ot("  tst r4,#1 ;@ address error?\n");
+    ot("  bne ExceptionAddressError_r_prg_r4\n");
+#else
+    ot("  bic r4,r0,#1\n");
+#endif
+#else
+    ot("\n");
+    ot(";@ Get Branch offset:\n");
+    ot("  ldrnesh r0,[r4]\n");
+    ot("  addeq r4,r4,#2 ;@ Skip branch offset\n");
+    ot("  subeq r5,r5,#4 ;@ additional cycles\n");
+    ot("  addne r4,r4,r0 ;@ r4 = New PC\n");
+    ot("  bic r4,r4,#1\n"); // we do not emulate address errors
+    ot("\n");
+#endif
+    Cycles=12-2;
+    OpEnd();
+  }
   
-  ot("DbraEnd%.4x%s\n", op, ms?"":":");
-  Cycles+=2;
-  ot("  add r4,r4,#2 ;@ Skip branch offset\n");
-  ot("\n");
-  OpEnd();
+  //if (cc==0||cc>=2)
+  if (op==0x50c8)
+  {
+    ot(";@ condition true:\n");
+    ot("DbraTrue%s\n", ms?"":":");
+    ot("  add r4,r4,#2 ;@ Skip branch offset\n");
+    ot("\n");
+    Cycles=12;
+    OpEnd();
+  }
+
+#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP
+  if (op==0x51c8)
+  {
+    ot(";@ Dn.w is -1:\n");
+    ot("DbraMin1%s\n", ms?"":":");
+    ot("  add r4,r4,#2 ;@ Skip branch offset\n");
+    ot("\n");
+    Cycles=12+2;
+    OpEnd();
+  }
+#endif
 
   return 0;
 }
@@ -299,9 +414,10 @@ int OpDbra(int op)
 // Emit a Branch opcode 0110cccc nn  (cccc=condition)
 int OpBranch(int op)
 {
-  int size=0,use=0;
+  int size=0,use=0,checkpc=0;
   int offset=0;
   int cc=0;
+  const char *asr_r11="";
 
   offset=(char)(op&0xff);
   cc=(op>>8)&15;
@@ -310,38 +426,51 @@ int OpBranch(int op)
   if (offset==0)  size=1;
   if (offset==-1) size=2;
 
+  if (size==2) size=0; // 000 model does not support long displacement
   if (size) use=op; // 16-bit or 32-bit
   else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches
 
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
-  OpStart(op); Cycles=10; // Assume branch taken
+  OpStart(op,size?0x10:0);
+  Cycles=10; // Assume branch taken
 
-  ot(";@ Get Branch offset:\n");
-  if (size)
+  switch (cc)
   {
-    EaCalc(0,0,0x3c,size);
-    EaRead(0,0,0x3c,size);
-    if (Amatch && size==1) Cycles-=4;
+    case 0: // T
+    case 1: // F
+      break;
+    case 2: // hi
+      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");
+      ot("  bne BccDontBranch%i\n\n",8<<size);
+      break;
+    case 3: // ls
+      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");
+      ot("  beq BccDontBranch%i\n\n",8<<size);
+      break;
+    default:
+      ot(";@ Is the condition true?\n");
+      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
+      ot("  b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
+      break;
   }
 
-  if (size==0) ot("  mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
-
-  if (cc>=2)
+  if (size) 
   {
-    ot(";@ Is the condition true?\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
-    ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
-    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000\n");
-
-    if (size==0) ot("  mov r0,r0,asr #24 ;@ ...shift down\n\n");
-
-    ot("  b%s DontBranch%.4x\n",Cond[cc^1],op);
-
-    ot("\n");
+    if (size<2)
+    {
+      ot("  ldrsh r11,[r4] ;@ Fetch Branch offset\n");
+    }
+    else
+    {
+      ot("  ldrh r2,[r4] ;@ Fetch Branch offset\n");
+      ot("  ldrh r11,[r4,#2]\n");
+      ot("  orr r11,r11,r2,lsl #16\n");
+    }
   }
   else
   {
-    if (size==0) ot("  mov r0,r0,asr #24 ;@ ...shift down\n\n");
+    ot("  mov r11,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
+    asr_r11=",asr #24";
   }
 
   ot(";@ Branch taken - Add on r0 to PC\n");
@@ -349,35 +478,49 @@ int OpBranch(int op)
   if (cc==1)
   {
     ot(";@ Bsr - remember old PC\n");
-    ot("  ldr r10,[r7,#0x60] ;@ Get Memory base\n");
-    ot("  sub r1,r4,r10 ;@ r1 = Old PC\n");
+    ot("  ldr r12,[r7,#0x60] ;@ Get Memory base\n");
+    ot("  ldr r2,[r7,#0x3c]\n");
+    ot("  sub r1,r4,r12 ;@ r1 = Old PC\n");
+    if (size) ot("  add r1,r1,#%d\n",1<<size);
     ot("\n");
-    if (size) ot("  sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
-    ot("  add r4,r4,r0 ;@ r4 = New PC\n");
-    ot("\n");
-    OpPush32();
-    Cycles+=8;
-  }
-  else
-  {
-    if (size) ot("  sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
-    ot("  add r4,r4,r0 ;@ r4 = New PC\n");
+    ot(";@ Push r1 onto stack\n");
+    ot("  sub r0,r2,#4 ;@ Predecrement A7\n");
+    ot("  str r0,[r7,#0x3c] ;@ Save A7\n");
+    MemHandler(1,2);
     ot("\n");
+    Cycles=18; // always 18
   }
 
-  if (offset==0 || offset==-1)
-  {
-    ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
-    CheckPc();
-  }
+  ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);
+
+#if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8
+  if (offset!=0 && offset!=-1) checkpc=1;
+#endif
+#if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_16
+  if (offset==0)  checkpc=1;
+#endif
+#if USE_CHECKPC_CALLBACK
+  if (offset==-1) checkpc=1;
+#endif
+  if (checkpc) CheckPc();
+#if EMULATE_ADDRESS_ERRORS_JUMP
+  ot("  mov r4,r0\n");
+  ot("  tst r4,#1 ;@ address error?\n");
+  ot("  bne ExceptionAddressError_r_prg_r4\n");
+#else
+  ot("  bic r4,r0,#1\n");
+#endif
+  ot("\n");
 
-  OpEnd();
+  OpEnd(size?0x10:0);
 
-  if (cc>=2)
+  // since all "DontBranch" code is same for every size, output only once
+  if (cc>=2&&(op&0xff00)==0x6700)
   {
-    ot("DontBranch%.4x%s\n", op, ms?"":":");
-    Cycles-=2; // Branch not taken
-    OpEnd();
+    ot("BccDontBranch%i%s\n", 8<<size, ms?"":":");
+    if (size) ot("  add r4,r4,#%d\n",1<<size);
+    Cycles+=(size==1) ? 2 : -2; // Branch not taken
+    OpEnd(0);
   }
 
   return 0;