asm core fix for Flintstones
[fceu.git] / ncpu.S
CommitLineData
af32b6c2 1/*************************************
2 Little John GP32
3 File : ncpu.S
4 Authors : FCA author
5 modified and adapted by Yoyo.
6 adapted for fceu by notaz, 2007.
7**************************************/
8
9#include "ncpu.h"
10
11@@@
12@@@ Offets from REG_OP_TABLE
13@@@
14#define OTOFFS_NES_RAM (nes_internal_ram - cpu_exec_table)
15#define OTOFFS_NES_STACK (nes_stack - cpu_exec_table)
16#define OTOFFS_NES_REGS (nes_registers - cpu_exec_table)
17#define OTOFFS_PC_BASE (pc_base - cpu_exec_table)
92e249b1 18#define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table)
8fa5eb33 19#define OTOFFS_TIMESTAMP (timestamp - cpu_exec_table)
c0bf6f9f 20#define OTOFFS_X (X_ - cpu_exec_table)
af32b6c2 21
22@ fceu
23#define FCEU_IQNMI 0x08
24#define FCEU_IQTEMP 0x80
25
26
27@@@@@@@@@@@@@@@@@@@@@@@@@@
28
29
30@ SECTION_FAST
31 SECTION_TEXT
32 ALIGN
33
370cff9a 34/*
c0bf6f9f 35bbbb:
0b65fdb3 36.ascii "ab_a: %04x"
c0bf6f9f 37.byte 0x0a,0
38.align 4
8fa5eb33 39stmfd sp!,{r0-r3,r12,lr}
40mov r1,r0
41ldr r0,=bbbb
42bl printf
43ldmfd sp!,{r0-r3,r12,lr}
370cff9a 44*/
af32b6c2 45
46@@@
47@@@ r0 = Address (unbased)
48@@@ uses REG_OP_TABLE; sets REG_PC; trashes r1,r2; keeps r0
49@@@
50.macro REBASE_PC
51 @ FIXME: do something with mem not in Page[].
c0bf6f9f 52@ stmfd sp!, {r0-r3,r12,lr}
53@ mov r1, r0
54@ ldr r0, =bbbb
55@ bl printf
56@ ldmfd sp!, {r0-r3,r12,lr}
57
af32b6c2 58 cmp r0, #0x2000
59 ldrge r1, =Page
60 movge r2, r0, lsr #11
61 ldrge r2, [r1, r2, lsl #2]
62 andlt r2, r0, #0xf800
63 addlt r1, REG_OP_TABLE, #OTOFFS_NES_RAM
64 sublt r2, r1, r2
65 str r2, [REG_OP_TABLE, #OTOFFS_PC_BASE]
66 add REG_PC, r2, r0
67.endm
68
69
8fa5eb33 70@ updates fceu "timestamp" variable
0b65fdb3 71@ loads cycles to reg, reg!=r1, trashes r1, kills flags
8fa5eb33 72.macro FLUSH_TIMESTAMP reg
0b65fdb3 73 ands \reg, REG_CYCLE, #0xff
74 beq 1f
8fa5eb33 75 ldr r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
0b65fdb3 76 orr REG_CYCLE, REG_CYCLE, \reg, lsl #8 @ put cycles for do_irq_hook
8fa5eb33 77 add r1, r1, \reg
78 bic REG_CYCLE, REG_CYCLE, #0xff
79 str r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
0b65fdb3 801:
8fa5eb33 81.endm
82
af32b6c2 83
84@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
85@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
86@@@
87@@@ CYCLE_NEXT
88@@@
89