debug, unbreaking castlevania 3
[fceu.git] / ncpu_debug.c
CommitLineData
af32b6c2 1#include <stdio.h>
2#include <stdlib.h>
3
4#include "types.h"
5#include "x6502.h"
6#include "fce.h"
7
8// asm core state
9extern uint32 nes_registers[0x10];
10extern uint32 pc_base;
c0bf6f9f 11extern uint8 nes_internal_ram[0x800];
12uint32 PC_prev = 0xcccccc, OP_prev = 0xcccccc;
13int32 g_cnt = 0;
af32b6c2 14
655f8df0 15static int pending_add_cycles = 0, pending_rebase = 0, pending_irq = 0;
af32b6c2 16
81bd66a1 17uint8 dreads[4];
18uint32 dwrites_c[2], dwrites_a[2];
19int dread_count_c, dread_count_a, dwrite_count_c, dwrite_count_a;
20
af32b6c2 21static void leave(void)
22{
92e249b1 23 printf("\nA: %02x, X: %02x, Y: %02x, S: %02x\n", X.A, X.X, X.Y, X.S);
c0bf6f9f 24 printf("PC = %04lx, OP=%02lX\n", PC_prev, OP_prev);
af32b6c2 25 exit(1);
26}
27
28static void compare_state(void)
29{
30 uint8 nes_flags;
81bd66a1 31 int i, fail = 0;
af32b6c2 32
33 if ((nes_registers[0] >> 24) != X.A) {
34 printf("A: %02lx vs %02x\n", nes_registers[0] >> 24, X.A);
92e249b1 35 fail = 1;
af32b6c2 36 }
37
38 if ((nes_registers[1] & 0xff) != X.X) {
39 printf("X: %02lx vs %02x\n", nes_registers[1] & 0xff, X.X);
92e249b1 40 fail = 1;
af32b6c2 41 }
42
43 if ((nes_registers[2] & 0xff) != X.Y) {
44 printf("Y: %02lx vs %02x\n", nes_registers[2] & 0xff, X.Y);
92e249b1 45 fail = 1;
af32b6c2 46 }
47
48 if (nes_registers[3] - pc_base != X.PC) {
49 printf("PC: %04lx vs %04x\n", nes_registers[3] - pc_base, X.PC);
92e249b1 50 fail = 1;
af32b6c2 51 }
52
53 if ((nes_registers[4] >> 24) != X.S) {
54 printf("S: %02lx vs %02x\n", nes_registers[4] >> 24, X.S);
92e249b1 55 fail = 1;
af32b6c2 56 }
57
58 if (((nes_registers[4]>>8)&0xff) != X.IRQlow) {
59 printf("IRQlow: %02lx vs %02x\n", ((nes_registers[4]>>8)&0xff), X.IRQlow);
92e249b1 60 fail = 1;
af32b6c2 61 }
62
63 // NVUB DIZC
64 nes_flags = nes_registers[4] & 0x5d;
65 if ( nes_registers[5]&0x80000000) nes_flags |= 0x80; // N
66 if (!(nes_registers[5]&0x000000ff)) nes_flags |= 0x02; // Z
67 // nes_flags |= 0x20; // U, not set in C core (set only when pushing)
68
92e249b1 69 if (nes_flags != (X.P&~0x20)) {
70 printf("flags: %02x vs %02x\n", nes_flags, (X.P&~0x20));
71 fail = 1;
af32b6c2 72 }
73
74 if ((int32)nes_registers[7] != X.count) {
75 printf("cycles: %li vs %li\n", (int32)nes_registers[7], X.count);
92e249b1 76 fail = 1;
af32b6c2 77 }
92e249b1 78
81bd66a1 79 if (dread_count_a != dread_count_c) {
80 printf("dread_count: %i vs %i\n", dread_count_a, dread_count_c);
81 fail = 1;
82 }
83
84 if (dwrite_count_a != dwrite_count_c) {
85 printf("dwrite_count: %i vs %i\n", dwrite_count_a, dwrite_count_c);
86 fail = 1;
87 }
88
89 for (i = dwrite_count_a - 1; !fail && i >= 0; i--)
90 if (dwrites_a[i] != dwrites_c[i]) {
91 printf("dwrites[%i]: %06lx vs %06lx\n", dwrite_count_a, dwrites_a[i], dwrites_c[i]);
92 fail = 1;
93 }
94
92e249b1 95 if (fail) leave();
af32b6c2 96}
97
c0bf6f9f 98#if 1
99static void compare_ram(void)
100{
101 int i, fail = 0;
102 for (i = 0; i < 0x800/4; i++)
103 {
104 if (((int *)nes_internal_ram)[i] != ((int32 *)RAM)[i]) {
105 int u;
106 fail = 1;
107 for (u = i*4; u < i*4+4; u++)
108 if (nes_internal_ram[u] != RAM[u])
109 printf("RAM[%03x]: %02x vs %02x\n", u, nes_internal_ram[u], RAM[u]);
110 }
111 }
112
113 if (fail) leave();
114}
115#endif
af32b6c2 116
117void TriggerIRQ_d(void)
118{
119 printf("-- irq\n");
655f8df0 120 pending_irq |= 0x100;
af32b6c2 121}
122
123void TriggerNMI_d(void)
124{
125 printf("-- nmi\n");
126 TriggerNMI_c();
127 TriggerNMI_a();
128 compare_state();
129}
130
131void TriggerNMINSF_d(void)
132{
133}
134
135void X6502_Run_d(int32 c)
136{
c0bf6f9f 137 int32 cycles = c << 4; /* *16 */
138 if (PAL) cycles -= c; /* *15 */
af32b6c2 139
92e249b1 140 //printf("-- %06i: run(%i)\n", (int)g_cnt, (int)c);
c0bf6f9f 141 g_cnt += cycles;
af32b6c2 142
c0bf6f9f 143 if (c > 200)
144 compare_ram();
145
146 while (g_cnt > 0)
af32b6c2 147 {
655f8df0 148 if (pending_irq) {
149 if (pending_irq & 0x100) {
150 TriggerIRQ_c();
151 TriggerIRQ_a();
152 }
153 if (pending_irq & 0xff) {
154 TriggerIRQ_c();
155 TriggerIRQ_a();
156 X6502_IRQBegin_c(pending_irq & 0xff);
157 X6502_IRQBegin_a(pending_irq & 0xff);
158 }
159 pending_irq = 0;
160 }
161
af32b6c2 162 nes_registers[7]=1;
163 X.count=1;
92e249b1 164
81bd66a1 165 dread_count_c = dread_count_a = dwrite_count_c = dwrite_count_a = 0;
af32b6c2 166 X6502_Run_c();
92e249b1 167
af32b6c2 168 X6502_Run_a();
92e249b1 169
af32b6c2 170 compare_state();
c0bf6f9f 171 g_cnt -= 1 - X.count;
172 if (pending_add_cycles) {
c0bf6f9f 173 g_cnt -= pending_add_cycles*48;
174 pending_add_cycles = 0;
175 }
176 if (pending_rebase) {
177 X6502_Rebase_a();
178 pending_rebase = 0;
179 }
af32b6c2 180 }
92e249b1 181
182 //printf("-- run_end\n");
af32b6c2 183}
184
185void X6502_Reset_d(void)
186{
187 printf("-- reset\n");
188
189 X6502_Reset_c();
190 X6502_Reset_a();
191 compare_state();
192}
193
194void X6502_Power_d(void)
195{
196 printf("-- power\n");
c0bf6f9f 197 if (nes_internal_ram == RAM) printf("nes_internal_ram == RAM!!\n");
81bd66a1 198 dread_count_c = dread_count_a = dwrite_count_c = dwrite_count_a = 0;
af32b6c2 199
200 X6502_Power_c();
201 X6502_Power_a();
202 compare_state();
203}
204
205void X6502_AddCycles_d(int x)
206{
92e249b1 207 printf("-- AddCycles(%i|%i)\n", x, x*48);
af32b6c2 208
c0bf6f9f 209 pending_add_cycles = x; // *48;
210// printf("can't use this in debug\n");
211// exit(1);
92e249b1 212 //X6502_AddCycles_c(x);
213 //X6502_AddCycles_a(x);
af32b6c2 214 //compare_state();
215}
216
217void X6502_IRQBegin_d(int w)
218{
219 printf("-- IRQBegin(%02x)\n", w);
220
655f8df0 221 // X6502_IRQBegin_c(w);
222 // X6502_IRQBegin_a(w);
223 pending_irq |= w;
af32b6c2 224}
225
226void X6502_IRQEnd_d(int w)
227{
228 printf("-- IRQEnd(%02x)\n", w);
229
230 X6502_IRQEnd_c(w);
231 X6502_IRQEnd_a(w);
232}
233
234
c0bf6f9f 235void X6502_Rebase_d(void)
236{
237 pending_rebase = 1;
238}
239
af32b6c2 240