[fceu.git] / ncpu.S

/*************************************
  Little John GP32
  File : ncpu.S
  Authors : FCA author
            modified and adapted by Yoyo.
            adapted for fceu by notaz, 2007.
**************************************/

#include "ncpu.h"

@@@
@@@ Offets from REG_OP_TABLE
@@@
#define OTOFFS_NES_RAM   (nes_internal_ram - cpu_exec_table)
#define OTOFFS_NES_STACK (nes_stack        - cpu_exec_table)
#define OTOFFS_NES_REGS  (nes_registers    - cpu_exec_table)
#define OTOFFS_PC_BASE   (pc_base          - cpu_exec_table)
#define OTOFFS_IRQ_HOOK  (MapIRQHook       - cpu_exec_table)
#define OTOFFS_TIMESTAMP (timestamp        - cpu_exec_table)
#define OTOFFS_X         (X_               - cpu_exec_table)

@ fceu
#define FCEU_IQNMI      0x08
#define FCEU_IQTEMP     0x80


@@@@@@@@@@@@@@@@@@@@@@@@@@


@	SECTION_FAST
	SECTION_TEXT
	ALIGN

/*
bbbb:
.ascii "lsr_a: %02x"
.byte 0x0a,0
.align 4
stmfd sp!,{r0-r3,r12,lr}
mov r1,r0
ldr r0,=bbbb
bl printf
ldmfd sp!,{r0-r3,r12,lr}
*/

@@@
@@@ r0	=  Address (unbased)
@@@ uses REG_OP_TABLE; sets REG_PC; trashes r1,r2; keeps r0
@@@
.macro	REBASE_PC
	@ FIXME: do something with mem not in Page[].
@	stmfd	sp!, {r0-r3,r12,lr}
@	mov	r1, r0
@	ldr     r0, =bbbb
@	bl      printf
@	ldmfd	sp!, {r0-r3,r12,lr}

	cmp     r0, #0x2000
	ldrge	r1, =Page
	movge	r2, r0, lsr #11
	ldrge	r2, [r1, r2, lsl #2]
	andlt	r2, r0, #0xf800
	addlt	r1, REG_OP_TABLE, #OTOFFS_NES_RAM
	sublt	r2, r1, r2
	str	r2, [REG_OP_TABLE, #OTOFFS_PC_BASE]
	add	REG_PC, r2, r0
.endm


@ updates fceu "timestamp" variable
@ loads cycles to reg, reg!=r1, trashes r1
.macro	FLUSH_TIMESTAMP reg
	ldr	r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
	and	\reg, REG_CYCLE, #0xff
	add	r1, r1, \reg
	bic	REG_CYCLE, REG_CYCLE, #0xff
	str	r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
.endm


@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@@
@@@ CYCLE_NEXT
@@@
Commit	Line	Data
	1	/*************************************
	2	Little John GP32
	3	File : ncpu.S
	4	Authors : FCA author
	5	modified and adapted by Yoyo.
	6	adapted for fceu by notaz, 2007.
	7	**************************************/
	8
	9	#include "ncpu.h"
	10
	11	@@@
	12	@@@ Offets from REG_OP_TABLE
	13	@@@
	14	#define OTOFFS_NES_RAM (nes_internal_ram - cpu_exec_table)
	15	#define OTOFFS_NES_STACK (nes_stack - cpu_exec_table)
	16	#define OTOFFS_NES_REGS (nes_registers - cpu_exec_table)
	17	#define OTOFFS_PC_BASE (pc_base - cpu_exec_table)
	18	#define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table)
	19	#define OTOFFS_TIMESTAMP (timestamp - cpu_exec_table)
	20	#define OTOFFS_X (X_ - cpu_exec_table)
	21
	22	@ fceu
	23	#define FCEU_IQNMI 0x08
	24	#define FCEU_IQTEMP 0x80
	25
	26
	27	@@@@@@@@@@@@@@@@@@@@@@@@@@
	28
	29
	30	@ SECTION_FAST
	31	SECTION_TEXT
	32	ALIGN
	33
	34	/*
	35	bbbb:
	36	.ascii "lsr_a: %02x"
	37	.byte 0x0a,0
	38	.align 4
	39	stmfd sp!,{r0-r3,r12,lr}
	40	mov r1,r0
	41	ldr r0,=bbbb
	42	bl printf
	43	ldmfd sp!,{r0-r3,r12,lr}
	44	*/
	45
	46	@@@
	47	@@@ r0 = Address (unbased)
	48	@@@ uses REG_OP_TABLE; sets REG_PC; trashes r1,r2; keeps r0
	49	@@@
	50	.macro REBASE_PC
	51	@ FIXME: do something with mem not in Page[].
	52	@ stmfd sp!, {r0-r3,r12,lr}
	53	@ mov r1, r0
	54	@ ldr r0, =bbbb
	55	@ bl printf
	56	@ ldmfd sp!, {r0-r3,r12,lr}
	57
	58	cmp r0, #0x2000
	59	ldrge r1, =Page
	60	movge r2, r0, lsr #11
	61	ldrge r2, [r1, r2, lsl #2]
	62	andlt r2, r0, #0xf800
	63	addlt r1, REG_OP_TABLE, #OTOFFS_NES_RAM
	64	sublt r2, r1, r2
	65	str r2, [REG_OP_TABLE, #OTOFFS_PC_BASE]
	66	add REG_PC, r2, r0
	67	.endm
	68
	69
	70	@ updates fceu "timestamp" variable
	71	@ loads cycles to reg, reg!=r1, trashes r1
	72	.macro FLUSH_TIMESTAMP reg
	73	ldr r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
	74	and \reg, REG_CYCLE, #0xff
	75	add r1, r1, \reg
	76	bic REG_CYCLE, REG_CYCLE, #0xff
	77	str r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP]
	78	.endm
	79
	80
	81	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
	82	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
	83	@@@
	84	@@@ CYCLE_NEXT
	85	@@@
	86