X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=fceu.git;a=blobdiff_plain;f=cart.c;h=6a32021f221cc9e26559ced95936ead3ee9aead8;hp=030e764608573ee91145d862d57a11cf8bc28c5a;hb=af32b6c2f0ed2f1a4582c3e8d7ac704b9c61fa4c;hpb=c62d28102c77e19c291c78bf6bf7f0a81abd54b9

diff --git a/cart.c b/cart.c
index 030e764..6a32021 100644
--- a/cart.c
+++ b/cart.c
@@ -31,7 +31,7 @@
 #include "general.h"
 #include "svga.h"
 
-/* 
+/*
    This file contains all code for coordinating the mapping in of the
    address space external to the NES.
    It's also (ab)used by the NSF code.
@@ -90,13 +90,13 @@ void ResetCartMapping(void)
 
  for(x=0;x<32;x++)
  {
-  Page[x]=nothing-x*2048;
+  Page[x]=(uint8 *)(nothing-x*2048);
   PRGptr[x]=CHRptr[x]=0;
   PRGsize[x]=CHRsize[x]=0;
  }
  for(x=0;x<8;x++)
  {
-  MMC5SPRVPage[x]=MMC5BGVPage[x]=VPageR[x]=nothing-0x400*x;
+  MMC5SPRVPage[x]=MMC5BGVPage[x]=VPageR[x]=(uint8 *)(nothing-0x400*x);
  }
 
 }
@@ -110,7 +110,7 @@ void SetupCartPRGMapping(int chip, uint8 *p, uint32 size, int ram)
  PRGmask4[chip]=(size>>12)-1;
  PRGmask8[chip]=(size>>13)-1;
  PRGmask16[chip]=(size>>14)-1;
- PRGmask32[chip]=(size>>15)-1; 
+ PRGmask32[chip]=(size>>15)-1;
 
  PRGram[chip]=ram?1:0;
 }
@@ -291,7 +291,7 @@ void FASTAPASS(2) setchr4(unsigned int A, unsigned int V)
  setchr4r(0,A,V);
 }
 
-void FASTAPASS(1) setchr8(unsigned int V)
+void FASTAPASS(2) setchr8(unsigned int V)
 {
  setchr8r(0,V);
 }
@@ -444,7 +444,7 @@ void OpenGenie(void)
     goto grerr;
   }
   fclose(fp);
- 
+
   /* Workaround for the FCE Ultra CHR page size only being 1KB */
   for(x=0;x<4;x++)
    memcpy(GENIEROM+4096+(x<<8),GENIEROM+4096,256);
@@ -492,7 +492,7 @@ static DECLFW(GenieWrite)
               else
               {
                modcon=V^0xFF;
-               if(V==0x71) 
+               if(V==0x71)
 		modcon=0;
               }
               break;
@@ -549,7 +549,7 @@ void FixGenieMap(void)
 
  VPageR=VPage;
  FlushGenieRW();
- 
+
  for(x=0;x<3;x++)
   if((modcon>>(4+x))&1)
   {