X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=fceu.git;a=blobdiff_plain;f=ncpu.S;h=6b68fe7ae4f827d059f6a815b9490d6e00cc428f;hp=2a7fafe7ac5a7d8f4b8664eb7ae18bfdc30b9233;hb=8fa5eb3371d902b8d58dba6e6bf62726d7ed8dbc;hpb=92e249b10ad9e479eddb18974555366dba725ef3 diff --git a/ncpu.S b/ncpu.S index 2a7fafe..6b68fe7 100644 --- a/ncpu.S +++ b/ncpu.S @@ -16,7 +16,8 @@ #define OTOFFS_NES_REGS (nes_registers - cpu_exec_table) #define OTOFFS_PC_BASE (pc_base - cpu_exec_table) #define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table) -#define OTOFFS_X (X - cpu_exec_table) +#define OTOFFS_TIMESTAMP (timestamp - cpu_exec_table) +#define OTOFFS_X (X_ - cpu_exec_table) @ fceu #define FCEU_IQNMI 0x08 @@ -30,7 +31,17 @@ SECTION_TEXT ALIGN - +/* +bbbb: +.ascii "lsr_a: %02x" +.byte 0x0a,0 +.align 4 +stmfd sp!,{r0-r3,r12,lr} +mov r1,r0 +ldr r0,=bbbb +bl printf +ldmfd sp!,{r0-r3,r12,lr} +*/ @@@ @@@ r0 = Address (unbased) @@ -38,6 +49,12 @@ @@@ .macro REBASE_PC @ FIXME: do something with mem not in Page[]. +@ stmfd sp!, {r0-r3,r12,lr} +@ mov r1, r0 +@ ldr r0, =bbbb +@ bl printf +@ ldmfd sp!, {r0-r3,r12,lr} + cmp r0, #0x2000 ldrge r1, =Page movge r2, r0, lsr #11 @@ -50,6 +67,16 @@ .endm +@ updates fceu "timestamp" variable +@ loads cycles to reg, reg!=r1, trashes r1 +.macro FLUSH_TIMESTAMP reg + ldr r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP] + and \reg, REG_CYCLE, #0xff + add r1, r1, \reg + bic REG_CYCLE, REG_CYCLE, #0xff + str r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP] +.endm + @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@ -61,14 +88,16 @@ @@@ @@@ ¤Ê¤ó¤«Ì¾Á°¤¬ÊѤÀ¤Ê(¤É¡¼¤Ç¤â¤¤¡¼¤±¤É¡¼ @@@ -.macro CYCLE_NEXT n +.macro CYCLE_NEXT n, hook_check=1 @@DEBUG_INFO - subs REG_CYCLE, REG_CYCLE, #\n*48 + add REG_CYCLE, REG_CYCLE, #\n + subs REG_CYCLE, REG_CYCLE, #\n*48<<16 ble cpu_exec_end +.if \hook_check tst REG_P_REST, #1<<16 - movne r0, #\n blne do_irq_hook +.endif ldrb r0, [REG_PC], #1 tst REG_P_REST, #0xff<<8 ldreq pc, [REG_OP_TABLE, r0, lsl #2] @@ -94,11 +123,6 @@ @@@ CLI¡¦PHP¤Ê¤É¥Õ¥é¥°¤òÊѹ¹¤·¤¿¾ì¹ç¤Ï¤³¤ì @@@ .macro CYCLE_NEXT_INT n -@ @@DEBUG_INFO -@ -@ subs REG_CYCLE, REG_CYCLE, #\n*48 -@ bgt cpu_exec_check_int -@ RETURN_FROM_CPU_EXEC CYCLE_NEXT \n .endm @@ -251,18 +275,7 @@ strb r0, [REG_ADDR] .endm -.macro READ_WRITE_3 - .long read_rom_byte - .long read_rom_byte - .long read_rom_byte - .long read_rom_byte - .long read_save_ram - .long read_high_reg - .long read_ppu_reg -9999: -.endm - -.macro READ_WRITE_4 +.macro READ_WRITE_W adr lr, 1f ldr pc, [pc, r3, lsl #2] nop @@ -277,6 +290,22 @@ 1: .endm +.macro READ_WRITE_3 + .long read_rom_byte + .long read_rom_byte + .long read_rom_byte + .long read_rom_byte + .long read_save_ram + .long read_high_reg + .long read_ppu_reg +9999: + READ_WRITE_W @ rmw first writes unmodified data +.endm + +.macro READ_WRITE_4 + READ_WRITE_W @ and only then modified (Blaster Master) +.endm + @@@ @@@ ½ñ¤­¹þ¤ß¤À¤±¤Î¾ì¹ç @@@ @@ -427,7 +456,8 @@ bic REG_ADDR, REG_ADDR, #0x10000 and r0,REG_ADDR,#0xff cmp REG_Y,r0 - subgt REG_CYCLE,REG_CYCLE,#1*48 + addgt REG_CYCLE, REG_CYCLE, #1 + subgt REG_CYCLE, REG_CYCLE, #1*48<<16 .endm @ Indirect Indexed (for writes and rmws) @@ -464,7 +494,8 @@ bic REG_ADDR, REG_ADDR, #0x10000 and r0,REG_ADDR,#0xff cmp REG_X,r0 - subgt REG_CYCLE,REG_CYCLE,#1*48 + addgt REG_CYCLE, REG_CYCLE, #1 + subgt REG_CYCLE, REG_CYCLE, #1*48<<16 .endm @ Absolute Indexed (for writes and rmws) @@ -482,7 +513,8 @@ bic REG_ADDR, REG_ADDR, #0x10000 and r0,REG_ADDR,#0xff cmp REG_Y,r0 - subgt REG_CYCLE,REG_CYCLE,#1*48 + addgt REG_CYCLE, REG_CYCLE, #1 + subgt REG_CYCLE, REG_CYCLE, #1*48<<16 .endm @ Absolute Indexed (for writes and rmws) @@ -1888,14 +1920,16 @@ op7E: @ ROR $nnnn, X and r1,r1,#0xff add r1,r3,r1 tst r1,#0x100 - subne REG_CYCLE,REG_CYCLE, #1*48 + addne REG_CYCLE, REG_CYCLE, #1 + subne REG_CYCLE, REG_CYCLE, #1*48<<16 .endm .macro BRANCH_EQ ldreqsb r1, [REG_PC], #1 movne r1, #1 add REG_PC, REG_PC, r1 - subeq REG_CYCLE, REG_CYCLE, #1*48 + addeq REG_CYCLE, REG_CYCLE, #1 + subeq REG_CYCLE, REG_CYCLE, #1*48<<16 bne 1f HAD_BRANCH 1: @@ -1905,7 +1939,8 @@ op7E: @ ROR $nnnn, X ldrnesb r1, [REG_PC], #1 moveq r1, #1 add REG_PC, REG_PC, r1 - subne REG_CYCLE, REG_CYCLE, #1*48 + addne REG_CYCLE, REG_CYCLE, #1 + subne REG_CYCLE, REG_CYCLE, #1*48<<16 beq 1f HAD_BRANCH 1: @@ -2751,7 +2786,19 @@ do_int: subne REG_ADDR, REG_ADDR, #NMI_VECTOR READ_WORD REBASE_PC - CYCLE_NEXT 7 +@ CYCLE_NEXT 7 + + add REG_CYCLE, REG_CYCLE, #7 + subs REG_CYCLE, REG_CYCLE, #7*48<<16 + ble cpu_exec_end + ldrb r0, [REG_PC], #1 + tst REG_P_REST, #0xff<<8 + ldreq pc, [REG_OP_TABLE, r0, lsl #2] + + tst REG_P_REST, #P_REST_I_FLAG + ldrne pc, [REG_OP_TABLE, r0, lsl #2] + b do_int + @@@ @@@ ¥ê¥»¥Ã¥È¤Î½èÍý @@ -2797,6 +2844,7 @@ reset_cpu: @@@ read_rom_byte: +#ifndef DEBUG_ASM_6502 ldr r0, =CartBR ldr r2, =ARead mov r1, #0xff00 @@ -2809,6 +2857,7 @@ read_rom_byte: ldr r2, [r2, r1, lsl #2] ldrb r0, [r2, REG_ADDR] bx lr +#endif read_ppu_reg: @@ -2822,10 +2871,19 @@ read_save_ram: mov REG_PC, lr @ r7 mov REG_P_REST, r3 @ r8 +#ifndef DEBUG_ASM_6502 ldr r2, =ARead bic r0, REG_ADDR, #0x00ff0000 mov lr, pc ldr pc, [r2, r0, lsl #2] +#else + ldr r2, =dread_count_a + ldr r0, =dreads + ldr r1, [r2] + ldrb r0, [r0, r1] + add r1, r1, #1 + str r1, [r2] +#endif ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12 mov lr, REG_PC @@ -2841,12 +2899,15 @@ write_ppu_reg: write_high_reg: write_save_ram: write_rom_byte: - @ must preserve r3 for the callers too + FLUSH_TIMESTAMP r2 @ Blaster Master, more... +#ifndef DEBUG_ASM_6502 + @ must preserve r0 (data) and r3 for the callers str REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq str REG_CYCLE, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x1c)] @ might get used mov REG_PC, lr @ r7 mov REG_P_REST, r3 @ r8 + mov REG_CYCLE, r0 @ r11 ldr r2, =BWrite mov r1, r0 @@ -2857,9 +2918,22 @@ write_rom_byte: ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12 mov lr, REG_PC mov r3, REG_P_REST + mov r0, REG_CYCLE ldr REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq ldr REG_CYCLE, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x1c)] @ might get used +#else + ldr r1, =dwrite_count_a + ldr r2, =dwrites_a + ldr r1, [r1] + and r0, r0, #0xff + orr r0, r0, REG_ADDR, lsl #8 + str r0, [r2, r1, lsl #2] + ldr r2, =dwrite_count_a + add r1, r1, #1 + str r1, [r2] + and r0, r0, #0xff +#endif bx lr @@ -2883,9 +2957,14 @@ cpu_exec: @ ldr REG_OP_TABLE, = cpu_exec_table @ set on init - CYCLE_NEXT 0 + CYCLE_NEXT 0, 0 cpu_exec_end: + FLUSH_TIMESTAMP r0 + + tst REG_P_REST, #1<<16 + blne do_irq_hook_noflushts + ldr r0, =nes_registers stmia r0, {r4-r12} @@ -2958,9 +3037,7 @@ cpu_exec_table: @@@ nes_registers: .fill 0x40, 1, 0 -#ifndef DEBUG_ASM_6502 RAM: -#endif nes_internal_ram: .fill 0x100, 1, 0 nes_stack: @@ -2968,13 +3045,15 @@ nes_stack: @ TODO: write code which keeps it up-to-date pc_base: .long 0 -#ifndef DEBUG_ASM_6502 MapIRQHook: .long 0 timestamp: +timestamp_a: .long 0 -X: .fill 0x20, 1, 0 +#ifndef DEBUG_ASM_6502 +X: #endif +X_: .fill 0x20, 1, 0 .pool @@ -3085,11 +3164,14 @@ op9E: @ SHX $nnnn, Y ALIGN .globl nes_registers @ TODO: hide? .globl pc_base + .globl MapIRQHook @ (int a) #ifndef DEBUG_ASM_6502 .globl X .globl RAM .globl timestamp - .globl MapIRQHook @ (int a) +#else + .globl nes_internal_ram + .globl timestamp_a #endif .globl X6502_Reset_a @ (void); .globl X6502_Power_a @ (void); @@ -3100,7 +3182,7 @@ op9E: @ SHX $nnnn, Y .globl X6502_AddCycles_a @ (int x); .globl X6502_IRQBegin_a @ (int w); .globl X6502_IRQEnd_a @ (int w); - .globl X6502_rebase_a @ (void); + .globl X6502_Rebase_a @ (void); SECTION_TEXT ALIGN @@ -3158,15 +3240,15 @@ TriggerNMINSF_a: X6502_AddCycles_a: ldr r2, =nes_registers - ldr r1, [r2, #0x1c] + ldrsh r1, [r2, #0x1e] mvn r3, #47 @ r3=-48 mla r0, r3, r0, r1 - str r0, [r2, #0x1c] + strh r0, [r2, #0x1e] bx lr @ rebase PC when not executing or in memhandlers -X6502_rebase_a: +X6502_Rebase_a: stmfd sp!,{REG_PC,REG_OP_TABLE} ldr REG_OP_TABLE, =cpu_exec_table ldr r0, [REG_OP_TABLE, #(OTOFFS_NES_REGS+0x0c)] @ PC @@ -3180,7 +3262,12 @@ X6502_rebase_a: @ the nasty MapIRQHook thing from FCE.. +@ test Gradius 2 (J) if you change this do_irq_hook: + FLUSH_TIMESTAMP r0 + +do_irq_hook_noflushts: +#ifndef DEBUG_ASM_6502 @ I have reviewed all MapIRQHook functions, they only seem to cause IRQs, not messing cycles or something str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq mov REG_P_REST, lr @ r8 @@ -3192,6 +3279,11 @@ do_irq_hook: ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12 mov lr, REG_P_REST ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq +#else + ldr r1, =mapirq_cyc_a + str r0, [r1] + mov r1, r0 +#endif bx lr