X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=fceu.git;a=blobdiff_plain;f=x6502.c;h=0d9729de0ec9a793549fc4c6aa255034b7af58b4;hp=1d9174c06af6127da223900aeec1f2eb876197be;hb=e328100eecae3adfce1c3b57364bee5d166217ef;hpb=ea80a45b1dbd9f2c46567e18a2e18fcbb6e55c8d

diff --git a/x6502.c b/x6502.c
index 1d9174c..0d9729d 100644
--- a/x6502.c
+++ b/x6502.c
@@ -63,27 +63,24 @@ uint32 timestamp;
 
 static INLINE uint8 RdMem(unsigned int A)
 {
- // notaz: try to avoid lookup of every address at least for ROM and RAM areas
- // I've verified that if ARead[0xfff0] points to CartBR, it is always normal ROM read.
-#if 0
- if ((A&0x8000)/* && ARead[0xfff0] == CartBR*/) {
-  return (_DB=Page[A>>11][A]);
- }
-#endif
-#if 0 // enabling this causes 4fps slowdown. Why?
- if ((A&0xe000) == 0) { // RAM area (always 0-0x1fff)
-  return (_DB=RAM[A&0x7FF]);
- }
-#endif
- _DB=ARead[A](A);
+ int _DB1=ARead[A](A);
 #ifdef DEBUG_ASM_6502
+ //_DB=_DB1;
  //printf("a == %x, pc == %x\n", A, _PC);
+ if (A >= 0x2000) {
+  if (A == _PC || A == _PC - 1 || A == _PC + 1) {
+   //printf("fr: %02x\n", _DB1);
+  }
+  _DB=_DB1;
+ }
  if (A >= 0x2000 && A != _PC && A != _PC - 1 && A != _PC + 1) {
-  dreads[dread_count_c++] = _DB;
+  dreads[dread_count_c++] = _DB1;
   if (dread_count_c > 4) { printf("dread_count out of range\n"); exit(1); }
  }
+#else
+ _DB=_DB1;
 #endif
- return _DB;
+ return _DB1;
 }
 
 static INLINE void WrMem(unsigned int A, uint8 V)
@@ -102,7 +99,12 @@ static INLINE void WrMem(unsigned int A, uint8 V)
 
 static INLINE uint8 RdRAM(unsigned int A)
 {
- return((_DB=RAM[A]));
+ //return((_DB=RAM[A]));
+ int _DB1=RAM[A];
+#ifndef DEBUG_ASM_6502
+ _DB=_DB1;
+#endif
+ return _DB1;
 }
 
 static INLINE void WrRAM(unsigned int A, uint8 V)
@@ -469,7 +471,6 @@ void X6502_Reset_c(void)
 {
   _PC=RdMem(0xFFFC);
   _PC|=RdMem(0xFFFD)<<8;
-  if(FCEUGameInfo.type==GIT_NSF) _PC=0x3830;
   _jammed=0;
   _PI=_P=I_FLAG;
 }
@@ -542,7 +543,7 @@ void X6502_Run_c(void/*int32 cycles*/)
 	   {
 	    extern uint8 SIRQStat;
 	    SIRQStat|=0x80;
-	    X6502_IRQBegin_c(FCEU_IQDPCM);
+	    X6502_IRQBegin(FCEU_IQDPCM);
 	   }
 	  }
 	 }