X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=fceu.git;a=blobdiff_plain;f=x6502.h;h=56d9448064e9d45d6c47e372450435225783faab;hp=48843fc8a056743815bb425b3538d8377dc143b1;hb=892b1f6c68346fa00dc3029ab8bd31178e730509;hpb=af32b6c2f0ed2f1a4582c3e8d7ac704b9c61fa4c

diff --git a/x6502.h b/x6502.h
index 48843fc..56d9448 100644
--- a/x6502.h
+++ b/x6502.h
@@ -24,7 +24,7 @@ typedef struct {
         uint16 PC;		/* I'll change this to uint32 later... */
 				/* I'll need to AND PC after increments to 0xFFFF */
 				/* when I do, though.  Perhaps an IPC() macro? */
-        uint8 A,X,Y,S,P,mooPI,PZ;
+        uint8 A,X,Y,S,P,mooPI;
         uint8 DB;               /* Data bus "cache" for reads from certain areas */
 	uint8 IRQlow;		/* Simulated IRQ pin held low(or is it high?). */
 	uint8 jammed;
@@ -52,17 +52,20 @@ extern void FP_FASTAPASS(1) (*MapIRQHook)(int a);
 #define FCEU_IQDPCM     0x10
 #define FCEU_IQFCOUNT   0x20
 #define FCEU_IQTEMP     0x80
+// from 0.98.15
+#define FCEU_IQEXT2	0x02
 
 #if defined(DEBUG_ASM_6502)
 #define TriggerIRQ TriggerIRQ_d
 #define TriggerNMI TriggerNMI_d
-#define TriggerNMINSF TriggerNMINSF_d
 #define X6502_Run X6502_Run_d
 #define X6502_Reset X6502_Reset_d
 #define X6502_Power X6502_Power_d
 #define X6502_AddCycles X6502_AddCycles_d
 #define X6502_IRQBegin X6502_IRQBegin_d
 #define X6502_IRQEnd X6502_IRQEnd_d
+#define X6502_Rebase X6502_Rebase_d
+#define X6502_GetCycleCount() g_cnt
 #define X6502_C
 #define X6502_A
 #define X6502_D
@@ -70,24 +73,42 @@ extern void FP_FASTAPASS(1) (*MapIRQHook)(int a);
 #elif defined(ASM_6502)
 #define TriggerIRQ TriggerIRQ_a
 #define TriggerNMI TriggerNMI_a
-#define TriggerNMINSF TriggerNMINSF_a
 #define X6502_Reset X6502_Reset_a
 #define X6502_Power X6502_Power_a
 #define X6502_AddCycles X6502_AddCycles_a
-#define X6502_IRQBegin X6502_IRQBegin_a
-#define X6502_IRQEnd X6502_IRQEnd_a
+//#define X6502_IRQBegin X6502_IRQBegin_a
+//#define X6502_IRQEnd X6502_IRQEnd_a
+#define X6502_IRQBegin(w) nes_registers[4]|=w<<8
+#define X6502_IRQEnd(w) nes_registers[4]&=~(w<<8)
+#define X6502_Rebase X6502_Rebase_a
+#define X6502_GetCycleCount() ((int32)nes_registers[7]>>16)
 #define X6502_A
 
-extern uint32 nes_registers[0x10];
 #define X6502_Run(c) \
 { \
  int32 cycles = (c) << 4; /* *16 */ \
  if (PAL) cycles -= (c);  /* *15 */ \
- nes_registers[7]+=cycles; \
- if (nes_registers[7] > 0) X6502_Run_a(); \
+ nes_registers[7]+=cycles<<16; \
+ cycles=(int32)nes_registers[7]>>16; \
+ if (cycles > 0) { \
+   X6502_Run_a(); \
+   cycles -= (int32)nes_registers[7]>>16; \
+   asmcpu_update(cycles); \
+ } \
 }
 
 #else
+#define TriggerIRQ TriggerIRQ_c
+#define TriggerNMI TriggerNMI_c
+#define X6502_Reset X6502_Reset_c
+#define X6502_Power X6502_Power_c
+#define X6502_AddCycles X6502_AddCycles_c
+#define X6502_IRQBegin X6502_IRQBegin_c
+#define X6502_IRQEnd X6502_IRQEnd_c
+#define X6502_Rebase(...)
+#define X6502_GetCycleCount() X.count
+#define X6502_C
+
 #define X6502_Run(c) \
 { \
  int32 cycles = (c) << 4; /* *16 */ \
@@ -100,9 +121,9 @@ extern uint32 nes_registers[0x10];
 
 // c
 #ifdef X6502_C
+extern int32 g_cnt;
 void TriggerIRQ_c(void);
 void TriggerNMI_c(void);
-void TriggerNMINSF_c(void);
 void X6502_Run_c(void);
 void X6502_Reset_c(void);
 void X6502_Power_c(void);
@@ -113,27 +134,29 @@ void FASTAPASS(1) X6502_IRQEnd_c(int w);
 
 // asm
 #ifdef X6502_A
+extern uint32 nes_registers[0x10];
+extern uint32 pc_base;
 void TriggerIRQ_a(void);
 void TriggerNMI_a(void);
-void TriggerNMINSF_a(void);
 void X6502_Run_a(void);
 void X6502_Reset_a(void);
 void X6502_Power_a(void);
 void X6502_AddCycles_a(int x);
 void X6502_IRQBegin_a(int w);
 void X6502_IRQEnd_a(int w);
+void X6502_Rebase_a(void);
 #endif
 
 // debug
 #ifdef X6502_D
 void TriggerIRQ_d(void);
 void TriggerNMI_d(void);
-void TriggerNMINSF_d(void);
 void X6502_Run_d(int32 c);
 void X6502_Reset_d(void);
 void X6502_Power_d(void);
 void X6502_AddCycles_d(int x);
 void X6502_IRQBegin_d(int w);
 void X6502_IRQEnd_d(int w);
+void X6502_Rebase_d(void);
 #endif