From 638cc6264cf3e8d1f046885fb68b5a1e22729d06 Mon Sep 17 00:00:00 2001 From: notaz Date: Sat, 6 Jun 2009 23:33:15 +0300 Subject: [PATCH] cpu clock setup, save rom dir, cleanups --- common.h | 2 +- gp2x/Makefile | 1 - gp2x/cpuctrl_mmsp2.c | 486 ------------------------------------------- gp2x/flush_cache.S | 8 - gp2x/gp2x.c | 92 +++++--- gp2x/gp2x.h | 18 +- gui.c | 96 ++++++--- main.c | 5 - video.c | 11 +- 9 files changed, 131 insertions(+), 588 deletions(-) delete mode 100644 gp2x/cpuctrl_mmsp2.c delete mode 100644 gp2x/flush_cache.S diff --git a/common.h b/common.h index b58228b..0f800d6 100644 --- a/common.h +++ b/common.h @@ -135,8 +135,8 @@ #define file_close(filename_tag) \ { \ - sync(); \ fclose(filename_tag); \ + sync(); \ } \ #else diff --git a/gp2x/Makefile b/gp2x/Makefile index cf0b3a5..7258644 100644 --- a/gp2x/Makefile +++ b/gp2x/Makefile @@ -34,7 +34,6 @@ INCLUDES = `$(PREFIX)/bin/sdl-config --cflags` -I$(PREFIX)/include LIBS = `$(PREFIX)/bin/sdl-config --libs` \ -lm -ldl -lpthread -lz ifneq ($(WIZ),1) -OBJS += cpuctrl_mmsp2.o LIBS += -static endif diff --git a/gp2x/cpuctrl_mmsp2.c b/gp2x/cpuctrl_mmsp2.c deleted file mode 100644 index 60cd6dc..0000000 --- a/gp2x/cpuctrl_mmsp2.c +++ /dev/null @@ -1,486 +0,0 @@ -/* cpuctrl.c for GP2X (CPU/LCD/RAM-Tuner Version 2.0) - Copyright (C) 2006 god_at_hell - original CPU-Overclocker (c) by Hermes/PS2Reality - the gamma-routine was provided by theoddbot - parts (c) Rlyehs Work - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - -*/ - - -/****************************************************************************************************************************************/ -// CPU CONTROL -/****************************************************************************************************************************************/ - -//#include -#include -#include -//#include "gp2xminilib.h" - -#define SYS_CLK_FREQ 7372800 - -//from minimal library rlyeh - -//extern unsigned long gp2x_dev[4]; -extern unsigned short *gp2x_memregs; - -// system registers -static struct -{ - unsigned short SYSCLKENREG,SYSCSETREG,FPLLVSETREG,DUALINT920,DUALINT940,DUALCTRL940,DISPCSETREG,MEMTIMEX0; - unsigned short MEMTIMEX1,MEMREFX,MLC_GAMM_BYPATH,MLC_GAMMA_A,MLC_GAMMA_D,YBNKLVL; -} -system_reg; - -volatile unsigned short *MEM_REG; -unsigned MDIV,PDIV,SCALE; -volatile unsigned *arm940code; - -void cpuctrl_init() -{ - MEM_REG=&gp2x_memregs[0]; -} - -void save_system_regs() -{ - system_reg.SYSCSETREG=MEM_REG[0x91c>>1]; - system_reg.FPLLVSETREG=MEM_REG[0x912>>1]; - system_reg.SYSCLKENREG=MEM_REG[0x904>>1]; - system_reg.DUALINT920=MEM_REG[0x3B40>>1]; - system_reg.DUALINT940=MEM_REG[0x3B42>>1]; - system_reg.DUALCTRL940=MEM_REG[0x3B48>>1]; - system_reg.DISPCSETREG=MEM_REG[0x924>>1]; - system_reg.MEMTIMEX0=MEM_REG[0x3802>>1]; - system_reg.MEMTIMEX1=MEM_REG[0x3804>>1]; - system_reg.MEMREFX=MEM_REG[0x3808>>1]; - system_reg.MLC_GAMM_BYPATH=MEM_REG[0x2880>>1]; - system_reg.MLC_GAMMA_A=MEM_REG[0x295C>>1]; - system_reg.MLC_GAMMA_D=MEM_REG[0x295E>>1]; - system_reg.YBNKLVL=MEM_REG[0x283A>>1]; -} - -void load_system_regs() -{ - MEM_REG[0x91c>>1]=system_reg.SYSCSETREG; - MEM_REG[0x910>>1]=system_reg.FPLLVSETREG; - MEM_REG[0x3B40>>1]=system_reg.DUALINT920; - MEM_REG[0x3B42>>1]=system_reg.DUALINT940; - MEM_REG[0x3B48>>1]=system_reg.DUALCTRL940; - MEM_REG[0x904>>1]=system_reg.SYSCLKENREG; - /* Set UPLLSETVREG to 0x4F02, which gives 80MHz */ - MEM_REG[0x0914>>1] = 0x4F02; - /* Wait for clock change to start */ - while (MEM_REG[0x0902>>1] & 2); - /* Wait for clock change to be verified */ - while (MEM_REG[0x0916>>1] != 0x4F02); - MEM_REG[0x3802>>1]=system_reg.MEMTIMEX0; - MEM_REG[0x3804>>1]=system_reg.MEMTIMEX1; - MEM_REG[0x3808>>1]=system_reg.MEMREFX; - MEM_REG[0x2880>>1]=system_reg.MLC_GAMM_BYPATH; - MEM_REG[0x295C>>1]=system_reg.MLC_GAMMA_A; - MEM_REG[0x295E>>1]=system_reg.MLC_GAMMA_D; - MEM_REG[0x283A>>1]=system_reg.YBNKLVL; -} - - -void set_FCLK(unsigned MHZ) -{ - printf ("set CPU-Frequency = %uMHz\r\n",MHZ); - unsigned v; - unsigned mdiv,pdiv=3,scale=0; - MHZ*=1000000; - mdiv=(MHZ*pdiv)/SYS_CLK_FREQ; - //printf ("Old value = %04X\r",MEM_REG[0x924>>1]," "); - //printf ("APLL = %04X\r",MEM_REG[0x91A>>1]," "); - mdiv=((mdiv-8)<<8) & 0xff00; - pdiv=((pdiv-2)<<2) & 0xfc; - scale&=3; - v=mdiv | pdiv | scale; - MEM_REG[0x910>>1]=v; -} - -unsigned get_FCLK() -{ - return MEM_REG[0x910>>1]; -} - -#if 0 -void set_add_FLCDCLK(int addclock) -{ - //Set LCD controller to use FPLL - printf ("...set to FPLL-Clockgen...\r\n"); - printf ("set Timing-Prescaler = %i\r\n",addclock); - MEM_REG[0x924>>1]= 0x5A00 + ((addclock)<<8); - //If you change the initial timing, don't forget to shift your intervall-borders in "cpu_speed.c" -} - -void set_add_ULCDCLK(int addclock) -{ - //Set LCD controller to use UPLL - printf ("...set to UPLL-Clockgen...\r\n"); - printf ("set Timing-Prescaler = %i\r\n",addclock); - MEM_REG[0x0924>>1] = 0x8900 + ((addclock)<<8); - //If you change the initial timing, don't forget to shift your intervall-borders in "cpu_speed.c" -} - -unsigned get_LCDClk() -{ - if (MEM_REG[0x0924>>1] < 0x7A01) return((MEM_REG[0x0924>>1] - 0x5A00)>>8); - else return((MEM_REG[0x0924>>1] - 0x8900)>>8); -} - -char get_Clkgen() -{ - if (MEM_REG[0x0924>>1] < 0x7A01) return(0); - else return(1); -} - -unsigned get_freq_UCLK() -{ - unsigned i; - unsigned reg,mdiv,pdiv,scale; - i = MEM_REG[0x900>>1]; - i = ((i >> 7) & 1) ; - if(i) return 0; - reg=MEM_REG[0x916>>1]; - mdiv = ((reg & 0xff00) >> 8) + 8; - pdiv = ((reg & 0xfc) >> 2) + 2; - scale = reg & 3; - return ((SYS_CLK_FREQ * mdiv) / (pdiv << scale)); -} - -unsigned get_freq_ACLK() -{ - unsigned i; - unsigned reg,mdiv,pdiv,scale; - i = MEM_REG[0x900>>1]; - i = ((i >> 8) & 1) ; - if(i) return 0; - reg=MEM_REG[0x918>>1]; - mdiv = ((reg & 0xff00) >> 8) + 8; - pdiv = ((reg & 0xfc) >> 2) + 2; - scale = reg & 3; - return ((SYS_CLK_FREQ * mdiv)/(pdiv << scale)); -} - -unsigned get_freq_920_CLK() -{ - unsigned i; - unsigned reg,mdiv,pdiv,scale; - reg=MEM_REG[0x912>>1]; - mdiv = ((reg & 0xff00) >> 8) + 8; - pdiv = ((reg & 0xfc) >> 2) + 2; - scale = reg & 3; - MDIV=mdiv; - PDIV=pdiv; - SCALE=scale; - i = (MEM_REG[0x91c>>1] & 7)+1; - return ((SYS_CLK_FREQ * mdiv)/(pdiv << scale))/i; -} - -unsigned get_freq_940_CLK() -{ - unsigned i; - unsigned reg,mdiv,pdiv,scale; - reg=MEM_REG[0x912>>1]; - mdiv = ((reg & 0xff00) >> 8) + 8; - pdiv = ((reg & 0xfc) >> 2) + 2; - scale = reg & 3; - i = ((MEM_REG[0x91c>>1]>>3) & 7)+1; - return ((SYS_CLK_FREQ * mdiv) / (pdiv << scale))/i; -} - -unsigned get_freq_DCLK() -{ - unsigned i; - unsigned reg,mdiv,pdiv,scale; - reg=MEM_REG[0x912>>1]; - mdiv = ((reg & 0xff00) >> 8) + 8; - pdiv = ((reg & 0xfc) >> 2) + 2; - scale = reg & 3; - i = ((MEM_REG[0x91c>>1]>>6) & 7)+1; - return ((SYS_CLK_FREQ * mdiv) / (pdiv << scale))/i; -} - -void set_920_Div(unsigned short div) -{ - printf ("set divider for CPU-Clock = %u\r\n",div+1); - unsigned short v; - v = MEM_REG[0x91c>>1] & (~0x3); - MEM_REG[0x91c>>1] = (div & 0x7) | v; -} - -unsigned short get_920_Div() -{ - return (MEM_REG[0x91c>>1] & 0x7); -} - -void set_940_Div(unsigned short div) -{ - unsigned short v; - v = (unsigned short)( MEM_REG[0x91c>>1] & (~(0x7 << 3))); - MEM_REG[0x91c>>1] = ((div & 0x7) << 3) | v; -} - -unsigned short get_940_Div() -{ - return ((MEM_REG[0x91c>>1] >> 3) & 0x7); -} - -void set_DCLK_Div( unsigned short div ) -{ - printf ("set divider for RAM-Clock = %u\r\n",div+1); - unsigned short v; - v = (unsigned short)( MEM_REG[0x91c>>1] & (~(0x7 << 6))); - MEM_REG[0x91c>>1] = ((div & 0x7) << 6) | v; -} - -unsigned short get_DCLK_Div() -{ - return ((MEM_REG[0x91c>>1] >> 6) & 0x7); -} - -unsigned short Disable_Int_920() -{ - unsigned short ret; - ret=MEM_REG[0x3B40>>1]; - MEM_REG[0x3B40>>1]=0; - MEM_REG[0x3B44>>1]=0xffff; - return ret; -} - -unsigned short Disable_Int_940() -{ - unsigned short ret; - ret=MEM_REG[0x3B42>>1]; - MEM_REG[0x3B42>>1]=0; - MEM_REG[0x3B46>>1]=0xffff; - return ret; -} - -unsigned get_state940() -{ - return MEM_REG[0x904>>1]; -} - - -void Enable_Int_920(unsigned short flag) -{ - MEM_REG[0x3B40>>1]=flag; -} - -void Enable_Int_940(unsigned short flag) -{ - MEM_REG[0x3B42>>1]=flag; -} - -void Disable_940() -{ - Disable_Int_940(); - MEM_REG[0x3B48>>1]|= (1 << 7); - MEM_REG[0x904>>1]&=0xfffe; -} - -void Load_940_code(unsigned *code,int size) -{ - unsigned *cp; - int i; - arm940code=(unsigned short *)mmap(0, 0x100000, PROT_READ|PROT_WRITE, MAP_SHARED, gp2x_dev[2], 0x03000000); - Disable_940(); - cp=(unsigned *) code; - for (i = 0; i < size/4; i ++) - { - arm940code[i] = cp[i]; - } - for (i = 0; i < 64; i ++) - { - arm940code[0x3FC0+i] = 0; - } - MEM_REG[0x3B48>>1]=(MEM_REG[0x3B48>>1] & 0xFF00) | 0x03; // allow 940 -} - -void clock_940_off() -{ - MEM_REG[0x904>>1]&=0xfffe; -} - -void clock_940_on() -{ - MEM_REG[0x904>>1]|=1; -} -#endif - - -//-------------- -//Memory Timings -//-------------- - -//get - -unsigned get_CAS() -{ - return ((MEM_REG[0x3804>>1] >> 12) & 0x1); -} - -unsigned get_tRC() -{ - return ((MEM_REG[0x3804>>1] >> 8) & 0xF); -} - -unsigned get_tRAS() -{ - return ((MEM_REG[0x3804>>1] >> 4) & 0xF); -} - -unsigned get_tWR() -{ - return (MEM_REG[0x3804>>1] & 0xF); -} - -unsigned get_tMRD() -{ - return ((MEM_REG[0x3802>>1] >> 12) & 0xF); -} - -unsigned get_tRFC() -{ - return ((MEM_REG[0x3802>>1] >> 8) & 0xF); -} - -unsigned get_tRP() -{ - return ((MEM_REG[0x3802>>1] >> 4) & 0xF); -} - -unsigned get_tRCD() -{ - return (MEM_REG[0x3802>>1] & 0xF); -} - -unsigned get_REFPERD() -{ - return MEM_REG[0x3808>>1]; -} - - -//set - -void set_CAS(unsigned short timing) -{ - printf ("set CAS = %u\r\n",timing+2); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3804>>1] & (~(0x1 << 12))); - MEM_REG[0x3804>>1] = ((timing & 0x1) << 12) | v; -} - -void set_tRC(unsigned short timing) -{ - printf ("set tRC = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3804>>1] & (~(0xF << 8))); - MEM_REG[0x3804>>1] = ((timing & 0xF) << 8) | v; -} - -void set_tRAS(unsigned short timing) -{ - printf ("set tRAS = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3804>>1] & (~(0xF << 4))); - MEM_REG[0x3804>>1] = ((timing & 0xF) << 4) | v; -} - -void set_tWR(unsigned short timing) -{ - printf ("set tWR = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3804>>1] & (~(0xF))); - MEM_REG[0x3804>>1] = (timing & 0xF) | v; -} - -void set_tMRD(unsigned short timing) -{ - printf ("set tMRD = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3802>>1] & (~(0xF << 12))); - MEM_REG[0x3802>>1] = ((timing & 0xF) << 12) | v; -} - -void set_tRFC(unsigned short timing) -{ - printf ("set tRFC = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3802>>1] & (~(0xF << 8))); - MEM_REG[0x3802>>1] = ((timing & 0xF) << 8) | v; -} - -void set_tRP(unsigned short timing) -{ - printf ("set tRP = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3802>>1] & (~(0xF << 4))); - MEM_REG[0x3802>>1] = ((timing & 0xF) << 4) | v; -} - -void set_tRCD(unsigned short timing) -{ - printf ("set tRCD = %u\r\n",timing+1); - unsigned short v; - v = (unsigned short)(MEM_REG[0x3802>>1] & (~(0xF))); - MEM_REG[0x3802>>1] = (timing & 0xF) | v; -} - -void set_REFPERD(unsigned short timing) -{ - printf ("set Refresh Period = %u\r\n",timing+1); - MEM_REG[0x3808>>1] = timing; -} - - -//----- -//Gamma -//----- - -void set_gamma(float gamma) -{ - printf ("set gamma = %f\r\n",gamma); - int i; - gamma = 1/gamma; - - //enable gamma - MEM_REG[0x2880>>1]&=~(1<<12); - - MEM_REG[0x295C>>1]=0; - for(i=0; i<256; i++) - { - unsigned char g; - unsigned short s; - g =(unsigned char)(255.0*pow(i/255.0,gamma)); - s = (g<<8) | g; - MEM_REG[0x295E>>1]= s; - MEM_REG[0x295E>>1]= g; - } -} - -unsigned get_YBNKLVL() -{ - return (MEM_REG[0x283A>>1] & 0x3FF); -} - -void set_YBNKLVL(unsigned short val) -{ - unsigned short temp = (unsigned short)(MEM_REG[0x3808>>1] & (~(0x3FF))); - MEM_REG[0x3808>>1] = (val & 0x3FF) | temp; -} diff --git a/gp2x/flush_cache.S b/gp2x/flush_cache.S deleted file mode 100644 index 4bde0e7..0000000 --- a/gp2x/flush_cache.S +++ /dev/null @@ -1,8 +0,0 @@ -@ vim:filetype=armasm - -.global gp2x_flush_cache @ beginning_addr, end_addr, flags - -gp2x_flush_cache: - swi #0x9f0002 - mov pc, lr - diff --git a/gp2x/gp2x.c b/gp2x/gp2x.c index a8ec704..2107e61 100644 --- a/gp2x/gp2x.c +++ b/gp2x/gp2x.c @@ -19,16 +19,17 @@ */ +#define _BSD_SOURCE +#define _GNU_SOURCE #include #include #include +#include +#include #include "../common.h" #include "gp2x.h" #include "warm.h" -extern int main_cpuspeed(int argc, char *argv[]); -extern SDL_Surface* screen; - u32 gp2x_audio_volume = 74/2; u32 gpsp_gp2x_dev_audio = 0; u32 gpsp_gp2x_dev = 0; @@ -36,24 +37,6 @@ u32 gpsp_gp2x_gpiodev = 0; static volatile u16 *gpsp_gp2x_memregs; static volatile u32 *gpsp_gp2x_memregl; -unsigned short *gp2x_memregs; - -s32 gp2x_load_mmuhack() -{ - s32 mmufd = open("/dev/mmuhack", O_RDWR); - - if(mmufd < 0) - { - system("/sbin/insmod mmuhack.o"); - mmufd = open("/dev/mmuhack", O_RDWR); - } - - if(mmufd < 0) - return -1; - - close(mmufd); - return 0; -} #ifdef WIZ_BUILD #include @@ -140,27 +123,55 @@ static void fb_video_exit() void gp2x_init() { + FILE *f; gpsp_gp2x_dev = open("/dev/mem", O_RDWR); gpsp_gp2x_dev_audio = open("/dev/mixer", O_RDWR); gpsp_gp2x_memregl = (unsigned long *)mmap(0, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, gpsp_gp2x_dev, 0xc0000000); gpsp_gp2x_memregs = (unsigned short *)gpsp_gp2x_memregl; + warm_init(); #ifdef WIZ_BUILD gpsp_gp2x_gpiodev = open("/dev/GPIO", O_RDONLY); - warm_init(); fb_video_init(); #endif -// clear_screen(0); -// main_cpuspeed(0, NULL); - gp2x_memregs = (void *)gpsp_gp2x_memregs; - cpuctrl_init(); + f = fopen("romdir.txt", "r"); + if (f != NULL) + { + char buff[256]; + char *s = fgets(buff, sizeof(buff) - 1, f); + if (s) + { + int r = strlen(s); + while (r > 0 && isspace(buff[r-1])) + buff[--r] = 0; + chdir(buff); + } + fclose(f); + } + gp2x_sound_volume(1); } +#include void gp2x_quit() { + char buff[256]; + FILE *f; + + getcwd(buff, sizeof(buff)); + chdir(main_path); + f = fopen("romdir.txt", "r+"); + if (f != NULL) + { + fprintf(f, "%s", buff); + fclose(f); + truncate("romdir.txt", strlen(buff)); + sync(); + } + + warm_finish(); #ifdef WIZ_BUILD close(gpsp_gp2x_gpiodev); fb_video_exit(); @@ -169,6 +180,7 @@ void gp2x_quit() close(gpsp_gp2x_dev_audio); close(gpsp_gp2x_dev); + fcloseall(); //chdir("/usr/gp2x"); //execl("gp2xmenu", "gp2xmenu", NULL); exit(0); @@ -219,13 +231,29 @@ u32 gpsp_gp2x_joystick_read(void) #endif } -#ifdef WIZ_BUILD -void cpuctrl_init(void) -{ -} - +// Fout = (m * Fin) / (p * 2^s) void set_FCLK(u32 MHZ) { -} + u32 v; + u32 mdiv, pdiv, sdiv = 0; +#ifdef WIZ_BUILD + #define SYS_CLK_FREQ 27 + // m = MDIV, p = PDIV, s = SDIV + pdiv = 9; + mdiv = (MHZ * pdiv) / SYS_CLK_FREQ; + mdiv &= 0x3ff; + v = (pdiv<<18) | (mdiv<<8) | sdiv; + + gpsp_gp2x_memregl[0xf004>>2] = v; + gpsp_gp2x_memregl[0xf07c>>2] |= 0x8000; +#else + #define SYS_CLK_FREQ 7372800 + // m = MDIV + 8, p = PDIV + 2, s = SDIV + pdiv = 3; + mdiv = (MHZ * pdiv * 1000000) / SYS_CLK_FREQ; + mdiv &= 0xff; + v = ((mdiv-8)<<8) | ((pdiv-2)<<2) | sdiv; + gpsp_gp2x_memregs[0x910>>1] = v; #endif +} diff --git a/gp2x/gp2x.h b/gp2x/gp2x.h index df7d141..a801485 100644 --- a/gp2x/gp2x.h +++ b/gp2x/gp2x.h @@ -1,6 +1,8 @@ #ifndef GP2X_H #define GP2X_H +#include "warm.h" + enum { GP2X_UP = 1 << 0, @@ -33,23 +35,9 @@ extern u32 gpsp_gp2x_dev; void gp2x_sound_volume(u32 volume_up); void gp2x_quit(); -// call this at first -void cpuctrl_init(void); -void save_system_regs(void); -void cpuctrl_deinit(void); -void set_display_clock_div(unsigned div); - void set_FCLK(u32 MHZ); -// 0 to 7 divider (freq = FCLK / (1 + div)) -void set_920_Div(u16 div); -void set_DCLK_Div(u16 div); - -void Disable_940(void); -void gp2x_video_wait_vsync(void); -unsigned short get_920_Div(); -void set_940_Div(u16 div); -s32 gp2x_load_mmuhack(); +void upscale_aspect(u16 *dst, u16 *src); /* wiz only */ extern void *gpsp_gp2x_screen; diff --git a/gui.c b/gui.c index 18170f7..8e0c1d4 100644 --- a/gui.c +++ b/gui.c @@ -78,6 +78,34 @@ #define COLOR_FRAMESKIP_BAR color16(15, 31, 31) #define COLOR_HELP_TEXT color16(16, 40, 24) +#ifdef PSP_BUILD + #define get_clock_speed() \ + clock_speed = (clock_speed_number + 1) * 33 + #define get_clock_speed_number() \ + clock_speed_number = (clock_speed / 33) - 1 +#elif defined(WIZ_BUILD) + #define get_clock_speed() \ + clock_speed = 300 + (clock_speed_number * 3333) / 100 + #define get_clock_speed_number() \ + clock_speed_number = (clock_speed - 300) / 33 +#elif defined(GP2X_BUILD) + #define get_clock_speed() \ + clock_speed = 150 + clock_speed_number * 10 + #define get_clock_speed_number() \ + clock_speed_number = (clock_speed - 150) / 10 +#else + #define get_clock_speed() 0 + #define get_clock_speed_number() 0 +#endif + +const int +#ifdef WIZ_BUILD + default_clock_speed = 533; +#elif defined(GP2X_BUILD) + default_clock_speed = 200; +#else + default_clock_speed = 333; +#endif int sort_function(const void *dest_str_ptr, const void *src_str_ptr) { char *dest_str = *((char **)dest_str_ptr); @@ -676,7 +704,10 @@ s32 load_game_config_file() random_skip = file_options[2] % 2; clock_speed = file_options[3]; -#ifdef GP2X_BUILD +#ifdef WIZ_BUILD + if(clock_speed > 900) + clock_speed = 533; +#elif defined(GP2X_BUILD) if(clock_speed >= 300) clock_speed = 200; #else @@ -710,11 +741,7 @@ s32 load_game_config_file() current_frameskip_type = auto_frameskip; frameskip_value = 4; random_skip = 0; -#ifdef GP2X_BUILD - clock_speed = 200; -#else - clock_speed = 333; -#endif + clock_speed = default_clock_speed; for(i = 0; i < 10; i++) { @@ -959,9 +986,7 @@ void get_savestate_filename_noshot(u32 slot, u8 *name_buffer) u32 menu(u16 *original_screen) { u32 clock_speed_number; -#ifdef GP2X_BUILD - static u32 clock_speed_old = 200; -#endif + static u32 clock_speed_old = default_clock_speed; u8 print_buffer[81]; u32 _current_option = 0; gui_action_type gui_action; @@ -1017,11 +1042,7 @@ u32 menu(u16 *original_screen) void menu_quit() { - #ifdef PSP_BUILD - clock_speed = (clock_speed_number + 1) * 33; - #elif defined(GP2X_BUILD) - clock_speed = 150 + clock_speed_number * 10; - #endif + get_clock_speed(); save_config_file(); quit(); } @@ -1154,9 +1175,13 @@ u32 menu(u16 *original_screen) u8 *scale_options[] = { +#ifdef WIZ_BUILD + "unscaled 3:2", "scaled 3:2 (slower)" +#else "unscaled 3:2", "scaled 3:2", "fullscreen" #ifdef PSP_BUILD " 16:9" +#endif #endif }; @@ -1181,7 +1206,15 @@ u32 menu(u16 *original_screen) u8 *update_backup_options[] = { "Exit only", "Automatic" }; -#ifdef GP2X_BUILD +#ifdef WIZ_BUILD + u8 *clock_speed_options[] = + { + "300MHz", "333MHz", "366MHz", "400MHz", "433MHz", + "466MHz", "500MHz", "533MHz", "566MHz", "600MHz", + "633MHz", "666MHz", "700MHz", "733MHz", "766MHz", + "800MHz", "833MHz", "866MHz", "900MHz" + }; +#elif defined(GP2X_BUILD) u8 *clock_speed_options[] = { "150MHz", "160MHz", "170MHz", "180MHz", "190MHz", @@ -1315,11 +1348,7 @@ u32 menu(u16 *original_screen) cheat_option(9), string_selection_option(NULL, "Clock speed", clock_speed_options, &clock_speed_number, -#ifdef GP2X_BUILD - 15, -#else - 10, -#endif + sizeof(clock_speed_options) / sizeof(clock_speed_options[0]), "Change the clock speed of the device. Higher clock\n" "speed will yield better performance, but will drain\n" "battery life further.", 11), @@ -1525,11 +1554,13 @@ u32 menu(u16 *original_screen) } } -#ifdef PSP_BUILD - clock_speed_number = (clock_speed / 33) - 1; -#elif defined(GP2X_BUILD) - clock_speed_number = (clock_speed - 150) / 10; -#endif + get_clock_speed_number(); + if (clock_speed_number < 0 || clock_speed_number >= + sizeof(clock_speed_options) / sizeof(clock_speed_options[0])) + { + clock_speed = default_clock_speed; + get_clock_speed_number(); + } video_resolution_large(); @@ -1680,18 +1711,17 @@ u32 menu(u16 *original_screen) set_gba_resolution(screen_scale); video_resolution_small(); + get_clock_speed(); + if (clock_speed != clock_speed_old) + { + printf("about to set CPU clock to %iMHz\n", clock_speed); #ifdef PSP_BUILD - clock_speed = (clock_speed_number + 1) * 33; scePowerSetClockFrequency(clock_speed, clock_speed, clock_speed / 2); #elif defined(GP2X_BUILD) - clock_speed = 150 + clock_speed_number * 10; - if (clock_speed != clock_speed_old) - { - printf("about to set CPU clock to %iMHz\n", clock_speed); - set_FCLK(clock_speed); - clock_speed_old = clock_speed; - } + set_FCLK(clock_speed); #endif + clock_speed_old = clock_speed; + } SDL_PauseAudio(0); diff --git a/main.c b/main.c index 571336f..3bdc850 100644 --- a/main.c +++ b/main.c @@ -193,11 +193,6 @@ int main(int argc, char *argv[]) u8 load_filename[512]; u8 bios_filename[512]; -#ifdef GP2X_BUILD - if(gp2x_load_mmuhack() == -1) -;// delay_us(2500000); -#endif - #ifdef PSP_BUILD sceKernelRegisterSubIntrHandler(PSP_VBLANK_INT, 0, vblank_interrupt_handler, NULL); diff --git a/video.c b/video.c index 8edea82..457a7b5 100644 --- a/video.c +++ b/video.c @@ -105,7 +105,6 @@ SDL_Surface *hw_screen; #endif SDL_Surface *screen; const u32 video_scale = 1; -extern void gp2x_flush_cache(void *beginning_addr, void *end_addr, int flags); #define get_screen_pixels() \ ((u16 *)screen->pixels) \ @@ -3443,9 +3442,7 @@ void flip_screen() { SDL_BlitSurface(screen, NULL, hw_screen, NULL); } - /* it is unclear if this syscall takes virtual or physical addresses, - * but using virtual seems to work for me. */ - gp2x_flush_cache(hw_screen->pixels, hw_screen->pixels + 320*240, 0); + warm_cache_op_all(WOP_D_CLEAN); } #else SDL_Flip(screen); @@ -3570,7 +3567,7 @@ void init_video() screen = SDL_CreateRGBSurface(SDL_HWSURFACE, 240 * video_scale, 160 * video_scale, 16, 0xFFFF, 0xFFFF, 0xFFFF, 0); - gp2x_load_mmuhack(); + warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else screen = SDL_SetVideoMode(240 * video_scale, 160 * video_scale, 16, 0); #endif @@ -3743,7 +3740,7 @@ void video_resolution_large() resolution_height = 240; SDL_ShowCursor(0); - gp2x_load_mmuhack(); + warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else screen = SDL_SetVideoMode(480, 272, 16, 0); resolution_width = 480; @@ -3775,7 +3772,7 @@ void video_resolution_small() SDL_ShowCursor(0); - gp2x_load_mmuhack(); + warm_change_cb_upper(WCB_C_BIT|WCB_B_BIT, 1); #else screen = SDL_SetVideoMode(small_resolution_width * video_scale, small_resolution_height * video_scale, 16, 0); -- 2.39.2