From b0eec79345b2587d433e782a4bbc6f4d1478c09b Mon Sep 17 00:00:00 2001 From: notaz Date: Sat, 1 Aug 2009 14:33:09 +0000 Subject: [PATCH] pollux overclocking with dividers git-svn-id: file:///home/notaz/opt/svn/PicoDrive/platform@724 be3aeb3a-fb24-0410-a615-afba39da0efa --- gp2x/pollux_set.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/gp2x/pollux_set.c b/gp2x/pollux_set.c index fc60b27..9781c82 100644 --- a/gp2x/pollux_set.c +++ b/gp2x/pollux_set.c @@ -196,8 +196,8 @@ static int apply_cpuclk(volatile unsigned short *memregs, void *data) { volatile unsigned int *memregl = (volatile void *)memregs; int mhz = *(int *)data; - int mdiv, pdiv, sdiv = 0; - int i, v; + int adiv, mdiv, pdiv, sdiv = 0; + int i, vf000, vf004; // m = MDIV, p = PDIV, s = SDIV #define SYS_CLK_FREQ 27 @@ -205,13 +205,21 @@ static int apply_cpuclk(volatile unsigned short *memregs, void *data) mdiv = (mhz * pdiv) / SYS_CLK_FREQ; if (mdiv & ~0x3ff) return -1; - v = (pdiv<<18) | (mdiv<<8) | sdiv; + vf004 = (pdiv<<18) | (mdiv<<8) | sdiv; - memregl[0xf004>>2] = v; + // attempt to keep AHB the divider close to 250, but not higher + for (adiv = 1; mhz / adiv > 250; adiv++) + ; + + vf000 = memregl[0xf000>>2]; + vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6); + memregl[0xf000>>2] = vf000; + memregl[0xf004>>2] = vf004; memregl[0xf07c>>2] |= 0x8000; for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++) ; + printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv); return 0; } -- 2.39.2