CORE: Some more try on new_dynarec (no effect it seems

diff --git a/source/mupen64plus-core/projects/unix/Makefile b/source/mupen64plus-core/projects/unix/Makefile
index 6776f35..627f194 100755 (executable)
--- a/source/mupen64plus-core/projects/unix/Makefile
+++ b/source/mupen64plus-core/projects/unix/Makefile
@@ -105,7 +105,7 @@ ifeq ("$(CPU)","NONE")
 endif
 
 # base CFLAGS, LDLIBS, and LDFLAGS
-OPTFLAGS ?= -O3 -flto -fuse-linker-plugin
+OPTFLAGS ?= -O3
 WARNFLAGS ?= -Wall
 CFLAGS += $(OPTFLAGS) $(WARNFLAGS) -ffast-math -fno-strict-aliasing -fvisibility=hidden -I../../src -DM64P_PARALLEL
 CXXFLAGS += -fvisibility-inlines-hidden

diff --git a/source/mupen64plus-core/src/r4300/interpreter_cop0.def b/source/mupen64plus-core/src/r4300/interpreter_cop0.def
old mode 100644 (file)
new mode 100755 (executable)
index 313ec9d..98f8eaa
--- a/source/mupen64plus-core/src/r4300/interpreter_cop0.def
+++ b/source/mupen64plus-core/src/r4300/interpreter_cop0.def
@@ -72,10 +72,8 @@ DECLARE_INSTRUCTION(MTC0)
       interupt_unsafe_state = 1;
       if (next_interupt <= Count) gen_interupt();
       interupt_unsafe_state = 0;
-      debug_count += Count;
       translate_event_queue((unsigned int) rrt & 0xFFFFFFFF);
       Count = (unsigned int) rrt & 0xFFFFFFFF;
-      debug_count -= Count;
       break;
     case 10:   // EntryHi
       EntryHi = (unsigned int) rrt & 0xFFFFE0FF;

diff --git a/source/mupen64plus-core/src/r4300/new_dynarec/assem_arm.c b/source/mupen64plus-core/src/r4300/new_dynarec/assem_arm.c
index 560fc52..88fc797 100755 (executable)
--- a/source/mupen64plus-core/src/r4300/new_dynarec/assem_arm.c
+++ b/source/mupen64plus-core/src/r4300/new_dynarec/assem_arm.c
@@ -4096,6 +4096,22 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
       }
       if(opcode2[i]==0x1A) // DIV
       {
+               #if 1
+        signed char m1l=get_reg(i_regs->regmap,rs1[i]);
+        signed char m2l=get_reg(i_regs->regmap,rs2[i]);
+        assert(m1l>=0);
+        assert(m2l>=0);
+        save_regs(0x100f);
+        if(m1l!=0) emit_mov(m1l,0);
+        if(m2l<1) emit_readword((int)&dynarec_local,1);
+        else if(m2l>1) emit_mov(m2l,1);
+        emit_call((int)&div32);
+        restore_regs(0x100f);
+        signed char hil=get_reg(i_regs->regmap,HIREG);
+        if(hil>=0) emit_loadreg(HIREG,hil);
+        signed char lol=get_reg(i_regs->regmap,LOREG);
+        if(lol>=0) emit_loadreg(LOREG,lol);
+               #else
         signed char d1=get_reg(i_regs->regmap,rs1[i]);
         signed char d2=get_reg(i_regs->regmap,rs2[i]);
         assert(d1>=0);
@@ -4122,6 +4138,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_negmi(quotient,quotient);
         emit_test(d1,d1);
         emit_negmi(remainder,remainder);
+               #endif
       }
       if(opcode2[i]==0x1B) // DIVU
       {
@@ -4201,8 +4218,12 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         restore_regs(0x100f);
         signed char hih=get_reg(i_regs->regmap,HIREG|64);
         signed char hil=get_reg(i_regs->regmap,HIREG);
+        if(hih>=0) emit_loadreg(HIREG|64,hih);
+        if(hil>=0) emit_loadreg(HIREG,hil);
         signed char loh=get_reg(i_regs->regmap,LOREG|64);
         signed char lol=get_reg(i_regs->regmap,LOREG);
+        if(loh>=0) emit_loadreg(LOREG|64,loh);
+        if(lol>=0) emit_loadreg(LOREG,lol);
         /*signed char temp=get_reg(i_regs->regmap,-1);
         signed char rh=get_reg(i_regs->regmap,HIREG|64);
         signed char rl=get_reg(i_regs->regmap,HIREG);
@@ -4328,7 +4349,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
     // Multiply by zero is zero.
     // MIPS does not have a divide by zero exception.
     // The result is undefined, we return zero.
-/*    if((opcode2[i]&4)!=0) // 64-bit
+    if((opcode2[i]&4)!=0) // 64-bit
     {
         signed char hih=get_reg(i_regs->regmap,HIREG|64);
                signed char hr=get_reg(i_regs->regmap,HIREG);
@@ -4338,7 +4359,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
                if(hr>=0) emit_zeroreg(hr);
         if(loh>=0) emit_zeroreg(loh);
                if(lr>=0) emit_zeroreg(lr);
-       } else */
+       } else
        {
                signed char hr=get_reg(i_regs->regmap,HIREG);
                signed char lr=get_reg(i_regs->regmap,LOREG);

diff --git a/source/mupen64plus-core/src/r4300/new_dynarec/new_dynarec.c b/source/mupen64plus-core/src/r4300/new_dynarec/new_dynarec.c
index 9a5226e..d177324 100755 (executable)
--- a/source/mupen64plus-core/src/r4300/new_dynarec/new_dynarec.c
+++ b/source/mupen64plus-core/src/r4300/new_dynarec/new_dynarec.c
@@ -845,24 +845,58 @@ static void alloc_all(struct regstat *cur,int i)
 
 static void div64(int64_t dividend,int64_t divisor)
 {
+  if ((dividend) && (divisor)) {
   lo=dividend/divisor;
   hi=dividend%divisor;
+  } else {
+  lo=0;
+  hi=0;
+  }
   //DebugMessage(M64MSG_VERBOSE, "TRACE: ddiv %8x%8x %8x%8x" ,(int)reg[HIREG],(int)(reg[HIREG]>>32)
   //                                     ,(int)reg[LOREG],(int)(reg[LOREG]>>32));
 }
 static void divu64(uint64_t dividend,uint64_t divisor)
 {
+  if ((dividend) && (divisor)) {
+  lo=dividend/divisor;
+  hi=dividend%divisor;
+  } else {
+  lo=0;
+  hi=0;
+  }
+  //DebugMessage(M64MSG_VERBOSE, "TRACE: ddivu %8x%8x %8x%8x",(int)reg[HIREG],(int)(reg[HIREG]>>32)
+  //                                     ,(int)reg[LOREG],(int)(reg[LOREG]>>32));
+}
+static void div32(int32_t dividend,int32_t divisor)
+{
+  if ((dividend) && (divisor)) {
   lo=dividend/divisor;
   hi=dividend%divisor;
+  } else {
+  lo=0;
+  hi=0;
+  }
+  //DebugMessage(M64MSG_VERBOSE, "TRACE: ddiv %8x%8x %8x%8x" ,(int)reg[HIREG],(int)(reg[HIREG]>>32)
+  //                                     ,(int)reg[LOREG],(int)(reg[LOREG]>>32));
+}
+static void divu32(uint32_t dividend,uint32_t divisor)
+{
+  if ((dividend) && (divisor)) {
+  lo=dividend/divisor;
+  hi=dividend%divisor;
+  } else {
+  lo=0;
+  hi=0;
+  }
   //DebugMessage(M64MSG_VERBOSE, "TRACE: ddivu %8x%8x %8x%8x",(int)reg[HIREG],(int)(reg[HIREG]>>32)
   //                                     ,(int)reg[LOREG],(int)(reg[LOREG]>>32));
 }
 
 static void mult64(int64_t m1,int64_t m2)
 {
-   unsigned long long int op1, op2, op3, op4;
-   unsigned long long int result1, result2, result3, result4;
-   unsigned long long int temp1, temp2, temp3, temp4;
+   uint64_t op1, op2, op3, op4;
+   uint64_t result1, result2, result3, result4;
+   uint64_t temp1, temp2, temp3, temp4;
    int sign = 0;
    
    if (m1 < 0)
@@ -906,9 +940,9 @@ static void mult64(int64_t m1,int64_t m2)
 #if NEW_DYNAREC == NEW_DYNAREC_ARM
 static void multu64(uint64_t m1,uint64_t m2)
 {
-   unsigned long long int op1, op2, op3, op4;
-   unsigned long long int result1, result2, result3, result4;
-   unsigned long long int temp1, temp2, temp3, temp4;
+   uint64_t op1, op2, op3, op4;
+   uint64_t result1, result2, result3, result4;
+   uint64_t temp1, temp2, temp3, temp4;
    
    op1 = m1 & 0xFFFFFFFF;
    op2 = (m1 >> 32) & 0xFFFFFFFF;

diff --git a/source/mupen64plus-core/src/r4300/r4300.c b/source/mupen64plus-core/src/r4300/r4300.c
old mode 100644 (file)
new mode 100755 (executable)
index 9a64fdb..7f58def
--- a/source/mupen64plus-core/src/r4300/r4300.c
+++ b/source/mupen64plus-core/src/r4300/r4300.c
@@ -60,7 +60,6 @@ long long int local_rs;
 long long int reg_cop1_fgr_64[32];
 tlb tlb_e[32];
 unsigned int delay_slot, skip_jump = 0, dyna_interp = 0, last_addr;
-unsigned long long int debug_count = 0;
 unsigned int CIC_Chip;
 char invalid_code[0x100000];
 
@@ -982,7 +981,6 @@ void r4300_execute(void)
 
     current_instruction_table = cached_interpreter_table;
 
-    debug_count = 0;
     delay_slot=0;
     stop = 0;
     rompause = 0;
@@ -1066,7 +1064,6 @@ void r4300_execute(void)
         free_blocks();
     }
 
-    debug_count+= Count;
     DebugMessage(M64MSG_INFO, "R4300 emulator finished.");
 
     /* print instruction counts */

diff --git a/source/mupen64plus-core/src/r4300/r4300.h b/source/mupen64plus-core/src/r4300/r4300.h
old mode 100644 (file)
new mode 100755 (executable)
index 399a9fb..a4142a1
--- a/source/mupen64plus-core/src/r4300/r4300.h
+++ b/source/mupen64plus-core/src/r4300/r4300.h
@@ -39,7 +39,6 @@ extern long long int reg_cop1_fgr_64[32];
 extern int FCR0, FCR31;
 extern tlb tlb_e[32];
 extern unsigned int delay_slot, skip_jump, dyna_interp, op;
-extern unsigned long long int debug_count;
 extern unsigned int r4300emu;
 extern unsigned int next_interupt, CIC_Chip;
 extern int rounding_mode, trunc_mode, round_mode, ceil_mode, floor_mode;