cdrom: change pause timing again
[pcsx_rearmed.git] / frontend / cspace_arm.S
CommitLineData
d57557c0 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2013
3 *
4 * This work is licensed under the terms of GNU GPL version 2 or later.
5 * See the COPYING file in the top-level directory.
6 */
7
8#include "arm_features.h"
9
10.text
11.align 2
12
13@ lr=0x001f001f
14@ trashes r11, r12
15.macro bgr555_to_rgb565_one rn
16 and r11, lr, \rn
17 and r12, lr, \rn, lsr #5
18 and \rn, lr, \rn, lsr #10
19 orr r12, r11, lsl #5
20 orr \rn, r12, lsl #6
21.endm
22
23.macro pld_ reg offs=#0
24#ifdef HAVE_ARMV6
25 pld [\reg, \offs]
26#endif
27.endm
28
5c6457c3 29FUNCTION(bgr555_to_rgb565): @ void *dst, const void *src, int bytes
d57557c0 30 pld_ r1
31 push {r4-r11,lr}
32 mov lr, #0x001f
33 subs r2, #4*8
34 orr lr, lr, lsl #16
35 blt 1f
36
f189413e 37 @ src can be unaligned, but that's very rare, so just force it.
38 @ The manual says unaligned ldm should fault, and it does on
39 @ cortex-a78's 32bit mode, but curiously on cortex-a8 it just
40 @ works and loads the data correctly.
41 bic r1, r1, #3
42
d57557c0 430:
44 ldmia r1!, {r3-r10}
45 subs r2, #4*8
46 bgr555_to_rgb565_one r3
47
48 pld_ r1, #32*2
49 bgr555_to_rgb565_one r4
50 bgr555_to_rgb565_one r5
51 bgr555_to_rgb565_one r6
52 bgr555_to_rgb565_one r7
53 bgr555_to_rgb565_one r8
54 bgr555_to_rgb565_one r9
55 bgr555_to_rgb565_one r10
56 stmia r0!, {r3-r10}
57 bge 0b
58
591:
60 adds r2, #4*8
61 popeq {r4-r11,pc}
62
632:
64 ldr r3, [r1], #4
65 subs r2, #4
66 bgr555_to_rgb565_one r3
67 str r3, [r0], #4
68 bgt 2b
69
70 pop {r4-r11,pc}