frontend: input driver and volume control for Wiz
[pcsx_rearmed.git] / frontend / plat_pollux.c
CommitLineData
55b0eeea 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2011
3 *
4 * This work is licensed under the terms of the GNU GPLv2 or later.
5 * See the COPYING file in the top-level directory.
6 */
7
8#include <stdio.h>
9#include <stdlib.h>
10#include <string.h>
11#include <sys/types.h>
12#include <sys/stat.h>
13#include <fcntl.h>
14#include <sys/ioctl.h>
15#include <unistd.h>
16#include <linux/fb.h>
17#include <sys/mman.h>
221be40d 18#include <linux/soundcard.h>
55b0eeea 19
20#include "common/input.h"
221be40d 21#include "gp2x/in_gp2x.h"
55b0eeea 22#include "common/menu.h"
23#include "warm/warm.h"
24#include "plugin_lib.h"
221be40d 25#include "pl_gun_ts.h"
55b0eeea 26#include "cspace.h"
02ee7e24 27#include "blit320.h"
faf2b2aa 28#include "in_tsbutton.h"
55b0eeea 29#include "main.h"
30#include "menu.h"
31#include "plat.h"
d3f3bf09 32#include "pcnt.h"
55b0eeea 33
221be40d 34int gp2x_dev_id;
35
36static int fbdev = -1, memdev = -1, battdev = -1, mixerdev = -1;
55b0eeea 37static volatile unsigned short *memregs;
38static volatile unsigned int *memregl;
39static void *fb_vaddrs[2];
40static unsigned int fb_paddrs[2];
41static int fb_work_buf;
02ee7e24 42static int cpu_clock_allowed, have_warm;
0b6c6da8 43static unsigned int saved_video_regs[2][6];
44#define FB_VRAM_SIZE (320*240*2*2*2) // 2 buffers with space for 24bpp mode
55b0eeea 45
46static unsigned short *psx_vram;
47static unsigned int psx_vram_padds[512];
02ee7e24 48static int psx_step, psx_width, psx_height, psx_bpp;
49static int psx_offset_x, psx_offset_y;
41f55c9f 50static int fb_offset_x, fb_offset_y;
55b0eeea 51
52// TODO: get rid of this
53struct vout_fbdev;
54struct vout_fbdev *layer_fb;
55int g_layer_x, g_layer_y, g_layer_w, g_layer_h;
56
57int omap_enable_layer(int enabled)
58{
59 return 0;
60}
61
62static void *fb_flip(void)
63{
0b6c6da8 64 memregl[0x406C>>2] = memregl[0x446C>>2] = fb_paddrs[fb_work_buf];
55b0eeea 65 memregl[0x4058>>2] |= 0x10;
0b6c6da8 66 memregl[0x4458>>2] |= 0x10;
55b0eeea 67 fb_work_buf ^= 1;
68 return fb_vaddrs[fb_work_buf];
69}
70
71static void pollux_changemode(int bpp, int is_bgr)
72{
73 int code = 0, bytes = 2;
74 unsigned int r;
75
76 printf("changemode: %dbpp %s\n", bpp, is_bgr ? "bgr" : "rgb");
77
78 memregl[0x4004>>2] = 0x00ef013f;
79 memregl[0x4000>>2] |= 1 << 3;
80
81 switch (bpp)
82 {
83 case 8:
84 code = 0x443a;
85 bytes = 1;
86 break;
87 case 16:
88 code = is_bgr ? 0xc342 : 0x4432;
89 bytes = 2;
90 break;
91 case 24:
92 code = is_bgr ? 0xc653 : 0x4653;
93 bytes = 3;
94 break;
95 default:
96 printf("unhandled bpp request: %d\n", bpp);
97 return;
98 }
99
0b6c6da8 100 // program both MLCs so that TV-out works
101 memregl[0x405c>>2] = memregl[0x445c>>2] = bytes;
102 memregl[0x4060>>2] = memregl[0x4460>>2] = 320 * bytes;
55b0eeea 103
104 r = memregl[0x4058>>2];
105 r = (r & 0xffff) | (code << 16) | 0x10;
106 memregl[0x4058>>2] = r;
0b6c6da8 107
108 r = memregl[0x4458>>2];
109 r = (r & 0xffff) | (code << 16) | 0x10;
110 memregl[0x4458>>2] = r;
55b0eeea 111}
112
113/* note: both PLLs are programmed the same way,
114 * the databook incorrectly states that PLL1 differs */
115static int decode_pll(unsigned int reg)
116{
117 long long v;
118 int p, m, s;
119
120 p = (reg >> 18) & 0x3f;
121 m = (reg >> 8) & 0x3ff;
122 s = reg & 0xff;
123
124 if (p == 0)
125 p = 1;
126
127 v = 27000000; // master clock
128 v = v * m / (p << s);
129 return v;
130}
131
132int plat_cpu_clock_get(void)
133{
134 return decode_pll(memregl[0xf004>>2]) / 1000000;
135}
136
137int plat_cpu_clock_apply(int mhz)
138{
139 int adiv, mdiv, pdiv, sdiv = 0;
140 int i, vf000, vf004;
141
142 if (!cpu_clock_allowed)
143 return -1;
144 if (mhz == plat_cpu_clock_get())
145 return 0;
146
147 // m = MDIV, p = PDIV, s = SDIV
148 #define SYS_CLK_FREQ 27
149 pdiv = 9;
150 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
151 if (mdiv & ~0x3ff)
152 return -1;
153 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
154
155 // attempt to keep the AHB divider close to 250, but not higher
156 for (adiv = 1; mhz / adiv > 250; adiv++)
157 ;
158
159 vf000 = memregl[0xf000>>2];
160 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
161 memregl[0xf000>>2] = vf000;
162 memregl[0xf004>>2] = vf004;
163 memregl[0xf07c>>2] |= 0x8000;
164 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
165 ;
166
167 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
168
169 // stupid pll share hack - must restart audio
170 extern long SPUopen(void);
171 extern long SPUclose(void);
172 SPUclose();
173 SPUopen();
174
175 return 0;
176}
177
178int plat_get_bat_capacity(void)
179{
180 unsigned short magic_val = 0;
181
182 if (battdev < 0)
183 return -1;
184 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
185 return -1;
186 switch (magic_val) {
187 default:
188 case 1: return 100;
189 case 2: return 66;
190 case 3: return 40;
191 case 4: return 0;
192 }
193}
194
195#define TIMER_BASE3 0x1980
196#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
197
198static __attribute__((unused)) unsigned int timer_get(void)
199{
200 TIMER_REG(0x08) |= 0x48; /* run timer, latch value */
201 return TIMER_REG(0);
202}
203
204static void timer_cleanup(void)
205{
206 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
207 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
208 TIMER_REG(0x00) = 0; /* clear counter */
209 TIMER_REG(0x40) = 0; /* clocks off */
210 TIMER_REG(0x44) = 0; /* dividers back to default */
211}
212
213void plat_video_menu_enter(int is_rom_loaded)
214{
215 if (pl_vout_buf != NULL) {
216 if (psx_bpp == 16)
217 // have to do rgb conversion for menu bg
218 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
219 else
220 memset(pl_vout_buf, 0, 320*240*2);
221 }
222
223 pollux_changemode(16, 0);
224}
225
226void plat_video_menu_begin(void)
227{
228}
229
230void plat_video_menu_end(void)
231{
232 g_menuscreen_ptr = fb_flip();
233}
234
235void plat_video_menu_leave(void)
236{
55b0eeea 237 if (psx_vram == NULL) {
238 fprintf(stderr, "GPU plugin did not provide vram\n");
239 exit(1);
240 }
241
221be40d 242 if (gp2x_dev_id == GP2X_DEV_CAANOO)
243 in_set_config_int(in_name_to_id("evdev:pollux-analog"),
55b0eeea 244 IN_CFG_ABS_DEAD_ZONE, analog_deadzone);
41f55c9f 245
246 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
247 g_menuscreen_ptr = fb_flip();
248 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
249
250 pollux_changemode(psx_bpp, 1);
55b0eeea 251}
252
47821672 253void *plat_prepare_screenshot(int *w, int *h, int *bpp)
254{
255 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
256 *w = 320;
257 *h = 240;
258 *bpp = psx_bpp;
259 return pl_vout_buf;
260}
261
55b0eeea 262static void pl_vout_set_raw_vram(void *vram)
263{
264 int i;
265
266 psx_vram = vram;
267
268 if (vram == NULL)
269 return;
270
271 if ((long)psx_vram & 0x7ff)
272 fprintf(stderr, "GPU plugin did not align vram\n");
273
274 for (i = 0; i < 512; i++) {
275 psx_vram[i * 1024] = 0; // touch
276 psx_vram_padds[i] = warm_virt2phys(&psx_vram[i * 1024]);
277 }
278}
279
55b0eeea 280static void spend_cycles(int loops)
281{
282 asm volatile (
283 " mov r0,%0 ;\n"
284 "0: subs r0,r0,#1 ;\n"
285 " bgt 0b"
286 :: "r" (loops) : "cc", "r0");
287}
288
289#define DMA_BASE6 0x0300
290#define DMA_REG(x) memregl[(DMA_BASE6 + x) >> 2]
291
292/* this takes ~1.5ms, while ldm/stm ~1.95ms */
293static void raw_flip_dma(int x, int y)
294{
41f55c9f 295 unsigned int dst = fb_paddrs[fb_work_buf] +
296 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;
02ee7e24 297 int spsx_line = y + psx_offset_y;
298 int spsx_offset = (x + psx_offset_x) & 0x3f8;
55b0eeea 299 int dst_stride = 320 * psx_bpp / 8;
300 int len = psx_width * psx_bpp / 8;
55b0eeea 301 int i;
302
303 warm_cache_op_all(WOP_D_CLEAN);
d3f3bf09 304 pcnt_start(PCNT_BLIT);
55b0eeea 305
306 dst &= ~7;
307 len &= ~7;
308
309 if (DMA_REG(0x0c) & 0x90000) {
310 printf("already runnig DMA?\n");
311 DMA_REG(0x0c) = 0x100000;
312 }
313 if ((DMA_REG(0x2c) & 0x0f) < 5) {
314 printf("DMA queue busy?\n");
315 DMA_REG(0x24) = 1;
316 }
317
318 for (i = psx_height; i > 0; i--, spsx_line += psx_step, dst += dst_stride) {
319 while ((DMA_REG(0x2c) & 0x0f) < 4)
320 spend_cycles(10);
321
322 // XXX: it seems we must always set all regs, what is autoincrement there for?
323 DMA_REG(0x20) = 1; // queue wait cmd
324 DMA_REG(0x10) = psx_vram_padds[spsx_line & 511] + spsx_offset * 2; // DMA src
325 DMA_REG(0x14) = dst; // DMA dst
326 DMA_REG(0x18) = len - 1; // len
327 DMA_REG(0x1c) = 0x80000; // go
328 }
329
55b0eeea 330 if (psx_bpp == 16) {
331 pl_vout_buf = g_menuscreen_ptr;
41f55c9f 332 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x);
55b0eeea 333 }
334
335 g_menuscreen_ptr = fb_flip();
336 pl_flip_cnt++;
d3f3bf09 337
338 pcnt_end(PCNT_BLIT);
55b0eeea 339}
340
02ee7e24 341#define make_flip_func(name, blitfunc) \
342static void name(int x, int y) \
343{ \
344 unsigned short *vram = psx_vram; \
345 unsigned char *dst = (unsigned char *)g_menuscreen_ptr + \
346 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8; \
347 unsigned int src = (y + psx_offset_y) * 1024 + x + psx_offset_x; \
348 int dst_stride = 320 * psx_bpp / 8; \
349 int len = psx_width * psx_bpp / 8; \
350 int i; \
351 \
352 pcnt_start(PCNT_BLIT); \
353 \
354 for (i = psx_height; i > 0; i--, src += psx_step * 1024, dst += dst_stride) { \
355 src &= 1024*512-1; \
356 blitfunc(dst, vram + src, len); \
357 } \
358 \
359 if (psx_bpp == 16) { \
360 pl_vout_buf = g_menuscreen_ptr; \
361 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x); \
362 } \
363 \
364 g_menuscreen_ptr = fb_flip(); \
365 pl_flip_cnt++; \
366 \
367 pcnt_end(PCNT_BLIT); \
368}
369
370make_flip_func(raw_flip_soft, memcpy)
371make_flip_func(raw_flip_soft_368, blit320_368)
372make_flip_func(raw_flip_soft_512, blit320_512)
373make_flip_func(raw_flip_soft_640, blit320_640)
374
375static void *pl_vout_set_mode(int w, int h, int bpp)
55b0eeea 376{
02ee7e24 377 static int old_w, old_h, old_bpp;
378 int poff_w, poff_h, w_max;
55b0eeea 379
02ee7e24 380 if (!w || !h || !bpp || (w == old_w && h == old_h && bpp == old_bpp))
381 return NULL;
55b0eeea 382
02ee7e24 383 printf("psx mode: %dx%d@%d\n", w, h, bpp);
55b0eeea 384
02ee7e24 385 switch (w + (bpp != 16)) {
386 case 640:
387 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_640;
388 w_max = 640;
389 break;
390 case 512:
391 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_512;
392 w_max = 512;
393 break;
394 case 384:
395 case 368:
396 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_368;
397 w_max = 368;
398 break;
399 default:
400 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
401 w_max = 320;
402 break;
55b0eeea 403 }
404
02ee7e24 405 psx_step = 1;
406 if (h > 256) {
407 psx_step = 2;
408 h /= 2;
409 }
410
411 poff_w = poff_h = 0;
412 if (w > w_max) {
413 poff_w = w / 2 - w_max / 2;
414 w = w_max;
415 }
416 fb_offset_x = 0;
417 if (w < 320)
418 fb_offset_x = 320/2 - w / 2;
419 if (h > 240) {
420 poff_h = h / 2 - 240/2;
421 h = 240;
422 }
423 fb_offset_y = 240/2 - h / 2;
424
425 psx_offset_x = poff_w;
426 psx_offset_y = poff_h;
427 psx_width = w;
428 psx_height = h;
429 psx_bpp = bpp;
430
431 if (fb_offset_x || fb_offset_y) {
432 // not fullscreen, must clear borders
433 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
434 g_menuscreen_ptr = fb_flip();
435 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
436 }
437
438 pollux_changemode(bpp, 1);
439
221be40d 440 pl_set_gun_rect(fb_offset_x, fb_offset_y, w > 320 ? 320 : w, h);
441
02ee7e24 442 return NULL;
55b0eeea 443}
444
41f55c9f 445static void *pl_vout_flip(void)
446{
447 return NULL;
448}
449
0b6c6da8 450static void save_multiple_regs(unsigned int *dest, int base, int count)
451{
452 const volatile unsigned int *regs = memregl + base / 4;
453 int i;
454
455 for (i = 0; i < count; i++)
456 dest[i] = regs[i];
457}
458
459static void restore_multiple_regs(int base, const unsigned int *src, int count)
460{
461 volatile unsigned int *regs = memregl + base / 4;
462 int i;
463
464 for (i = 0; i < count; i++)
465 regs[i] = src[i];
466}
467
55b0eeea 468void plat_init(void)
469{
470 const char *main_fb_name = "/dev/fb0";
471 struct fb_fix_screeninfo fbfix;
472 int rate, timer_div, timer_div2;
473 int fbdev, ret, warm_ret;
221be40d 474 FILE *f;
55b0eeea 475
476 memdev = open("/dev/mem", O_RDWR);
477 if (memdev == -1) {
478 perror("open(/dev/mem) failed");
479 exit(1);
480 }
481
482 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
483 if (memregs == MAP_FAILED) {
484 perror("mmap(memregs) failed");
485 exit(1);
486 }
487 memregl = (volatile void *)memregs;
488
0b6c6da8 489 // save video regs of both MLCs
490 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
491 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
492
55b0eeea 493 fbdev = open(main_fb_name, O_RDWR);
494 if (fbdev == -1) {
495 fprintf(stderr, "%s: ", main_fb_name);
496 perror("open");
497 exit(1);
498 }
499
500 ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
501 if (ret == -1) {
502 perror("ioctl(fbdev) failed");
503 exit(1);
504 }
505 printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
506 fb_paddrs[0] = fbfix.smem_start;
507 fb_paddrs[1] = fb_paddrs[0] + 320*240*4; // leave space for 24bpp
508
0b6c6da8 509 fb_vaddrs[0] = mmap(0, FB_VRAM_SIZE, PROT_READ|PROT_WRITE,
55b0eeea 510 MAP_SHARED, memdev, fb_paddrs[0]);
511 if (fb_vaddrs[0] == MAP_FAILED) {
512 perror("mmap(fb_vaddrs) failed");
513 exit(1);
514 }
515 fb_vaddrs[1] = (char *)fb_vaddrs[0] + 320*240*4;
516
517 pollux_changemode(16, 0);
518 g_menuscreen_w = 320;
519 g_menuscreen_h = 240;
520 g_menuscreen_ptr = fb_flip();
521
522 g_menubg_ptr = calloc(320*240*2, 1);
523 if (g_menubg_ptr == NULL) {
524 fprintf(stderr, "OOM\n");
525 exit(1);
526 }
527
528 warm_ret = warm_init();
02ee7e24 529 have_warm = warm_ret == 0;
55b0eeea 530 warm_change_cb_upper(WCB_B_BIT, 1);
531
532 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
533 * by reprogramming the PLL0 then, as it overclocks system bus */
534 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
535 cpu_clock_allowed = 1;
536 else {
537 cpu_clock_allowed = 0;
538 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
539 memregl[0xf000>>2]);
540 }
541
542 /* find what PLL1 runs at, for the timer */
543 rate = decode_pll(memregl[0xf008>>2]);
544 printf("PLL1 @ %dHz\n", rate);
545
546 /* setup timer */
547 timer_div = (rate + 500000) / 1000000;
548 timer_div2 = 0;
549 while (timer_div > 256) {
550 timer_div /= 2;
551 timer_div2++;
552 }
553 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
554 int timer_rate = (rate >> timer_div2) / timer_div;
555 if (TIMER_REG(0x08) & 8) {
556 fprintf(stderr, "warning: timer in use, overriding!\n");
557 timer_cleanup();
558 }
559 if (timer_rate != 1000000)
560 fprintf(stderr, "warning: timer drift %d us\n", timer_rate - 1000000);
561
562 timer_div2 = (timer_div2 + 3) & 3;
563 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
564 TIMER_REG(0x40) = 0x0c; /* clocks on */
565 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
566 }
567 else
568 fprintf(stderr, "warning: could not make use of timer\n");
569
570 /* setup DMA */
571 DMA_REG(0x0c) = 0x20000; // pending IRQ clear
572
573 battdev = open("/dev/pollux_batt", O_RDONLY);
574 if (battdev < 0)
575 perror("Warning: could't open pollux_batt");
576
221be40d 577 f = fopen("/dev/accel", "rb");
578 if (f) {
579 printf("detected Caanoo\n");
580 gp2x_dev_id = GP2X_DEV_CAANOO;
581 fclose(f);
582 }
583 else {
584 printf("detected Wiz\n");
585 gp2x_dev_id = GP2X_DEV_WIZ;
586 in_gp2x_init();
587 }
588
589 mixerdev = open("/dev/mixer", O_RDWR);
590 if (mixerdev == -1)
591 perror("open(/dev/mixer)");
592
41f55c9f 593 pl_rearmed_cbs.pl_vout_flip = pl_vout_flip;
02ee7e24 594 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
55b0eeea 595 pl_rearmed_cbs.pl_vout_set_mode = pl_vout_set_mode;
596 pl_rearmed_cbs.pl_vout_set_raw_vram = pl_vout_set_raw_vram;
597
598 psx_width = 320;
599 psx_height = 240;
600 psx_bpp = 16;
faf2b2aa 601
602 in_tsbutton_init();
55b0eeea 603}
604
605void plat_finish(void)
606{
607 warm_finish();
608 timer_cleanup();
0b6c6da8 609
610 memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
611 restore_multiple_regs(0x4058, saved_video_regs[0], ARRAY_SIZE(saved_video_regs[0]));
612 restore_multiple_regs(0x4458, saved_video_regs[1], ARRAY_SIZE(saved_video_regs[1]));
613 memregl[0x4058>>2] |= 0x10;
614 memregl[0x4458>>2] |= 0x10;
615 munmap(fb_vaddrs[0], FB_VRAM_SIZE);
616 close(fbdev);
55b0eeea 617
618 if (battdev >= 0)
619 close(battdev);
221be40d 620 if (mixerdev >= 0)
621 close(mixerdev);
55b0eeea 622 munmap((void *)memregs, 0x20000);
623 close(memdev);
624}
625
626void in_update_analogs(void)
627{
628}
629
630/* Caanoo stuff, perhaps move later */
631#include <linux/input.h>
632
633struct in_default_bind in_evdev_defbinds[] = {
634 { KEY_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
635 { KEY_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
636 { KEY_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
637 { KEY_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
638 { BTN_TOP, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
639 { BTN_THUMB, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
640 { BTN_THUMB2, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
641 { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
642 { BTN_BASE3, IN_BINDTYPE_PLAYER12, DKEY_START },
643 { BTN_BASE4, IN_BINDTYPE_PLAYER12, DKEY_SELECT },
644 { BTN_TOP2, IN_BINDTYPE_PLAYER12, DKEY_L1 },
645 { BTN_PINKIE, IN_BINDTYPE_PLAYER12, DKEY_R1 },
646 { BTN_BASE, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
647 { 0, 0, 0 },
648};
649
650static const char * const caanoo_keys[KEY_MAX + 1] = {
651 [0 ... KEY_MAX] = NULL,
652 [KEY_UP] = "Up",
653 [KEY_LEFT] = "Left",
654 [KEY_RIGHT] = "Right",
655 [KEY_DOWN] = "Down",
656 [BTN_TRIGGER] = "A",
657 [BTN_THUMB] = "X",
658 [BTN_THUMB2] = "B",
659 [BTN_TOP] = "Y",
660 [BTN_TOP2] = "L",
661 [BTN_PINKIE] = "R",
662 [BTN_BASE] = "Home",
663 [BTN_BASE2] = "Lock",
664 [BTN_BASE3] = "I",
665 [BTN_BASE4] = "II",
666 [BTN_BASE5] = "Push",
667};
668
221be40d 669/* Wiz stuff */
670struct in_default_bind in_gp2x_defbinds[] =
671{
672 /* MXYZ SACB RLDU */
673 { GP2X_BTN_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
674 { GP2X_BTN_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
675 { GP2X_BTN_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
676 { GP2X_BTN_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
677 { GP2X_BTN_X, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
678 { GP2X_BTN_B, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
679 { GP2X_BTN_A, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
680 { GP2X_BTN_Y, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
681 { GP2X_BTN_L, IN_BINDTYPE_PLAYER12, DKEY_L1 },
682 { GP2X_BTN_R, IN_BINDTYPE_PLAYER12, DKEY_R1 },
683 { GP2X_BTN_START, IN_BINDTYPE_PLAYER12, DKEY_START },
684 { GP2X_BTN_SELECT, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
685 { GP2X_BTN_VOL_UP, IN_BINDTYPE_EMU, SACTION_VOLUME_UP },
686 { GP2X_BTN_VOL_DOWN, IN_BINDTYPE_EMU, SACTION_VOLUME_DOWN },
687 { 0, 0, 0 },
688};
689
690void plat_step_volume(int is_up)
691{
692 static int volume = 50;
693 int ret, val;
694
695 if (mixerdev < 0)
696 return;
697
698 if (is_up) {
699 volume += 5;
700 if (volume > 255) volume = 255;
701 }
702 else {
703 volume -= 5;
704 if (volume < 0) volume = 0;
705 }
706 val = volume;
707 val |= val << 8;
708
709 ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
710 if (ret == -1)
711 perror("WRITE_PCM");
712}
713
714// unused dummy for in_gp2x
715volatile unsigned short *gp2x_memregs;
716
55b0eeea 717int plat_rescan_inputs(void)
718{
719 in_probe();
221be40d 720 if (gp2x_dev_id == GP2X_DEV_CAANOO)
721 in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
722 caanoo_keys, sizeof(caanoo_keys));
723
55b0eeea 724 return 0;
725}