frontend: input: make in_ts use ts_gun
[pcsx_rearmed.git] / frontend / plat_pollux.c
CommitLineData
55b0eeea 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2011
3 *
4 * This work is licensed under the terms of the GNU GPLv2 or later.
5 * See the COPYING file in the top-level directory.
6 */
7
8#include <stdio.h>
9#include <stdlib.h>
10#include <string.h>
11#include <sys/types.h>
12#include <sys/stat.h>
13#include <fcntl.h>
14#include <sys/ioctl.h>
15#include <unistd.h>
16#include <linux/fb.h>
17#include <sys/mman.h>
18
19#include "common/input.h"
20#include "common/menu.h"
21#include "warm/warm.h"
22#include "plugin_lib.h"
23#include "cspace.h"
02ee7e24 24#include "blit320.h"
faf2b2aa 25#include "in_tsbutton.h"
55b0eeea 26#include "main.h"
27#include "menu.h"
28#include "plat.h"
d3f3bf09 29#include "pcnt.h"
55b0eeea 30
31static int fbdev = -1, memdev = -1, battdev = -1;
32static volatile unsigned short *memregs;
33static volatile unsigned int *memregl;
34static void *fb_vaddrs[2];
35static unsigned int fb_paddrs[2];
36static int fb_work_buf;
02ee7e24 37static int cpu_clock_allowed, have_warm;
0b6c6da8 38static unsigned int saved_video_regs[2][6];
39#define FB_VRAM_SIZE (320*240*2*2*2) // 2 buffers with space for 24bpp mode
55b0eeea 40
41static unsigned short *psx_vram;
42static unsigned int psx_vram_padds[512];
02ee7e24 43static int psx_step, psx_width, psx_height, psx_bpp;
44static int psx_offset_x, psx_offset_y;
41f55c9f 45static int fb_offset_x, fb_offset_y;
55b0eeea 46
47// TODO: get rid of this
48struct vout_fbdev;
49struct vout_fbdev *layer_fb;
50int g_layer_x, g_layer_y, g_layer_w, g_layer_h;
51
52int omap_enable_layer(int enabled)
53{
54 return 0;
55}
56
57static void *fb_flip(void)
58{
0b6c6da8 59 memregl[0x406C>>2] = memregl[0x446C>>2] = fb_paddrs[fb_work_buf];
55b0eeea 60 memregl[0x4058>>2] |= 0x10;
0b6c6da8 61 memregl[0x4458>>2] |= 0x10;
55b0eeea 62 fb_work_buf ^= 1;
63 return fb_vaddrs[fb_work_buf];
64}
65
66static void pollux_changemode(int bpp, int is_bgr)
67{
68 int code = 0, bytes = 2;
69 unsigned int r;
70
71 printf("changemode: %dbpp %s\n", bpp, is_bgr ? "bgr" : "rgb");
72
73 memregl[0x4004>>2] = 0x00ef013f;
74 memregl[0x4000>>2] |= 1 << 3;
75
76 switch (bpp)
77 {
78 case 8:
79 code = 0x443a;
80 bytes = 1;
81 break;
82 case 16:
83 code = is_bgr ? 0xc342 : 0x4432;
84 bytes = 2;
85 break;
86 case 24:
87 code = is_bgr ? 0xc653 : 0x4653;
88 bytes = 3;
89 break;
90 default:
91 printf("unhandled bpp request: %d\n", bpp);
92 return;
93 }
94
0b6c6da8 95 // program both MLCs so that TV-out works
96 memregl[0x405c>>2] = memregl[0x445c>>2] = bytes;
97 memregl[0x4060>>2] = memregl[0x4460>>2] = 320 * bytes;
55b0eeea 98
99 r = memregl[0x4058>>2];
100 r = (r & 0xffff) | (code << 16) | 0x10;
101 memregl[0x4058>>2] = r;
0b6c6da8 102
103 r = memregl[0x4458>>2];
104 r = (r & 0xffff) | (code << 16) | 0x10;
105 memregl[0x4458>>2] = r;
55b0eeea 106}
107
108/* note: both PLLs are programmed the same way,
109 * the databook incorrectly states that PLL1 differs */
110static int decode_pll(unsigned int reg)
111{
112 long long v;
113 int p, m, s;
114
115 p = (reg >> 18) & 0x3f;
116 m = (reg >> 8) & 0x3ff;
117 s = reg & 0xff;
118
119 if (p == 0)
120 p = 1;
121
122 v = 27000000; // master clock
123 v = v * m / (p << s);
124 return v;
125}
126
127int plat_cpu_clock_get(void)
128{
129 return decode_pll(memregl[0xf004>>2]) / 1000000;
130}
131
132int plat_cpu_clock_apply(int mhz)
133{
134 int adiv, mdiv, pdiv, sdiv = 0;
135 int i, vf000, vf004;
136
137 if (!cpu_clock_allowed)
138 return -1;
139 if (mhz == plat_cpu_clock_get())
140 return 0;
141
142 // m = MDIV, p = PDIV, s = SDIV
143 #define SYS_CLK_FREQ 27
144 pdiv = 9;
145 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
146 if (mdiv & ~0x3ff)
147 return -1;
148 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
149
150 // attempt to keep the AHB divider close to 250, but not higher
151 for (adiv = 1; mhz / adiv > 250; adiv++)
152 ;
153
154 vf000 = memregl[0xf000>>2];
155 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
156 memregl[0xf000>>2] = vf000;
157 memregl[0xf004>>2] = vf004;
158 memregl[0xf07c>>2] |= 0x8000;
159 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
160 ;
161
162 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
163
164 // stupid pll share hack - must restart audio
165 extern long SPUopen(void);
166 extern long SPUclose(void);
167 SPUclose();
168 SPUopen();
169
170 return 0;
171}
172
173int plat_get_bat_capacity(void)
174{
175 unsigned short magic_val = 0;
176
177 if (battdev < 0)
178 return -1;
179 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
180 return -1;
181 switch (magic_val) {
182 default:
183 case 1: return 100;
184 case 2: return 66;
185 case 3: return 40;
186 case 4: return 0;
187 }
188}
189
190#define TIMER_BASE3 0x1980
191#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
192
193static __attribute__((unused)) unsigned int timer_get(void)
194{
195 TIMER_REG(0x08) |= 0x48; /* run timer, latch value */
196 return TIMER_REG(0);
197}
198
199static void timer_cleanup(void)
200{
201 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
202 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
203 TIMER_REG(0x00) = 0; /* clear counter */
204 TIMER_REG(0x40) = 0; /* clocks off */
205 TIMER_REG(0x44) = 0; /* dividers back to default */
206}
207
208void plat_video_menu_enter(int is_rom_loaded)
209{
210 if (pl_vout_buf != NULL) {
211 if (psx_bpp == 16)
212 // have to do rgb conversion for menu bg
213 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
214 else
215 memset(pl_vout_buf, 0, 320*240*2);
216 }
217
218 pollux_changemode(16, 0);
219}
220
221void plat_video_menu_begin(void)
222{
223}
224
225void plat_video_menu_end(void)
226{
227 g_menuscreen_ptr = fb_flip();
228}
229
230void plat_video_menu_leave(void)
231{
55b0eeea 232 if (psx_vram == NULL) {
233 fprintf(stderr, "GPU plugin did not provide vram\n");
234 exit(1);
235 }
236
237 in_set_config_int(in_name_to_id("evdev:pollux-analog"),
238 IN_CFG_ABS_DEAD_ZONE, analog_deadzone);
41f55c9f 239
240 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
241 g_menuscreen_ptr = fb_flip();
242 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
243
244 pollux_changemode(psx_bpp, 1);
55b0eeea 245}
246
47821672 247void *plat_prepare_screenshot(int *w, int *h, int *bpp)
248{
249 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
250 *w = 320;
251 *h = 240;
252 *bpp = psx_bpp;
253 return pl_vout_buf;
254}
255
55b0eeea 256static void pl_vout_set_raw_vram(void *vram)
257{
258 int i;
259
260 psx_vram = vram;
261
262 if (vram == NULL)
263 return;
264
265 if ((long)psx_vram & 0x7ff)
266 fprintf(stderr, "GPU plugin did not align vram\n");
267
268 for (i = 0; i < 512; i++) {
269 psx_vram[i * 1024] = 0; // touch
270 psx_vram_padds[i] = warm_virt2phys(&psx_vram[i * 1024]);
271 }
272}
273
55b0eeea 274static void spend_cycles(int loops)
275{
276 asm volatile (
277 " mov r0,%0 ;\n"
278 "0: subs r0,r0,#1 ;\n"
279 " bgt 0b"
280 :: "r" (loops) : "cc", "r0");
281}
282
283#define DMA_BASE6 0x0300
284#define DMA_REG(x) memregl[(DMA_BASE6 + x) >> 2]
285
286/* this takes ~1.5ms, while ldm/stm ~1.95ms */
287static void raw_flip_dma(int x, int y)
288{
41f55c9f 289 unsigned int dst = fb_paddrs[fb_work_buf] +
290 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;
02ee7e24 291 int spsx_line = y + psx_offset_y;
292 int spsx_offset = (x + psx_offset_x) & 0x3f8;
55b0eeea 293 int dst_stride = 320 * psx_bpp / 8;
294 int len = psx_width * psx_bpp / 8;
55b0eeea 295 int i;
296
297 warm_cache_op_all(WOP_D_CLEAN);
d3f3bf09 298 pcnt_start(PCNT_BLIT);
55b0eeea 299
300 dst &= ~7;
301 len &= ~7;
302
303 if (DMA_REG(0x0c) & 0x90000) {
304 printf("already runnig DMA?\n");
305 DMA_REG(0x0c) = 0x100000;
306 }
307 if ((DMA_REG(0x2c) & 0x0f) < 5) {
308 printf("DMA queue busy?\n");
309 DMA_REG(0x24) = 1;
310 }
311
312 for (i = psx_height; i > 0; i--, spsx_line += psx_step, dst += dst_stride) {
313 while ((DMA_REG(0x2c) & 0x0f) < 4)
314 spend_cycles(10);
315
316 // XXX: it seems we must always set all regs, what is autoincrement there for?
317 DMA_REG(0x20) = 1; // queue wait cmd
318 DMA_REG(0x10) = psx_vram_padds[spsx_line & 511] + spsx_offset * 2; // DMA src
319 DMA_REG(0x14) = dst; // DMA dst
320 DMA_REG(0x18) = len - 1; // len
321 DMA_REG(0x1c) = 0x80000; // go
322 }
323
55b0eeea 324 if (psx_bpp == 16) {
325 pl_vout_buf = g_menuscreen_ptr;
41f55c9f 326 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x);
55b0eeea 327 }
328
329 g_menuscreen_ptr = fb_flip();
330 pl_flip_cnt++;
d3f3bf09 331
332 pcnt_end(PCNT_BLIT);
55b0eeea 333}
334
02ee7e24 335#define make_flip_func(name, blitfunc) \
336static void name(int x, int y) \
337{ \
338 unsigned short *vram = psx_vram; \
339 unsigned char *dst = (unsigned char *)g_menuscreen_ptr + \
340 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8; \
341 unsigned int src = (y + psx_offset_y) * 1024 + x + psx_offset_x; \
342 int dst_stride = 320 * psx_bpp / 8; \
343 int len = psx_width * psx_bpp / 8; \
344 int i; \
345 \
346 pcnt_start(PCNT_BLIT); \
347 \
348 for (i = psx_height; i > 0; i--, src += psx_step * 1024, dst += dst_stride) { \
349 src &= 1024*512-1; \
350 blitfunc(dst, vram + src, len); \
351 } \
352 \
353 if (psx_bpp == 16) { \
354 pl_vout_buf = g_menuscreen_ptr; \
355 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x); \
356 } \
357 \
358 g_menuscreen_ptr = fb_flip(); \
359 pl_flip_cnt++; \
360 \
361 pcnt_end(PCNT_BLIT); \
362}
363
364make_flip_func(raw_flip_soft, memcpy)
365make_flip_func(raw_flip_soft_368, blit320_368)
366make_flip_func(raw_flip_soft_512, blit320_512)
367make_flip_func(raw_flip_soft_640, blit320_640)
368
369static void *pl_vout_set_mode(int w, int h, int bpp)
55b0eeea 370{
02ee7e24 371 static int old_w, old_h, old_bpp;
372 int poff_w, poff_h, w_max;
55b0eeea 373
02ee7e24 374 if (!w || !h || !bpp || (w == old_w && h == old_h && bpp == old_bpp))
375 return NULL;
55b0eeea 376
02ee7e24 377 printf("psx mode: %dx%d@%d\n", w, h, bpp);
55b0eeea 378
02ee7e24 379 switch (w + (bpp != 16)) {
380 case 640:
381 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_640;
382 w_max = 640;
383 break;
384 case 512:
385 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_512;
386 w_max = 512;
387 break;
388 case 384:
389 case 368:
390 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_368;
391 w_max = 368;
392 break;
393 default:
394 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
395 w_max = 320;
396 break;
55b0eeea 397 }
398
02ee7e24 399 psx_step = 1;
400 if (h > 256) {
401 psx_step = 2;
402 h /= 2;
403 }
404
405 poff_w = poff_h = 0;
406 if (w > w_max) {
407 poff_w = w / 2 - w_max / 2;
408 w = w_max;
409 }
410 fb_offset_x = 0;
411 if (w < 320)
412 fb_offset_x = 320/2 - w / 2;
413 if (h > 240) {
414 poff_h = h / 2 - 240/2;
415 h = 240;
416 }
417 fb_offset_y = 240/2 - h / 2;
418
419 psx_offset_x = poff_w;
420 psx_offset_y = poff_h;
421 psx_width = w;
422 psx_height = h;
423 psx_bpp = bpp;
424
425 if (fb_offset_x || fb_offset_y) {
426 // not fullscreen, must clear borders
427 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
428 g_menuscreen_ptr = fb_flip();
429 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
430 }
431
432 pollux_changemode(bpp, 1);
433
434 return NULL;
55b0eeea 435}
436
41f55c9f 437static void *pl_vout_flip(void)
438{
439 return NULL;
440}
441
0b6c6da8 442static void save_multiple_regs(unsigned int *dest, int base, int count)
443{
444 const volatile unsigned int *regs = memregl + base / 4;
445 int i;
446
447 for (i = 0; i < count; i++)
448 dest[i] = regs[i];
449}
450
451static void restore_multiple_regs(int base, const unsigned int *src, int count)
452{
453 volatile unsigned int *regs = memregl + base / 4;
454 int i;
455
456 for (i = 0; i < count; i++)
457 regs[i] = src[i];
458}
459
55b0eeea 460void plat_init(void)
461{
462 const char *main_fb_name = "/dev/fb0";
463 struct fb_fix_screeninfo fbfix;
464 int rate, timer_div, timer_div2;
465 int fbdev, ret, warm_ret;
466
467 memdev = open("/dev/mem", O_RDWR);
468 if (memdev == -1) {
469 perror("open(/dev/mem) failed");
470 exit(1);
471 }
472
473 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
474 if (memregs == MAP_FAILED) {
475 perror("mmap(memregs) failed");
476 exit(1);
477 }
478 memregl = (volatile void *)memregs;
479
0b6c6da8 480 // save video regs of both MLCs
481 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
482 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
483
55b0eeea 484 fbdev = open(main_fb_name, O_RDWR);
485 if (fbdev == -1) {
486 fprintf(stderr, "%s: ", main_fb_name);
487 perror("open");
488 exit(1);
489 }
490
491 ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
492 if (ret == -1) {
493 perror("ioctl(fbdev) failed");
494 exit(1);
495 }
496 printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
497 fb_paddrs[0] = fbfix.smem_start;
498 fb_paddrs[1] = fb_paddrs[0] + 320*240*4; // leave space for 24bpp
499
0b6c6da8 500 fb_vaddrs[0] = mmap(0, FB_VRAM_SIZE, PROT_READ|PROT_WRITE,
55b0eeea 501 MAP_SHARED, memdev, fb_paddrs[0]);
502 if (fb_vaddrs[0] == MAP_FAILED) {
503 perror("mmap(fb_vaddrs) failed");
504 exit(1);
505 }
506 fb_vaddrs[1] = (char *)fb_vaddrs[0] + 320*240*4;
507
508 pollux_changemode(16, 0);
509 g_menuscreen_w = 320;
510 g_menuscreen_h = 240;
511 g_menuscreen_ptr = fb_flip();
512
513 g_menubg_ptr = calloc(320*240*2, 1);
514 if (g_menubg_ptr == NULL) {
515 fprintf(stderr, "OOM\n");
516 exit(1);
517 }
518
519 warm_ret = warm_init();
02ee7e24 520 have_warm = warm_ret == 0;
55b0eeea 521 warm_change_cb_upper(WCB_B_BIT, 1);
522
523 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
524 * by reprogramming the PLL0 then, as it overclocks system bus */
525 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
526 cpu_clock_allowed = 1;
527 else {
528 cpu_clock_allowed = 0;
529 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
530 memregl[0xf000>>2]);
531 }
532
533 /* find what PLL1 runs at, for the timer */
534 rate = decode_pll(memregl[0xf008>>2]);
535 printf("PLL1 @ %dHz\n", rate);
536
537 /* setup timer */
538 timer_div = (rate + 500000) / 1000000;
539 timer_div2 = 0;
540 while (timer_div > 256) {
541 timer_div /= 2;
542 timer_div2++;
543 }
544 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
545 int timer_rate = (rate >> timer_div2) / timer_div;
546 if (TIMER_REG(0x08) & 8) {
547 fprintf(stderr, "warning: timer in use, overriding!\n");
548 timer_cleanup();
549 }
550 if (timer_rate != 1000000)
551 fprintf(stderr, "warning: timer drift %d us\n", timer_rate - 1000000);
552
553 timer_div2 = (timer_div2 + 3) & 3;
554 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
555 TIMER_REG(0x40) = 0x0c; /* clocks on */
556 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
557 }
558 else
559 fprintf(stderr, "warning: could not make use of timer\n");
560
561 /* setup DMA */
562 DMA_REG(0x0c) = 0x20000; // pending IRQ clear
563
564 battdev = open("/dev/pollux_batt", O_RDONLY);
565 if (battdev < 0)
566 perror("Warning: could't open pollux_batt");
567
41f55c9f 568 pl_rearmed_cbs.pl_vout_flip = pl_vout_flip;
02ee7e24 569 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
55b0eeea 570 pl_rearmed_cbs.pl_vout_set_mode = pl_vout_set_mode;
571 pl_rearmed_cbs.pl_vout_set_raw_vram = pl_vout_set_raw_vram;
572
573 psx_width = 320;
574 psx_height = 240;
575 psx_bpp = 16;
faf2b2aa 576
577 in_tsbutton_init();
55b0eeea 578}
579
580void plat_finish(void)
581{
582 warm_finish();
583 timer_cleanup();
0b6c6da8 584
585 memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
586 restore_multiple_regs(0x4058, saved_video_regs[0], ARRAY_SIZE(saved_video_regs[0]));
587 restore_multiple_regs(0x4458, saved_video_regs[1], ARRAY_SIZE(saved_video_regs[1]));
588 memregl[0x4058>>2] |= 0x10;
589 memregl[0x4458>>2] |= 0x10;
590 munmap(fb_vaddrs[0], FB_VRAM_SIZE);
591 close(fbdev);
55b0eeea 592
593 if (battdev >= 0)
594 close(battdev);
55b0eeea 595 munmap((void *)memregs, 0x20000);
596 close(memdev);
597}
598
599void in_update_analogs(void)
600{
601}
602
603/* Caanoo stuff, perhaps move later */
604#include <linux/input.h>
605
606struct in_default_bind in_evdev_defbinds[] = {
607 { KEY_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
608 { KEY_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
609 { KEY_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
610 { KEY_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
611 { BTN_TOP, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
612 { BTN_THUMB, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
613 { BTN_THUMB2, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
614 { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
615 { BTN_BASE3, IN_BINDTYPE_PLAYER12, DKEY_START },
616 { BTN_BASE4, IN_BINDTYPE_PLAYER12, DKEY_SELECT },
617 { BTN_TOP2, IN_BINDTYPE_PLAYER12, DKEY_L1 },
618 { BTN_PINKIE, IN_BINDTYPE_PLAYER12, DKEY_R1 },
619 { BTN_BASE, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
620 { 0, 0, 0 },
621};
622
623static const char * const caanoo_keys[KEY_MAX + 1] = {
624 [0 ... KEY_MAX] = NULL,
625 [KEY_UP] = "Up",
626 [KEY_LEFT] = "Left",
627 [KEY_RIGHT] = "Right",
628 [KEY_DOWN] = "Down",
629 [BTN_TRIGGER] = "A",
630 [BTN_THUMB] = "X",
631 [BTN_THUMB2] = "B",
632 [BTN_TOP] = "Y",
633 [BTN_TOP2] = "L",
634 [BTN_PINKIE] = "R",
635 [BTN_BASE] = "Home",
636 [BTN_BASE2] = "Lock",
637 [BTN_BASE3] = "I",
638 [BTN_BASE4] = "II",
639 [BTN_BASE5] = "Push",
640};
641
642int plat_rescan_inputs(void)
643{
644 in_probe();
645 in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
646 caanoo_keys, sizeof(caanoo_keys));
647 return 0;
648}