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psx_gpu: workaround overflow crash
[pcsx_rearmed.git] / frontend / plat_pollux.c
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55b0eeea 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2011
3 *
4 * This work is licensed under the terms of the GNU GPLv2 or later.
5 * See the COPYING file in the top-level directory.
6 */
7
8#include <stdio.h>
9#include <stdlib.h>
10#include <string.h>
11#include <sys/types.h>
12#include <sys/stat.h>
13#include <fcntl.h>
14#include <sys/ioctl.h>
15#include <unistd.h>
16#include <linux/fb.h>
17#include <sys/mman.h>
221be40d 18#include <linux/soundcard.h>
b07c18e8 19#include <linux/input.h>
55b0eeea 20
21#include "common/input.h"
221be40d 22#include "gp2x/in_gp2x.h"
b07c18e8 23#include "linux/in_evdev.h"
55b0eeea 24#include "common/menu.h"
25#include "warm/warm.h"
26#include "plugin_lib.h"
221be40d 27#include "pl_gun_ts.h"
02ee7e24 28#include "blit320.h"
faf2b2aa 29#include "in_tsbutton.h"
55b0eeea 30#include "main.h"
31#include "menu.h"
32#include "plat.h"
d3f3bf09 33#include "pcnt.h"
62d7fa95 34#include "../plugins/gpulib/cspace.h"
55b0eeea 35
221be40d 36int gp2x_dev_id;
37
38static int fbdev = -1, memdev = -1, battdev = -1, mixerdev = -1;
55b0eeea 39static volatile unsigned short *memregs;
40static volatile unsigned int *memregl;
41static void *fb_vaddrs[2];
42static unsigned int fb_paddrs[2];
43static int fb_work_buf;
02ee7e24 44static int cpu_clock_allowed, have_warm;
0b6c6da8 45static unsigned int saved_video_regs[2][6];
46#define FB_VRAM_SIZE (320*240*2*2*2) // 2 buffers with space for 24bpp mode
55b0eeea 47
48static unsigned short *psx_vram;
49static unsigned int psx_vram_padds[512];
02ee7e24 50static int psx_step, psx_width, psx_height, psx_bpp;
a72ac803 51static int psx_offset_x, psx_offset_y, psx_src_width, psx_src_height;
41f55c9f 52static int fb_offset_x, fb_offset_y;
55b0eeea 53
9b4bd105 54static void caanoo_init(void);
b07c18e8 55static void wiz_init(void);
56
9b4bd105 57
b07c18e8 58static const struct in_default_bind in_evdev_defbinds[] = {
59 { KEY_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
60 { KEY_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
61 { KEY_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
62 { KEY_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
63 { BTN_TOP, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
64 { BTN_THUMB, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
65 { BTN_THUMB2, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
66 { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
67 { BTN_BASE3, IN_BINDTYPE_PLAYER12, DKEY_START },
68 { BTN_BASE4, IN_BINDTYPE_PLAYER12, DKEY_SELECT },
69 { BTN_TOP2, IN_BINDTYPE_PLAYER12, DKEY_L1 },
70 { BTN_PINKIE, IN_BINDTYPE_PLAYER12, DKEY_R1 },
71 { BTN_BASE, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
72 { 0, 0, 0 },
73};
9b4bd105 74
55b0eeea 75static void *fb_flip(void)
76{
0b6c6da8 77 memregl[0x406C>>2] = memregl[0x446C>>2] = fb_paddrs[fb_work_buf];
55b0eeea 78 memregl[0x4058>>2] |= 0x10;
0b6c6da8 79 memregl[0x4458>>2] |= 0x10;
55b0eeea 80 fb_work_buf ^= 1;
81 return fb_vaddrs[fb_work_buf];
82}
83
84static void pollux_changemode(int bpp, int is_bgr)
85{
86 int code = 0, bytes = 2;
87 unsigned int r;
88
89 printf("changemode: %dbpp %s\n", bpp, is_bgr ? "bgr" : "rgb");
90
91 memregl[0x4004>>2] = 0x00ef013f;
92 memregl[0x4000>>2] |= 1 << 3;
93
94 switch (bpp)
95 {
96 case 8:
97 code = 0x443a;
98 bytes = 1;
99 break;
100 case 16:
101 code = is_bgr ? 0xc342 : 0x4432;
102 bytes = 2;
103 break;
104 case 24:
105 code = is_bgr ? 0xc653 : 0x4653;
106 bytes = 3;
107 break;
108 default:
109 printf("unhandled bpp request: %d\n", bpp);
110 return;
111 }
112
0b6c6da8 113 // program both MLCs so that TV-out works
114 memregl[0x405c>>2] = memregl[0x445c>>2] = bytes;
115 memregl[0x4060>>2] = memregl[0x4460>>2] = 320 * bytes;
55b0eeea 116
117 r = memregl[0x4058>>2];
118 r = (r & 0xffff) | (code << 16) | 0x10;
119 memregl[0x4058>>2] = r;
0b6c6da8 120
121 r = memregl[0x4458>>2];
122 r = (r & 0xffff) | (code << 16) | 0x10;
123 memregl[0x4458>>2] = r;
55b0eeea 124}
125
126/* note: both PLLs are programmed the same way,
127 * the databook incorrectly states that PLL1 differs */
128static int decode_pll(unsigned int reg)
129{
130 long long v;
131 int p, m, s;
132
133 p = (reg >> 18) & 0x3f;
134 m = (reg >> 8) & 0x3ff;
135 s = reg & 0xff;
136
137 if (p == 0)
138 p = 1;
139
140 v = 27000000; // master clock
141 v = v * m / (p << s);
142 return v;
143}
144
145int plat_cpu_clock_get(void)
146{
147 return decode_pll(memregl[0xf004>>2]) / 1000000;
148}
149
150int plat_cpu_clock_apply(int mhz)
151{
152 int adiv, mdiv, pdiv, sdiv = 0;
153 int i, vf000, vf004;
154
155 if (!cpu_clock_allowed)
156 return -1;
157 if (mhz == plat_cpu_clock_get())
158 return 0;
159
160 // m = MDIV, p = PDIV, s = SDIV
161 #define SYS_CLK_FREQ 27
162 pdiv = 9;
163 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
164 if (mdiv & ~0x3ff)
165 return -1;
166 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
167
168 // attempt to keep the AHB divider close to 250, but not higher
169 for (adiv = 1; mhz / adiv > 250; adiv++)
170 ;
171
172 vf000 = memregl[0xf000>>2];
173 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
174 memregl[0xf000>>2] = vf000;
175 memregl[0xf004>>2] = vf004;
176 memregl[0xf07c>>2] |= 0x8000;
177 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
178 ;
179
180 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
181
182 // stupid pll share hack - must restart audio
183 extern long SPUopen(void);
184 extern long SPUclose(void);
185 SPUclose();
186 SPUopen();
187
188 return 0;
189}
190
191int plat_get_bat_capacity(void)
192{
193 unsigned short magic_val = 0;
194
195 if (battdev < 0)
196 return -1;
197 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
198 return -1;
199 switch (magic_val) {
200 default:
201 case 1: return 100;
202 case 2: return 66;
203 case 3: return 40;
204 case 4: return 0;
205 }
206}
207
208#define TIMER_BASE3 0x1980
209#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
210
211static __attribute__((unused)) unsigned int timer_get(void)
212{
213 TIMER_REG(0x08) |= 0x48; /* run timer, latch value */
214 return TIMER_REG(0);
215}
216
217static void timer_cleanup(void)
218{
219 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
220 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
221 TIMER_REG(0x00) = 0; /* clear counter */
222 TIMER_REG(0x40) = 0; /* clocks off */
223 TIMER_REG(0x44) = 0; /* dividers back to default */
224}
225
226void plat_video_menu_enter(int is_rom_loaded)
227{
228 if (pl_vout_buf != NULL) {
229 if (psx_bpp == 16)
230 // have to do rgb conversion for menu bg
231 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
232 else
233 memset(pl_vout_buf, 0, 320*240*2);
234 }
235
236 pollux_changemode(16, 0);
237}
238
239void plat_video_menu_begin(void)
240{
241}
242
243void plat_video_menu_end(void)
244{
245 g_menuscreen_ptr = fb_flip();
246}
247
248void plat_video_menu_leave(void)
249{
55b0eeea 250 if (psx_vram == NULL) {
251 fprintf(stderr, "GPU plugin did not provide vram\n");
252 exit(1);
253 }
254
221be40d 255 if (gp2x_dev_id == GP2X_DEV_CAANOO)
256 in_set_config_int(in_name_to_id("evdev:pollux-analog"),
55b0eeea 257 IN_CFG_ABS_DEAD_ZONE, analog_deadzone);
41f55c9f 258
259 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
260 g_menuscreen_ptr = fb_flip();
ddc0a02a 261 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
55b0eeea 262}
263
47821672 264void *plat_prepare_screenshot(int *w, int *h, int *bpp)
265{
266 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
267 *w = 320;
268 *h = 240;
269 *bpp = psx_bpp;
270 return pl_vout_buf;
271}
272
a805c855 273void plat_minimize(void)
274{
275}
276
55b0eeea 277static void pl_vout_set_raw_vram(void *vram)
278{
279 int i;
280
281 psx_vram = vram;
282
283 if (vram == NULL)
284 return;
285
286 if ((long)psx_vram & 0x7ff)
287 fprintf(stderr, "GPU plugin did not align vram\n");
288
289 for (i = 0; i < 512; i++) {
290 psx_vram[i * 1024] = 0; // touch
291 psx_vram_padds[i] = warm_virt2phys(&psx_vram[i * 1024]);
292 }
293}
294
55b0eeea 295static void spend_cycles(int loops)
296{
297 asm volatile (
298 " mov r0,%0 ;\n"
299 "0: subs r0,r0,#1 ;\n"
300 " bgt 0b"
301 :: "r" (loops) : "cc", "r0");
302}
303
304#define DMA_BASE6 0x0300
305#define DMA_REG(x) memregl[(DMA_BASE6 + x) >> 2]
306
307/* this takes ~1.5ms, while ldm/stm ~1.95ms */
308static void raw_flip_dma(int x, int y)
309{
41f55c9f 310 unsigned int dst = fb_paddrs[fb_work_buf] +
311 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;
02ee7e24 312 int spsx_line = y + psx_offset_y;
313 int spsx_offset = (x + psx_offset_x) & 0x3f8;
55b0eeea 314 int dst_stride = 320 * psx_bpp / 8;
a72ac803 315 int len = psx_src_width * psx_bpp / 8;
55b0eeea 316 int i;
317
318 warm_cache_op_all(WOP_D_CLEAN);
d3f3bf09 319 pcnt_start(PCNT_BLIT);
55b0eeea 320
321 dst &= ~7;
322 len &= ~7;
323
324 if (DMA_REG(0x0c) & 0x90000) {
325 printf("already runnig DMA?\n");
326 DMA_REG(0x0c) = 0x100000;
327 }
328 if ((DMA_REG(0x2c) & 0x0f) < 5) {
329 printf("DMA queue busy?\n");
330 DMA_REG(0x24) = 1;
331 }
332
a72ac803 333 for (i = psx_src_height; i > 0; i--, spsx_line += psx_step, dst += dst_stride) {
55b0eeea 334 while ((DMA_REG(0x2c) & 0x0f) < 4)
335 spend_cycles(10);
336
337 // XXX: it seems we must always set all regs, what is autoincrement there for?
338 DMA_REG(0x20) = 1; // queue wait cmd
339 DMA_REG(0x10) = psx_vram_padds[spsx_line & 511] + spsx_offset * 2; // DMA src
340 DMA_REG(0x14) = dst; // DMA dst
341 DMA_REG(0x18) = len - 1; // len
342 DMA_REG(0x1c) = 0x80000; // go
343 }
344
55b0eeea 345 if (psx_bpp == 16) {
346 pl_vout_buf = g_menuscreen_ptr;
6469a8c4 347 pl_print_hud(fb_offset_x);
55b0eeea 348 }
349
350 g_menuscreen_ptr = fb_flip();
a92f6af1 351 pl_rearmed_cbs.flip_cnt++;
d3f3bf09 352
353 pcnt_end(PCNT_BLIT);
55b0eeea 354}
355
02ee7e24 356#define make_flip_func(name, blitfunc) \
357static void name(int x, int y) \
358{ \
359 unsigned short *vram = psx_vram; \
360 unsigned char *dst = (unsigned char *)g_menuscreen_ptr + \
361 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8; \
362 unsigned int src = (y + psx_offset_y) * 1024 + x + psx_offset_x; \
363 int dst_stride = 320 * psx_bpp / 8; \
a72ac803 364 int len = psx_src_width * psx_bpp / 8; \
02ee7e24 365 int i; \
366 \
367 pcnt_start(PCNT_BLIT); \
368 \
a72ac803 369 for (i = psx_src_height; i > 0; i--, src += psx_step * 1024, dst += dst_stride) { \
02ee7e24 370 src &= 1024*512-1; \
371 blitfunc(dst, vram + src, len); \
372 } \
373 \
374 if (psx_bpp == 16) { \
375 pl_vout_buf = g_menuscreen_ptr; \
6469a8c4 376 pl_print_hud(fb_offset_x); \
02ee7e24 377 } \
378 \
379 g_menuscreen_ptr = fb_flip(); \
a92f6af1 380 pl_rearmed_cbs.flip_cnt++; \
02ee7e24 381 \
382 pcnt_end(PCNT_BLIT); \
383}
384
385make_flip_func(raw_flip_soft, memcpy)
386make_flip_func(raw_flip_soft_368, blit320_368)
387make_flip_func(raw_flip_soft_512, blit320_512)
388make_flip_func(raw_flip_soft_640, blit320_640)
389
6469a8c4 390void *plat_gvideo_set_mode(int *w_, int *h_, int *bpp_)
55b0eeea 391{
02ee7e24 392 int poff_w, poff_h, w_max;
6469a8c4 393 int w = *w_, h = *h_, bpp = *bpp_;
55b0eeea 394
a72ac803 395 if (!w || !h || !bpp)
02ee7e24 396 return NULL;
55b0eeea 397
02ee7e24 398 printf("psx mode: %dx%d@%d\n", w, h, bpp);
a72ac803 399 psx_width = w;
400 psx_height = h;
401 psx_bpp = bpp;
55b0eeea 402
a72ac803 403 switch (w + (bpp != 16) + !soft_scaling) {
02ee7e24 404 case 640:
405 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_640;
406 w_max = 640;
407 break;
408 case 512:
409 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_512;
410 w_max = 512;
411 break;
412 case 384:
413 case 368:
414 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_368;
415 w_max = 368;
416 break;
417 default:
418 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
419 w_max = 320;
420 break;
55b0eeea 421 }
422
02ee7e24 423 psx_step = 1;
424 if (h > 256) {
425 psx_step = 2;
426 h /= 2;
427 }
428
429 poff_w = poff_h = 0;
430 if (w > w_max) {
431 poff_w = w / 2 - w_max / 2;
432 w = w_max;
433 }
434 fb_offset_x = 0;
435 if (w < 320)
436 fb_offset_x = 320/2 - w / 2;
437 if (h > 240) {
438 poff_h = h / 2 - 240/2;
439 h = 240;
440 }
441 fb_offset_y = 240/2 - h / 2;
442
6983a9ae 443 psx_offset_x = poff_w * psx_bpp/8 / 2;
02ee7e24 444 psx_offset_y = poff_h;
a72ac803 445 psx_src_width = w;
446 psx_src_height = h;
02ee7e24 447
448 if (fb_offset_x || fb_offset_y) {
449 // not fullscreen, must clear borders
450 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
451 g_menuscreen_ptr = fb_flip();
452 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
453 }
454
455 pollux_changemode(bpp, 1);
456
221be40d 457 pl_set_gun_rect(fb_offset_x, fb_offset_y, w > 320 ? 320 : w, h);
458
6469a8c4 459 // adjust for hud
460 *w_ = 320;
461 *h_ = fb_offset_y + psx_src_height;
462
02ee7e24 463 return NULL;
55b0eeea 464}
465
6469a8c4 466/* not really used, we do raw_flip */
ab423939 467void plat_gvideo_open(int is_pal)
6469a8c4 468{
469}
470
471void *plat_gvideo_flip(void)
41f55c9f 472{
473 return NULL;
474}
475
6469a8c4 476void plat_gvideo_close(void)
477{
478}
479
0b6c6da8 480static void save_multiple_regs(unsigned int *dest, int base, int count)
481{
482 const volatile unsigned int *regs = memregl + base / 4;
483 int i;
484
485 for (i = 0; i < count; i++)
486 dest[i] = regs[i];
487}
488
489static void restore_multiple_regs(int base, const unsigned int *src, int count)
490{
491 volatile unsigned int *regs = memregl + base / 4;
492 int i;
493
494 for (i = 0; i < count; i++)
495 regs[i] = src[i];
496}
497
55b0eeea 498void plat_init(void)
499{
500 const char *main_fb_name = "/dev/fb0";
501 struct fb_fix_screeninfo fbfix;
502 int rate, timer_div, timer_div2;
503 int fbdev, ret, warm_ret;
221be40d 504 FILE *f;
55b0eeea 505
506 memdev = open("/dev/mem", O_RDWR);
507 if (memdev == -1) {
508 perror("open(/dev/mem) failed");
509 exit(1);
510 }
511
512 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
513 if (memregs == MAP_FAILED) {
514 perror("mmap(memregs) failed");
515 exit(1);
516 }
517 memregl = (volatile void *)memregs;
518
0b6c6da8 519 // save video regs of both MLCs
520 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
521 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
522
55b0eeea 523 fbdev = open(main_fb_name, O_RDWR);
524 if (fbdev == -1) {
525 fprintf(stderr, "%s: ", main_fb_name);
526 perror("open");
527 exit(1);
528 }
529
530 ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
531 if (ret == -1) {
532 perror("ioctl(fbdev) failed");
533 exit(1);
534 }
535 printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
536 fb_paddrs[0] = fbfix.smem_start;
537 fb_paddrs[1] = fb_paddrs[0] + 320*240*4; // leave space for 24bpp
538
0b6c6da8 539 fb_vaddrs[0] = mmap(0, FB_VRAM_SIZE, PROT_READ|PROT_WRITE,
55b0eeea 540 MAP_SHARED, memdev, fb_paddrs[0]);
541 if (fb_vaddrs[0] == MAP_FAILED) {
542 perror("mmap(fb_vaddrs) failed");
543 exit(1);
544 }
545 fb_vaddrs[1] = (char *)fb_vaddrs[0] + 320*240*4;
546
a72ac803 547 memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
55b0eeea 548 pollux_changemode(16, 0);
549 g_menuscreen_w = 320;
550 g_menuscreen_h = 240;
551 g_menuscreen_ptr = fb_flip();
552
55b0eeea 553 warm_ret = warm_init();
02ee7e24 554 have_warm = warm_ret == 0;
55b0eeea 555 warm_change_cb_upper(WCB_B_BIT, 1);
556
557 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
558 * by reprogramming the PLL0 then, as it overclocks system bus */
559 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
560 cpu_clock_allowed = 1;
561 else {
562 cpu_clock_allowed = 0;
563 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
564 memregl[0xf000>>2]);
565 }
566
567 /* find what PLL1 runs at, for the timer */
568 rate = decode_pll(memregl[0xf008>>2]);
569 printf("PLL1 @ %dHz\n", rate);
570
571 /* setup timer */
572 timer_div = (rate + 500000) / 1000000;
573 timer_div2 = 0;
574 while (timer_div > 256) {
575 timer_div /= 2;
576 timer_div2++;
577 }
578 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
579 int timer_rate = (rate >> timer_div2) / timer_div;
580 if (TIMER_REG(0x08) & 8) {
581 fprintf(stderr, "warning: timer in use, overriding!\n");
582 timer_cleanup();
583 }
584 if (timer_rate != 1000000)
585 fprintf(stderr, "warning: timer drift %d us\n", timer_rate - 1000000);
586
587 timer_div2 = (timer_div2 + 3) & 3;
588 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
589 TIMER_REG(0x40) = 0x0c; /* clocks on */
590 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
591 }
592 else
593 fprintf(stderr, "warning: could not make use of timer\n");
594
595 /* setup DMA */
596 DMA_REG(0x0c) = 0x20000; // pending IRQ clear
597
598 battdev = open("/dev/pollux_batt", O_RDONLY);
599 if (battdev < 0)
600 perror("Warning: could't open pollux_batt");
601
221be40d 602 f = fopen("/dev/accel", "rb");
603 if (f) {
604 printf("detected Caanoo\n");
605 gp2x_dev_id = GP2X_DEV_CAANOO;
606 fclose(f);
607 }
608 else {
609 printf("detected Wiz\n");
610 gp2x_dev_id = GP2X_DEV_WIZ;
221be40d 611 }
612
9b4bd105 613 in_tsbutton_init();
b07c18e8 614 in_evdev_init(in_evdev_defbinds);
9b4bd105 615 if (gp2x_dev_id == GP2X_DEV_CAANOO)
616 caanoo_init();
b07c18e8 617 else
618 wiz_init();
9b4bd105 619
221be40d 620 mixerdev = open("/dev/mixer", O_RDWR);
621 if (mixerdev == -1)
622 perror("open(/dev/mixer)");
623
02ee7e24 624 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
55b0eeea 625 pl_rearmed_cbs.pl_vout_set_raw_vram = pl_vout_set_raw_vram;
626
a72ac803 627 psx_src_width = 320;
628 psx_src_height = 240;
55b0eeea 629 psx_bpp = 16;
bb88ec28 630
631 pl_rearmed_cbs.screen_w = 320;
632 pl_rearmed_cbs.screen_h = 240;
55b0eeea 633}
634
635void plat_finish(void)
636{
637 warm_finish();
638 timer_cleanup();
0b6c6da8 639
640 memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
641 restore_multiple_regs(0x4058, saved_video_regs[0], ARRAY_SIZE(saved_video_regs[0]));
642 restore_multiple_regs(0x4458, saved_video_regs[1], ARRAY_SIZE(saved_video_regs[1]));
643 memregl[0x4058>>2] |= 0x10;
644 memregl[0x4458>>2] |= 0x10;
645 munmap(fb_vaddrs[0], FB_VRAM_SIZE);
646 close(fbdev);
55b0eeea 647
648 if (battdev >= 0)
649 close(battdev);
221be40d 650 if (mixerdev >= 0)
651 close(mixerdev);
55b0eeea 652 munmap((void *)memregs, 0x20000);
653 close(memdev);
654}
655
5b9f1b9e 656/* WIZ RAM lack workaround */
657void *memtab_mmap(void *addr, size_t size)
658{
659 void *ret;
660
661 if (gp2x_dev_id != GP2X_DEV_WIZ)
662 return mmap(addr, size, PROT_READ | PROT_WRITE,
663 MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
664
665 ret = mmap(addr, size, PROT_READ | PROT_WRITE,
666 MAP_SHARED | MAP_FIXED, memdev, 0x03000000);
667 if (ret != MAP_FAILED)
668 warm_change_cb_range(WCB_C_BIT | WCB_B_BIT, 1, ret, size);
669 return ret;
670}
671
55b0eeea 672/* Caanoo stuff, perhaps move later */
55b0eeea 673static const char * const caanoo_keys[KEY_MAX + 1] = {
674 [0 ... KEY_MAX] = NULL,
675 [KEY_UP] = "Up",
676 [KEY_LEFT] = "Left",
677 [KEY_RIGHT] = "Right",
678 [KEY_DOWN] = "Down",
679 [BTN_TRIGGER] = "A",
680 [BTN_THUMB] = "X",
681 [BTN_THUMB2] = "B",
682 [BTN_TOP] = "Y",
683 [BTN_TOP2] = "L",
684 [BTN_PINKIE] = "R",
685 [BTN_BASE] = "Home",
686 [BTN_BASE2] = "Lock",
687 [BTN_BASE3] = "I",
688 [BTN_BASE4] = "II",
689 [BTN_BASE5] = "Push",
690};
691
b944a30e 692struct haptic_data {
693 int count;
694 struct {
695 short time, strength;
696 } actions[120];
697};
698
699#define HAPTIC_IOCTL_MAGIC 'I'
700#define HAPTIC_PLAY_PATTERN _IOW(HAPTIC_IOCTL_MAGIC, 4, struct haptic_data)
701#define HAPTIC_INDIVIDUAL_MODE _IOW(HAPTIC_IOCTL_MAGIC, 5, unsigned int)
702#define HAPTIC_SET_VIB_LEVEL _IOW(HAPTIC_IOCTL_MAGIC, 9, unsigned int)
703
704static int hapticdev = -1;
3a40ff14 705static struct haptic_data haptic_seq[2];
b944a30e 706
3a40ff14 707static int haptic_read(const char *fname, struct haptic_data *data)
b944a30e 708{
709 int i, ret, v1, v2;
710 char buf[128], *p;
711 FILE *f;
712
3a40ff14 713 f = fopen(fname, "r");
b944a30e 714 if (f == NULL) {
6469a8c4 715 fprintf(stderr, "fopen(%s)", fname);
3a40ff14 716 perror("");
b944a30e 717 return -1;
718 }
719
3a40ff14 720 for (i = 0; i < sizeof(data->actions) / sizeof(data->actions[0]); ) {
b944a30e 721 p = fgets(buf, sizeof(buf), f);
722 if (p == NULL)
723 break;
724 while (*p != 0 && *p == ' ')
725 p++;
726 if (*p == 0 || *p == ';' || *p == '#')
727 continue;
728
729 ret = sscanf(buf, "%d %d", &v1, &v2);
730 if (ret != 2) {
731 fprintf(stderr, "can't parse: %s", buf);
732 continue;
733 }
734
3a40ff14 735 data->actions[i].time = v1;
736 data->actions[i].strength = v2;
b944a30e 737 i++;
738 }
739 fclose(f);
740
741 if (i == 0) {
3a40ff14 742 fprintf(stderr, "bad haptic file: %s\n", fname);
b944a30e 743 return -1;
744 }
3a40ff14 745 data->count = i;
746
747 return 0;
748}
749
750static int haptic_init(void)
751{
752 int ret, i;
753
754 ret = haptic_read("haptic_w.cfg", &haptic_seq[0]);
755 if (ret != 0)
756 return -1;
757 ret = haptic_read("haptic_s.cfg", &haptic_seq[1]);
758 if (ret != 0)
759 return -1;
b944a30e 760
761 hapticdev = open("/dev/isa1200", O_RDWR | O_NONBLOCK);
762 if (hapticdev == -1) {
763 perror("open(/dev/isa1200)");
764 return -1;
765 }
766
767 i = 0;
768 ret = ioctl(hapticdev, HAPTIC_INDIVIDUAL_MODE, &i); /* use 2 of them */
769 i = 3;
770 ret |= ioctl(hapticdev, HAPTIC_SET_VIB_LEVEL, &i); /* max */
771 if (ret != 0) {
772 fprintf(stderr, "haptic ioctls failed\n");
773 close(hapticdev);
774 hapticdev = -1;
775 return -1;
776 }
777
778 return 0;
779}
780
3a40ff14 781void plat_trigger_vibrate(int is_strong)
b944a30e 782{
783 int ret;
784
785 if (hapticdev == -2)
786 return; // it's broken
787 if (hapticdev < 0) {
788 ret = haptic_init();
789 if (ret < 0) {
790 hapticdev = -2;
791 return;
792 }
793 }
794
3a40ff14 795 ioctl(hapticdev, HAPTIC_PLAY_PATTERN, &haptic_seq[!!is_strong]);
b944a30e 796}
797
b07c18e8 798static void caanoo_init(void)
799{
800 in_probe();
801 in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
802 caanoo_keys, sizeof(caanoo_keys));
803}
804
221be40d 805/* Wiz stuff */
b07c18e8 806static const struct in_default_bind in_gp2x_defbinds[] =
221be40d 807{
808 /* MXYZ SACB RLDU */
809 { GP2X_BTN_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
810 { GP2X_BTN_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
811 { GP2X_BTN_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
812 { GP2X_BTN_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
813 { GP2X_BTN_X, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
814 { GP2X_BTN_B, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
815 { GP2X_BTN_A, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
816 { GP2X_BTN_Y, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
817 { GP2X_BTN_L, IN_BINDTYPE_PLAYER12, DKEY_L1 },
818 { GP2X_BTN_R, IN_BINDTYPE_PLAYER12, DKEY_R1 },
819 { GP2X_BTN_START, IN_BINDTYPE_PLAYER12, DKEY_START },
820 { GP2X_BTN_SELECT, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
821 { GP2X_BTN_VOL_UP, IN_BINDTYPE_EMU, SACTION_VOLUME_UP },
822 { GP2X_BTN_VOL_DOWN, IN_BINDTYPE_EMU, SACTION_VOLUME_DOWN },
823 { 0, 0, 0 },
824};
825
826void plat_step_volume(int is_up)
827{
828 static int volume = 50;
829 int ret, val;
830
831 if (mixerdev < 0)
832 return;
833
834 if (is_up) {
835 volume += 5;
836 if (volume > 255) volume = 255;
837 }
838 else {
839 volume -= 5;
840 if (volume < 0) volume = 0;
841 }
842 val = volume;
843 val |= val << 8;
844
845 ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
846 if (ret == -1)
847 perror("WRITE_PCM");
848}
849
850// unused dummy for in_gp2x
851volatile unsigned short *gp2x_memregs;
852
b07c18e8 853static void wiz_init(void)
55b0eeea 854{
b07c18e8 855 in_gp2x_init(in_gp2x_defbinds);
856 in_probe();
55b0eeea 857}
ARM optimized PCSX fork