avoid bogus warning
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.h
CommitLineData
57871462 1#define HOST_REGS 13
2#define HOST_CCREG 10
3#define HOST_BTREG 8
4#define EXCLUDE_REG 11
5
6#define HOST_IMM8 1
7#define HAVE_CMOV_IMM 1
8#define CORTEX_A8_BRANCH_PREDICTION_HACK 1
9#define USE_MINI_HT 1
10//#define REG_PREFETCH 1
0bbd1454 11#define HAVE_CONDITIONAL_CALL 1
94d23bb9 12#define DISABLE_TLB 1
3d624f89 13//#define MUPEN64
14#define FORCE32 1
15#define DISABLE_COP1 1
7139f3c8 16#define PCSX 1
4cb76aa4 17#define RAM_SIZE 0x200000
3d624f89 18
d3f3bf09 19#ifndef __ARM_ARCH_7A__
d3f3bf09 20//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
21//#undef USE_MINI_HT
22#endif
23
a327ad27 24#ifndef BASE_ADDR_FIXED
a327ad27 25#define BASE_ADDR_FIXED 0
26#endif
bdeade46 27
3d624f89 28#ifdef FORCE32
29#define REG_SHIFT 2
30#else
31#define REG_SHIFT 3
32#endif
57871462 33
34/* ARM calling convention:
35 r0-r3, r12: caller-save
36 r4-r11: callee-save */
37
38#define ARG1_REG 0
39#define ARG2_REG 1
40#define ARG3_REG 2
41#define ARG4_REG 3
42
43/* GCC register naming convention:
44 r10 = sl (base)
45 r11 = fp (frame pointer)
46 r12 = ip (scratch)
47 r13 = sp (stack pointer)
48 r14 = lr (link register)
49 r15 = pc (program counter) */
50
51#define FP 11
52#define LR 14
53#define HOST_TEMPREG 14
54
55// Note: FP is set to &dynarec_local when executing generated code.
56// Thus the local variables are actually global and not on the stack.
57
58extern char *invc_ptr;
59
57871462 60#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
61
bdeade46 62// Code generator target address
a327ad27 63#if BASE_ADDR_FIXED
bdeade46 64// "round" address helpful for debug
65#define BASE_ADDR 0x1000000
66#else
67extern char translation_cache[1 << TARGET_SIZE_2];
c67af2ac 68#define BASE_ADDR (u_int)translation_cache
bdeade46 69#endif