try to make drc more configurable
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.h
CommitLineData
57871462 1#define HOST_REGS 13
2#define HOST_CCREG 10
3#define HOST_BTREG 8
4#define EXCLUDE_REG 11
5
6#define HOST_IMM8 1
7#define HAVE_CMOV_IMM 1
8#define CORTEX_A8_BRANCH_PREDICTION_HACK 1
9#define USE_MINI_HT 1
10//#define REG_PREFETCH 1
94d23bb9 11#define DISABLE_TLB 1
3d624f89 12//#define MUPEN64
13#define FORCE32 1
14#define DISABLE_COP1 1
15
16#ifdef FORCE32
17#define REG_SHIFT 2
18#else
19#define REG_SHIFT 3
20#endif
57871462 21
22/* ARM calling convention:
23 r0-r3, r12: caller-save
24 r4-r11: callee-save */
25
26#define ARG1_REG 0
27#define ARG2_REG 1
28#define ARG3_REG 2
29#define ARG4_REG 3
30
31/* GCC register naming convention:
32 r10 = sl (base)
33 r11 = fp (frame pointer)
34 r12 = ip (scratch)
35 r13 = sp (stack pointer)
36 r14 = lr (link register)
37 r15 = pc (program counter) */
38
39#define FP 11
40#define LR 14
41#define HOST_TEMPREG 14
42
43// Note: FP is set to &dynarec_local when executing generated code.
44// Thus the local variables are actually global and not on the stack.
45
46extern char *invc_ptr;
47
48#define BASE_ADDR 0x7000000 // Code generator target address
49#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
50
51// This is defined in linkage_arm.s, but gcc -O3 likes this better
52#define rdram ((unsigned int *)0x80000000)