add OMAP layer, also preliminary menu, hud and input support
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / linkage_arm.s
CommitLineData
57871462 1/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus - linkage_arm.s *
3 * Copyright (C) 2009-2010 Ari64 *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
19 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
20 .cpu arm9tdmi
21 .fpu softvfp
22 .eabi_attribute 20, 1
23 .eabi_attribute 21, 1
24 .eabi_attribute 23, 3
25 .eabi_attribute 24, 1
26 .eabi_attribute 25, 1
27 .eabi_attribute 26, 2
28 .eabi_attribute 30, 6
29 .eabi_attribute 18, 4
30 .file "linkage_arm.s"
31 .global rdram
32rdram = 0x80000000
33 .global dynarec_local
34 .global reg
35 .global hi
36 .global lo
57871462 37 .global reg_cop0
b9b61529 38 .global reg_cop2d
39 .global reg_cop2c
57871462 40 .global FCR0
41 .global FCR31
57871462 42 .global next_interupt
43 .global cycle_count
44 .global last_count
45 .global pending_exception
46 .global pcaddr
47 .global stop
48 .global invc_ptr
49 .global address
50 .global readmem_dword
f95a77f7 51 .global readmem_word
57871462 52 .global dword
53 .global word
54 .global hword
55 .global byte
56 .global branch_target
57 .global PC
57871462 58 .global mini_ht
59 .global restore_candidate
60 .global memory_map
f95a77f7 61 /* psx */
62 .global psxRegs
63
57871462 64 .bss
65 .align 4
66 .type dynarec_local, %object
f95a77f7 67 .size dynarec_local, dynarec_local_end-dynarec_local
57871462 68dynarec_local:
f95a77f7 69 .space dynarec_local_end-dynarec_local /*0x400630*/
57871462 70next_interupt = dynarec_local + 64
71 .type next_interupt, %object
72 .size next_interupt, 4
73cycle_count = next_interupt + 4
74 .type cycle_count, %object
75 .size cycle_count, 4
76last_count = cycle_count + 4
77 .type last_count, %object
78 .size last_count, 4
79pending_exception = last_count + 4
80 .type pending_exception, %object
81 .size pending_exception, 4
7139f3c8 82stop = pending_exception + 4
57871462 83 .type stop, %object
84 .size stop, 4
85invc_ptr = stop + 4
86 .type invc_ptr, %object
87 .size invc_ptr, 4
88address = invc_ptr + 4
89 .type address, %object
90 .size address, 4
91readmem_dword = address + 4
f95a77f7 92readmem_word = readmem_dword
57871462 93 .type readmem_dword, %object
94 .size readmem_dword, 8
95dword = readmem_dword + 8
96 .type dword, %object
97 .size dword, 8
98word = dword + 8
99 .type word, %object
100 .size word, 4
101hword = word + 4
102 .type hword, %object
103 .size hword, 2
104byte = hword + 2
105 .type byte, %object
106 .size byte, 1 /* 1 byte free */
107FCR0 = hword + 4
108 .type FCR0, %object
109 .size FCR0, 4
110FCR31 = FCR0 + 4
111 .type FCR31, %object
112 .size FCR31, 4
113reg = FCR31 + 4
f95a77f7 114
115/* psxRegs */
116psxRegs = reg
57871462 117 .type reg, %object
f95a77f7 118 .size reg, 128
119 .size psxRegs, psxRegs_end-psxRegs
7139f3c8 120lo = reg + 128
57871462 121 .type lo, %object
f95a77f7 122 .size lo, 4
7139f3c8 123hi = lo + 4
124 .type hi, %object
125 .size hi, 4
126reg_cop0 = hi + 4
57871462 127 .type reg_cop0, %object
128 .size reg_cop0, 128
f95a77f7 129reg_cop2d = reg_cop0 + 128
130 .type reg_cop2d, %object
131 .size reg_cop2d, 128
132reg_cop2c = reg_cop2d + 128
133 .type reg_cop2c, %object
134 .size reg_cop2c, 128
135PC = reg_cop2c + 128
7139f3c8 136pcaddr = PC
57871462 137 .type PC, %object
138 .size PC, 4
f95a77f7 139code = PC + 4
140 .type code, %object
141 .size code, 4
142cycle = code + 4
143 .type cycle, %object
144 .size cycle, 4
145interrupt = cycle + 4
146 .type interrupt, %object
147 .size interrupt, 4
148intCycle = interrupt + 4
149 .type intCycle, %object
150 .size intCycle, 128
151psxRegs_end = intCycle + 128
152
67ba0fb4 153align0 = psxRegs_end /* just for alignment */
f95a77f7 154 .type align0, %object
67ba0fb4 155 .size align0, 8
156branch_target = align0 + 8
f95a77f7 157 .type branch_target, %object
158 .size branch_target, 4
159mini_ht = branch_target + 4
57871462 160 .type mini_ht, %object
161 .size mini_ht, 256
162restore_candidate = mini_ht + 256
163 .type restore_candidate, %object
164 .size restore_candidate, 512
165memory_map = restore_candidate + 512
166 .type memory_map, %object
167 .size memory_map, 4194304
f95a77f7 168dynarec_local_end = memory_map + 4194304
57871462 169
170 .text
171 .align 2
172 .global dyna_linker
173 .type dyna_linker, %function
174dyna_linker:
175 /* r0 = virtual target address */
176 /* r1 = instruction to patch */
57871462 177 mov r12, r0
57871462 178 mov r6, #4096
57871462 179 mov r2, #0x80000
180 ldr r3, .jiptr
57871462 181 sub r6, r6, #1
57871462 182 ldr r7, [r1]
183 eor r2, r2, r12, lsr #12
184 and r6, r6, r12, lsr #12
185 cmp r2, #2048
186 add r12, r7, #2
187 orrcs r2, r6, #2048
188 ldr r5, [r3, r2, lsl #2]
189 lsl r12, r12, #8
190 /* jump_in lookup */
191.A1:
192 movs r4, r5
193 beq .A3
194 ldr r3, [r5]
195 ldr r5, [r4, #12]
196 teq r3, r0
197 bne .A1
198 ldr r3, [r4, #4]
199 ldr r4, [r4, #8]
200 tst r3, r3
201 bne .A1
202.A2:
203 mov r5, r1
204 add r1, r1, r12, asr #6
205 teq r1, r4
206 moveq pc, r4 /* Stale i-cache */
207 bl add_link
208 sub r2, r4, r5
209 and r1, r7, #0xff000000
210 lsl r2, r2, #6
211 sub r1, r1, #2
212 add r1, r1, r2, lsr #8
213 str r1, [r5]
214 mov pc, r4
215.A3:
216 /* hash_table lookup */
217 cmp r2, #2048
218 ldr r3, .jdptr
219 eor r4, r0, r0, lsl #16
220 lslcc r2, r0, #9
221 ldr r6, .htptr
222 lsr r4, r4, #12
223 lsrcc r2, r2, #21
224 bic r4, r4, #15
225 ldr r5, [r3, r2, lsl #2]
226 ldr r7, [r6, r4]!
227 teq r7, r0
228 ldreq pc, [r6, #4]
229 ldr r7, [r6, #8]
230 teq r7, r0
231 ldreq pc, [r6, #12]
232 /* jump_dirty lookup */
233.A6:
234 movs r4, r5
235 beq .A8
236 ldr r3, [r5]
237 ldr r5, [r4, #12]
238 teq r3, r0
239 bne .A6
240.A7:
241 ldr r1, [r4, #8]
242 /* hash_table insert */
243 ldr r2, [r6]
244 ldr r3, [r6, #4]
245 str r0, [r6]
246 str r1, [r6, #4]
247 str r2, [r6, #8]
248 str r3, [r6, #12]
249 mov pc, r1
250.A8:
251 mov r4, r0
252 mov r5, r1
253 bl new_recompile_block
254 tst r0, r0
255 mov r0, r4
256 mov r1, r5
257 beq dyna_linker
258 /* pagefault */
259 mov r1, r0
260 mov r2, #8
261 .size dyna_linker, .-dyna_linker
262 .global exec_pagefault
263 .type exec_pagefault, %function
264exec_pagefault:
265 /* r0 = instruction pointer */
266 /* r1 = fault address */
267 /* r2 = cause */
268 ldr r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
269 mvn r6, #0xF000000F
270 ldr r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
271 bic r6, r6, #0x0F800000
272 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
273 orr r3, r3, #2
274 str r1, [fp, #reg_cop0+32-dynarec_local] /* BadVAddr */
275 bic r4, r4, r6
276 str r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
277 and r5, r6, r1, lsr #9
278 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
279 and r1, r1, r6, lsl #9
280 str r1, [fp, #reg_cop0+40-dynarec_local] /* EntryHi */
281 orr r4, r4, r5
282 str r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
283 mov r0, #0x80000000
284 bl get_addr_ht
285 mov pc, r0
286 .size exec_pagefault, .-exec_pagefault
7139f3c8 287
57871462 288/* Special dynamic linker for the case where a page fault
289 may occur in a branch delay slot */
290 .global dyna_linker_ds
291 .type dyna_linker_ds, %function
292dyna_linker_ds:
293 /* r0 = virtual target address */
294 /* r1 = instruction to patch */
57871462 295 mov r12, r0
57871462 296 mov r6, #4096
57871462 297 mov r2, #0x80000
298 ldr r3, .jiptr
57871462 299 sub r6, r6, #1
57871462 300 ldr r7, [r1]
301 eor r2, r2, r12, lsr #12
302 and r6, r6, r12, lsr #12
303 cmp r2, #2048
304 add r12, r7, #2
305 orrcs r2, r6, #2048
306 ldr r5, [r3, r2, lsl #2]
307 lsl r12, r12, #8
308 /* jump_in lookup */
309.B1:
310 movs r4, r5
311 beq .B3
312 ldr r3, [r5]
313 ldr r5, [r4, #12]
314 teq r3, r0
315 bne .B1
316 ldr r3, [r4, #4]
317 ldr r4, [r4, #8]
318 tst r3, r3
319 bne .B1
320.B2:
321 mov r5, r1
322 add r1, r1, r12, asr #6
323 teq r1, r4
324 moveq pc, r4 /* Stale i-cache */
325 bl add_link
326 sub r2, r4, r5
327 and r1, r7, #0xff000000
328 lsl r2, r2, #6
329 sub r1, r1, #2
330 add r1, r1, r2, lsr #8
331 str r1, [r5]
332 mov pc, r4
333.B3:
334 /* hash_table lookup */
335 cmp r2, #2048
336 ldr r3, .jdptr
337 eor r4, r0, r0, lsl #16
338 lslcc r2, r0, #9
339 ldr r6, .htptr
340 lsr r4, r4, #12
341 lsrcc r2, r2, #21
342 bic r4, r4, #15
343 ldr r5, [r3, r2, lsl #2]
344 ldr r7, [r6, r4]!
345 teq r7, r0
346 ldreq pc, [r6, #4]
347 ldr r7, [r6, #8]
348 teq r7, r0
349 ldreq pc, [r6, #12]
350 /* jump_dirty lookup */
351.B6:
352 movs r4, r5
353 beq .B8
354 ldr r3, [r5]
355 ldr r5, [r4, #12]
356 teq r3, r0
357 bne .B6
358.B7:
359 ldr r1, [r4, #8]
360 /* hash_table insert */
361 ldr r2, [r6]
362 ldr r3, [r6, #4]
363 str r0, [r6]
364 str r1, [r6, #4]
365 str r2, [r6, #8]
366 str r3, [r6, #12]
367 mov pc, r1
368.B8:
369 mov r4, r0
370 bic r0, r0, #7
371 mov r5, r1
372 orr r0, r0, #1
373 bl new_recompile_block
374 tst r0, r0
375 mov r0, r4
376 mov r1, r5
377 beq dyna_linker_ds
378 /* pagefault */
379 bic r1, r0, #7
380 mov r2, #0x80000008 /* High bit set indicates pagefault in delay slot */
381 sub r0, r1, #4
382 b exec_pagefault
383 .size dyna_linker_ds, .-dyna_linker_ds
384.jiptr:
385 .word jump_in
386.jdptr:
387 .word jump_dirty
57871462 388.htptr:
389 .word hash_table
7139f3c8 390
57871462 391 .align 2
392 .global jump_vaddr_r0
393 .type jump_vaddr_r0, %function
394jump_vaddr_r0:
395 eor r2, r0, r0, lsl #16
396 b jump_vaddr
397 .size jump_vaddr_r0, .-jump_vaddr_r0
398 .global jump_vaddr_r1
399 .type jump_vaddr_r1, %function
400jump_vaddr_r1:
401 eor r2, r1, r1, lsl #16
402 mov r0, r1
403 b jump_vaddr
404 .size jump_vaddr_r1, .-jump_vaddr_r1
405 .global jump_vaddr_r2
406 .type jump_vaddr_r2, %function
407jump_vaddr_r2:
408 mov r0, r2
409 eor r2, r2, r2, lsl #16
410 b jump_vaddr
411 .size jump_vaddr_r2, .-jump_vaddr_r2
412 .global jump_vaddr_r3
413 .type jump_vaddr_r3, %function
414jump_vaddr_r3:
415 eor r2, r3, r3, lsl #16
416 mov r0, r3
417 b jump_vaddr
418 .size jump_vaddr_r3, .-jump_vaddr_r3
419 .global jump_vaddr_r4
420 .type jump_vaddr_r4, %function
421jump_vaddr_r4:
422 eor r2, r4, r4, lsl #16
423 mov r0, r4
424 b jump_vaddr
425 .size jump_vaddr_r4, .-jump_vaddr_r4
426 .global jump_vaddr_r5
427 .type jump_vaddr_r5, %function
428jump_vaddr_r5:
429 eor r2, r5, r5, lsl #16
430 mov r0, r5
431 b jump_vaddr
432 .size jump_vaddr_r5, .-jump_vaddr_r5
433 .global jump_vaddr_r6
434 .type jump_vaddr_r6, %function
435jump_vaddr_r6:
436 eor r2, r6, r6, lsl #16
437 mov r0, r6
438 b jump_vaddr
439 .size jump_vaddr_r6, .-jump_vaddr_r6
440 .global jump_vaddr_r8
441 .type jump_vaddr_r8, %function
442jump_vaddr_r8:
443 eor r2, r8, r8, lsl #16
444 mov r0, r8
445 b jump_vaddr
446 .size jump_vaddr_r8, .-jump_vaddr_r8
447 .global jump_vaddr_r9
448 .type jump_vaddr_r9, %function
449jump_vaddr_r9:
450 eor r2, r9, r9, lsl #16
451 mov r0, r9
452 b jump_vaddr
453 .size jump_vaddr_r9, .-jump_vaddr_r9
454 .global jump_vaddr_r10
455 .type jump_vaddr_r10, %function
456jump_vaddr_r10:
457 eor r2, r10, r10, lsl #16
458 mov r0, r10
459 b jump_vaddr
460 .size jump_vaddr_r10, .-jump_vaddr_r10
461 .global jump_vaddr_r12
462 .type jump_vaddr_r12, %function
463jump_vaddr_r12:
464 eor r2, r12, r12, lsl #16
465 mov r0, r12
466 b jump_vaddr
467 .size jump_vaddr_r12, .-jump_vaddr_r12
468 .global jump_vaddr_r7
469 .type jump_vaddr_r7, %function
470jump_vaddr_r7:
471 eor r2, r7, r7, lsl #16
472 add r0, r7, #0
473 .size jump_vaddr_r7, .-jump_vaddr_r7
474 .global jump_vaddr
475 .type jump_vaddr, %function
476jump_vaddr:
477 ldr r1, .htptr
478 mvn r3, #15
479 and r2, r3, r2, lsr #12
480 ldr r2, [r1, r2]!
481 teq r2, r0
482 ldreq pc, [r1, #4]
483 ldr r2, [r1, #8]
484 teq r2, r0
485 ldreq pc, [r1, #12]
486 str r10, [fp, #cycle_count-dynarec_local]
487 bl get_addr
488 ldr r10, [fp, #cycle_count-dynarec_local]
489 mov pc, r0
490 .size jump_vaddr, .-jump_vaddr
7139f3c8 491
57871462 492 .align 2
493 .global verify_code_ds
494 .type verify_code_ds, %function
495verify_code_ds:
496 str r8, [fp, #branch_target-dynarec_local]
497 .size verify_code_ds, .-verify_code_ds
498 .global verify_code_vm
499 .type verify_code_vm, %function
500verify_code_vm:
57871462 501 .global verify_code
502 .type verify_code, %function
503verify_code:
504 /* r1 = source */
505 /* r2 = target */
506 /* r3 = length */
507 tst r3, #4
508 mov r4, #0
509 add r3, r1, r3
510 mov r5, #0
511 ldrne r4, [r1], #4
512 mov r12, #0
513 ldrne r5, [r2], #4
514 teq r1, r3
515 beq .D3
516.D2:
517 ldr r7, [r1], #4
518 eor r9, r4, r5
519 ldr r8, [r2], #4
520 orrs r9, r9, r12
521 bne .D4
522 ldr r4, [r1], #4
523 eor r12, r7, r8
524 ldr r5, [r2], #4
525 cmp r1, r3
526 bcc .D2
527 teq r7, r8
528.D3:
529 teqeq r4, r5
530.D4:
531 ldr r8, [fp, #branch_target-dynarec_local]
532 moveq pc, lr
533.D5:
534 bl get_addr
535 mov pc, r0
536 .size verify_code, .-verify_code
7139f3c8 537 .size verify_code_vm, .-verify_code_vm
538
57871462 539 .align 2
540 .global cc_interrupt
541 .type cc_interrupt, %function
542cc_interrupt:
543 ldr r0, [fp, #last_count-dynarec_local]
544 mov r1, #0
545 mov r2, #0x1fc
546 add r10, r0, r10
547 str r1, [fp, #pending_exception-dynarec_local]
548 and r2, r2, r10, lsr #17
549 add r3, fp, #restore_candidate-dynarec_local
822b27d1 550 str r10, [fp, #cycle-dynarec_local] /* PCSX cycles */
551@@ str r10, [fp, #reg_cop0+36-dynarec_local] /* Count */
57871462 552 ldr r4, [r2, r3]
553 mov r10, lr
554 tst r4, r4
555 bne .E4
556.E1:
557 bl gen_interupt
558 mov lr, r10
822b27d1 559 ldr r10, [fp, #cycle-dynarec_local]
57871462 560 ldr r0, [fp, #next_interupt-dynarec_local]
561 ldr r1, [fp, #pending_exception-dynarec_local]
562 ldr r2, [fp, #stop-dynarec_local]
563 str r0, [fp, #last_count-dynarec_local]
564 sub r10, r10, r0
565 tst r2, r2
566 bne .E3
567 tst r1, r1
568 moveq pc, lr
569.E2:
570 ldr r0, [fp, #pcaddr-dynarec_local]
571 bl get_addr_ht
572 mov pc, r0
573.E3:
574 add r12, fp, #28
575 ldmia r12, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
576.E4:
577 /* Move 'dirty' blocks to the 'clean' list */
578 lsl r5, r2, #3
579 str r1, [r2, r3]
580.E5:
581 lsrs r4, r4, #1
582 mov r0, r5
583 add r5, r5, #1
584 blcs clean_blocks
585 tst r5, #31
586 bne .E5
587 b .E1
57871462 588 .size cc_interrupt, .-cc_interrupt
7139f3c8 589
57871462 590 .align 2
591 .global do_interrupt
592 .type do_interrupt, %function
593do_interrupt:
594 ldr r0, [fp, #pcaddr-dynarec_local]
595 bl get_addr_ht
596 ldr r1, [fp, #next_interupt-dynarec_local]
822b27d1 597 ldr r10, [fp, #cycle-dynarec_local]
57871462 598 str r1, [fp, #last_count-dynarec_local]
599 sub r10, r10, r1
600 add r10, r10, #2
601 mov pc, r0
602 .size do_interrupt, .-do_interrupt
603 .align 2
604 .global fp_exception
605 .type fp_exception, %function
606fp_exception:
607 mov r2, #0x10000000
608.E7:
609 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
610 mov r3, #0x80000000
611 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
612 orr r1, #2
613 add r2, r2, #0x2c
614 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
615 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
7139f3c8 616 add r0, r3, #0x80
57871462 617 bl get_addr_ht
618 mov pc, r0
619 .size fp_exception, .-fp_exception
620 .align 2
621 .global fp_exception_ds
622 .type fp_exception_ds, %function
623fp_exception_ds:
624 mov r2, #0x90000000 /* Set high bit if delay slot */
625 b .E7
626 .size fp_exception_ds, .-fp_exception_ds
7139f3c8 627
57871462 628 .align 2
629 .global jump_syscall
630 .type jump_syscall, %function
631jump_syscall:
632 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
633 mov r3, #0x80000000
634 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
635 orr r1, #2
636 mov r2, #0x20
637 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
638 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
7139f3c8 639 add r0, r3, #0x80
57871462 640 bl get_addr_ht
641 mov pc, r0
642 .size jump_syscall, .-jump_syscall
7139f3c8 643 .align 2
644
645 .align 2
646 .global jump_syscall_hle
647 .type jump_syscall_hle, %function
648jump_syscall_hle:
649 str r0, [fp, #pcaddr-dynarec_local] /* PC must be set to EPC for psxException */
650 ldr r2, [fp, #last_count-dynarec_local]
651 mov r1, #0 /* in delay slot */
652 add r2, r2, r10
653 mov r0, #0x20 /* cause */
654 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
7139f3c8 655 bl psxException
656
657 /* note: psxException might do recorsive recompiler call from it's HLE code,
658 * so be ready for this */
822b27d1 659pcsx_return:
660 ldr r1, [fp, #next_interupt-dynarec_local]
661 ldr r10, [fp, #cycle-dynarec_local]
7139f3c8 662 ldr r0, [fp, #pcaddr-dynarec_local]
822b27d1 663 sub r10, r10, r1
664 str r1, [fp, #last_count-dynarec_local]
7139f3c8 665 bl get_addr_ht
666 mov pc, r0
667 .size jump_syscall_hle, .-jump_syscall_hle
668
669 .align 2
670 .global jump_hlecall
671 .type jump_hlecall, %function
672jump_hlecall:
673 ldr r2, [fp, #last_count-dynarec_local]
674 str r0, [fp, #pcaddr-dynarec_local]
7139f3c8 675 add r2, r2, r10
7139f3c8 676 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
822b27d1 677 adr lr, pcsx_return
67ba0fb4 678 bx r1
7139f3c8 679 .size jump_hlecall, .-jump_hlecall
680
681new_dyna_leave:
682 .align 2
683 .global new_dyna_leave
684 .type new_dyna_leave, %function
685 ldr r0, [fp, #last_count-dynarec_local]
686 add r12, fp, #28
687 add r10, r0, r10
822b27d1 688 str r10, [fp, #cycle-dynarec_local]
7139f3c8 689 ldmia r12, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
690 .size new_dyna_leave, .-new_dyna_leave
691
822b27d1 692 /* these are used to call memhandlers */
57871462 693 .align 2
694 .global indirect_jump_indexed
695 .type indirect_jump_indexed, %function
696indirect_jump_indexed:
697 ldr r0, [r0, r1, lsl #2]
57871462 698 .global indirect_jump
699 .type indirect_jump, %function
700indirect_jump:
701 ldr r12, [fp, #last_count-dynarec_local]
702 add r2, r2, r12
822b27d1 703 str r2, [fp, #cycle-dynarec_local]
57871462 704 mov pc, r0
705 .size indirect_jump, .-indirect_jump
7139f3c8 706 .size indirect_jump_indexed, .-indirect_jump_indexed
707
57871462 708 .align 2
709 .global jump_eret
710 .type jump_eret, %function
711jump_eret:
712 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
713 ldr r0, [fp, #last_count-dynarec_local]
714 bic r1, r1, #2
715 add r10, r0, r10
716 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
822b27d1 717 str r10, [fp, #cycle-dynarec_local]
57871462 718 bl check_interupt
719 ldr r1, [fp, #next_interupt-dynarec_local]
720 ldr r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
721 str r1, [fp, #last_count-dynarec_local]
722 subs r10, r10, r1
723 bpl .E11
724.E8:
7139f3c8 725 bl get_addr
57871462 726 mov pc, r0
727.E11:
728 str r0, [fp, #pcaddr-dynarec_local]
729 bl cc_interrupt
730 ldr r0, [fp, #pcaddr-dynarec_local]
731 b .E8
732 .size jump_eret, .-jump_eret
7139f3c8 733
57871462 734 .align 2
735 .global new_dyna_start
736 .type new_dyna_start, %function
737new_dyna_start:
738 ldr r12, .dlptr
57871462 739 stmia r12, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
740 sub fp, r12, #28
7139f3c8 741 ldr r0, [fp, #pcaddr-dynarec_local]
742 /*bl new_recompile_block*/
743 bl get_addr_ht
744 ldr r1, [fp, #next_interupt-dynarec_local]
822b27d1 745 ldr r10, [fp, #cycle-dynarec_local]
7139f3c8 746 str r1, [fp, #last_count-dynarec_local]
747 sub r10, r10, r1
748 mov pc, r0
57871462 749.dlptr:
750 .word dynarec_local+28
751 .size new_dyna_start, .-new_dyna_start
7139f3c8 752
57871462 753 .align 2
754 .global write_rdram_new
755 .type write_rdram_new, %function
756write_rdram_new:
757 ldr r2, [fp, #address-dynarec_local]
758 ldr r0, [fp, #word-dynarec_local]
759 str r0, [r2]
760 b .E12
761 .size write_rdram_new, .-write_rdram_new
762 .align 2
763 .global write_rdramb_new
764 .type write_rdramb_new, %function
765write_rdramb_new:
766 ldr r2, [fp, #address-dynarec_local]
767 ldrb r0, [fp, #byte-dynarec_local]
768 eor r2, r2, #3
769 strb r0, [r2]
770 b .E12
771 .size write_rdramb_new, .-write_rdramb_new
772 .align 2
773 .global write_rdramh_new
774 .type write_rdramh_new, %function
775write_rdramh_new:
776 ldr r2, [fp, #address-dynarec_local]
777 ldrh r0, [fp, #hword-dynarec_local]
778 eor r2, r2, #2
779 strh r0, [r2]
780 b .E12
781 .size write_rdramh_new, .-write_rdramh_new
7139f3c8 782
57871462 783 .align 2
784 .global do_invalidate
785 .type do_invalidate, %function
786do_invalidate:
787 ldr r2, [fp, #address-dynarec_local]
788.E12:
789 ldr r1, [fp, #invc_ptr-dynarec_local]
790 lsr r0, r2, #12
791 ldrb r2, [r1, r0]
792 tst r2, r2
793 beq invalidate_block
794 mov pc, lr
795 .size do_invalidate, .-do_invalidate
7139f3c8 796
57871462 797 .align 2
798 .global read_nomem_new
799 .type read_nomem_new, %function
f95a77f7 800/*read_nomem_new:*/
801read_nomemb_new:
802read_nomemh_new:
803read_nomemd_new:
804 /* should never happen */
805 b read_nomem_new
806/*
57871462 807 ldr r2, [fp, #address-dynarec_local]
808 add r12, fp, #memory_map-dynarec_local
809 lsr r0, r2, #12
810 ldr r12, [r12, r0, lsl #2]
811 mov r1, #8
812 tst r12, r12
813 bmi tlb_exception
814 ldr r0, [r2, r12, lsl #2]
815 str r0, [fp, #readmem_dword-dynarec_local]
816 mov pc, lr
f95a77f7 817*/
57871462 818 .size read_nomem_new, .-read_nomem_new
7139f3c8 819/*
57871462 820 .align 2
821 .global read_nomemb_new
822 .type read_nomemb_new, %function
57871462 823write_nomem_new:
824 str r3, [fp, #24]
825 str lr, [fp, #28]
826 bl do_invalidate
827 ldr r2, [fp, #address-dynarec_local]
828 add r12, fp, #memory_map-dynarec_local
829 ldr lr, [fp, #28]
830 lsr r0, r2, #12
831 ldr r3, [fp, #24]
832 ldr r12, [r12, r0, lsl #2]
833 mov r1, #0xc
834 tst r12, #0x40000000
835 bne tlb_exception
836 ldr r0, [fp, #word-dynarec_local]
837 str r0, [r2, r12, lsl #2]
838 mov pc, lr
839 .size write_nomem_new, .-write_nomem_new
7139f3c8 840
57871462 841 .align 2
842 .global write_nomemb_new
843 .type write_nomemb_new, %function
844write_nomemb_new:
845 str r3, [fp, #24]
846 str lr, [fp, #28]
847 bl do_invalidate
848 ldr r2, [fp, #address-dynarec_local]
849 add r12, fp, #memory_map-dynarec_local
850 ldr lr, [fp, #28]
851 lsr r0, r2, #12
852 ldr r3, [fp, #24]
853 ldr r12, [r12, r0, lsl #2]
854 mov r1, #0xc
855 tst r12, #0x40000000
856 bne tlb_exception
857 eor r2, r2, #3
858 ldrb r0, [fp, #byte-dynarec_local]
859 strb r0, [r2, r12, lsl #2]
860 mov pc, lr
861 .size write_nomemb_new, .-write_nomemb_new
7139f3c8 862
57871462 863 .align 2
864 .global write_nomemh_new
865 .type write_nomemh_new, %function
866write_nomemh_new:
867 str r3, [fp, #24]
868 str lr, [fp, #28]
869 bl do_invalidate
870 ldr r2, [fp, #address-dynarec_local]
871 add r12, fp, #memory_map-dynarec_local
872 ldr lr, [fp, #28]
873 lsr r0, r2, #12
874 ldr r3, [fp, #24]
875 ldr r12, [r12, r0, lsl #2]
876 mov r1, #0xc
877 lsls r12, #2
878 bcs tlb_exception
879 eor r2, r2, #2
880 ldrh r0, [fp, #hword-dynarec_local]
881 strh r0, [r2, r12]
882 mov pc, lr
883 .size write_nomemh_new, .-write_nomemh_new
7139f3c8 884*/
57871462 885 .align 2
886 .global breakpoint
887 .type breakpoint, %function
888breakpoint:
889 /* Set breakpoint here for debugging */
890 mov pc, lr
891 .size breakpoint, .-breakpoint
892 .section .note.GNU-stack,"",%progbits