[pcsx_rearmed.git] / libpcsxcore / r3000a.c

/***************************************************************************
 *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
 ***************************************************************************/

/*
* R3000A CPU functions.
*/

#include "r3000a.h"
#include "cdrom.h"
#include "mdec.h"
#include "gte.h"

R3000Acpu *psxCpu = NULL;
psxRegisters psxRegs;

int psxInit() {
	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);

#ifdef PSXREC
	if (Config.Cpu == CPU_INTERPRETER) {
		psxCpu = &psxInt;
	} else psxCpu = &psxRec;
#else
	psxCpu = &psxInt;
#endif

	Log = 0;

	if (psxMemInit() == -1) return -1;

	return psxCpu->Init();
}

void psxReset() {
	psxMemReset();

	memset(&psxRegs, 0, sizeof(psxRegs));

	psxRegs.pc = 0xbfc00000; // Start in bootstrap

	psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
	psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A

	psxCpu->Reset();

	psxHwReset();
	psxBiosInit();

	if (!Config.HLE)
		psxExecuteBios();

#ifdef EMU_LOG
	EMU_LOG("*BIOS END*\n");
#endif
	Log = 0;
}

void psxShutdown() {
	psxMemShutdown();
	psxBiosShutdown();

	psxCpu->Shutdown();
}

void psxException(u32 code, u32 bd) {
	if (!Config.HLE && (((PSXMu32(psxRegs.pc) >> 24) & 0xfe) == 0x4a)) {
		// "hokuto no ken" / "Crash Bandicot 2" ...
		// BIOS does not allow to return to GTE instructions
		// (just skips it, supposedly because it's scheduled already)
		// so we step over it with the interpreter
		extern void execI();
		execI();
	}

	// Set the Cause
	psxRegs.CP0.n.Cause = code;

	// Set the EPC & PC
	if (bd) {
#ifdef PSXCPU_LOG
		PSXCPU_LOG("bd set!!!\n");
#endif
		SysPrintf("bd set!!!\n");
		psxRegs.CP0.n.Cause |= 0x80000000;
		psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
	} else
		psxRegs.CP0.n.EPC = (psxRegs.pc);

	if (psxRegs.CP0.n.Status & 0x400000)
		psxRegs.pc = 0xbfc00180;
	else
		psxRegs.pc = 0x80000080;

	// Set the Status
	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
						  ((psxRegs.CP0.n.Status & 0xf) << 2);

	if (Config.HLE) psxBiosException();
}

void psxBranchTest() {
	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
		psxRcntUpdate();

	if (psxRegs.interrupt) {
		if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_SIO);
				sioInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDR);
				cdrInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
				cdrReadInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
				gpuInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
				mdec1Interrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
				spuInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
				mdec0Interrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
				gpuotcInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
				cdrDmaInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
				cdrPlayInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
				cdrLidSeekInterrupt();
			}
		}
	}

	if (psxHu32(0x1070) & psxHu32(0x1074)) {
		if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
#ifdef PSXCPU_LOG
			PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
#endif
//			SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
			psxException(0x400, 0);
		}
	}
}

void psxJumpTest() {
	if (!Config.HLE && Config.PsxOut) {
		u32 call = psxRegs.GPR.n.t1 & 0xff;
		switch (psxRegs.pc & 0x1fffff) {
			case 0xa0:
#ifdef PSXBIOS_LOG
				if (call != 0x28 && call != 0xe) {
					PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
#endif
				if (biosA0[call])
					biosA0[call]();
				break;
			case 0xb0:
#ifdef PSXBIOS_LOG
				if (call != 0x17 && call != 0xb) {
					PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
#endif
				if (biosB0[call])
					biosB0[call]();
				break;
			case 0xc0:
#ifdef PSXBIOS_LOG
				PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
#endif
				if (biosC0[call])
					biosC0[call]();
				break;
		}
	}
}

void psxExecuteBios() {
	while (psxRegs.pc != 0x80030000)
		psxCpu->ExecuteBlock();
}
Commit	Line	Data
ef79bbde P	1	/***************************************************************************
	2	* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
	3	* *
	4	* This program is free software; you can redistribute it and/or modify *
	5	* it under the terms of the GNU General Public License as published by *
	6	* the Free Software Foundation; either version 2 of the License, or *
	7	* (at your option) any later version. *
	8	* *
	9	* This program is distributed in the hope that it will be useful, *
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of *
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
	12	* GNU General Public License for more details. *
	13	* *
	14	* You should have received a copy of the GNU General Public License *
	15	* along with this program; if not, write to the *
	16	* Free Software Foundation, Inc., *
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
	18	***************************************************************************/
	19
	20	/*
	21	* R3000A CPU functions.
	22	*/
	23
	24	#include "r3000a.h"
	25	#include "cdrom.h"
	26	#include "mdec.h"
	27	#include "gte.h"
	28
	29	R3000Acpu *psxCpu = NULL;
	30	psxRegisters psxRegs;
	31
	32	int psxInit() {
	33	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
	34
	35	#ifdef PSXREC
	36	if (Config.Cpu == CPU_INTERPRETER) {
	37	psxCpu = &psxInt;
	38	} else psxCpu = &psxRec;
	39	#else
	40	psxCpu = &psxInt;
	41	#endif
	42
	43	Log = 0;
	44
	45	if (psxMemInit() == -1) return -1;
	46
	47	return psxCpu->Init();
	48	}
	49
	50	void psxReset() {
ef79bbde P	51	psxMemReset();
	52
	53	memset(&psxRegs, 0, sizeof(psxRegs));
	54
	55	psxRegs.pc = 0xbfc00000; // Start in bootstrap
	56
	57	psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled \| BEV = 1 \| TS = 1
	58	psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
	59
c24732c0	60	psxCpu->Reset();
c24732c0	61
ef79bbde P	62	psxHwReset();
	63	psxBiosInit();
	64
	65	if (!Config.HLE)
	66	psxExecuteBios();
	67
	68	#ifdef EMU_LOG
	69	EMU_LOG("BIOS END\n");
	70	#endif
	71	Log = 0;
	72	}
	73
	74	void psxShutdown() {
	75	psxMemShutdown();
	76	psxBiosShutdown();
	77
	78	psxCpu->Shutdown();
	79	}
	80
	81	void psxException(u32 code, u32 bd) {
665e364a	82	if (!Config.HLE && (((PSXMu32(psxRegs.pc) >> 24) & 0xfe) == 0x4a)) {
	83	// "hokuto no ken" / "Crash Bandicot 2" ...
	84	// BIOS does not allow to return to GTE instructions
	85	// (just skips it, supposedly because it's scheduled already)
	86	// so we step over it with the interpreter
	87	extern void execI();
	88	execI();
	89	}
	90
ef79bbde P	91	// Set the Cause
	92	psxRegs.CP0.n.Cause = code;
	93
	94	// Set the EPC & PC
	95	if (bd) {
	96	#ifdef PSXCPU_LOG
	97	PSXCPU_LOG("bd set!!!\n");
	98	#endif
	99	SysPrintf("bd set!!!\n");
	100	psxRegs.CP0.n.Cause \|= 0x80000000;
	101	psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
	102	} else
	103	psxRegs.CP0.n.EPC = (psxRegs.pc);
	104
	105	if (psxRegs.CP0.n.Status & 0x400000)
	106	psxRegs.pc = 0xbfc00180;
	107	else
	108	psxRegs.pc = 0x80000080;
	109
	110	// Set the Status
	111	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) \|
	112	((psxRegs.CP0.n.Status & 0xf) << 2);
	113
ef79bbde P	114	if (Config.HLE) psxBiosException();
	115	}
	116
	117	void psxBranchTest() {
	118	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
	119	psxRcntUpdate();
	120
	121	if (psxRegs.interrupt) {
d28b54b1	122	if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
	123	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
	124	psxRegs.interrupt &= ~(1 << PSXINT_SIO);
ef79bbde P	125	sioInterrupt();
	126	}
	127	}
d28b54b1	128	if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
	129	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
	130	psxRegs.interrupt &= ~(1 << PSXINT_CDR);
ef79bbde P	131	cdrInterrupt();
	132	}
	133	}
d28b54b1	134	if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
	135	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
	136	psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
ef79bbde P	137	cdrReadInterrupt();
	138	}
	139	}
d28b54b1	140	if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
	141	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
	142	psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
ef79bbde P	143	gpuInterrupt();
	144	}
	145	}
d28b54b1	146	if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
	147	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
	148	psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
ef79bbde P	149	mdec1Interrupt();
	150	}
	151	}
d28b54b1	152	if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
	153	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
	154	psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
ef79bbde P	155	spuInterrupt();
	156	}
	157	}
528ad661	158	if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
	159	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
	160	psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
	161	mdec0Interrupt();
	162	}
	163	}
57a757ce	164	if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
	165	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
	166	psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
	167	gpuotcInterrupt();
	168	}
	169	}
9f8b032d	170	if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
	171	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
	172	psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
	173	cdrDmaInterrupt();
	174	}
	175	}
7f457614	176	if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
	177	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
	178	psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
	179	cdrPlayInterrupt();
	180	}
	181	}
9f8b032d	182	if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
	183	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
	184	psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
	185	cdrLidSeekInterrupt();
	186	}
	187	}
ef79bbde P	188	}
	189
	190	if (psxHu32(0x1070) & psxHu32(0x1074)) {
	191	if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
	192	#ifdef PSXCPU_LOG
	193	PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
	194	#endif
	195	// SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
	196	psxException(0x400, 0);
	197	}
	198	}
	199	}
	200
	201	void psxJumpTest() {
	202	if (!Config.HLE && Config.PsxOut) {
	203	u32 call = psxRegs.GPR.n.t1 & 0xff;
	204	switch (psxRegs.pc & 0x1fffff) {
	205	case 0xa0:
	206	#ifdef PSXBIOS_LOG
	207	if (call != 0x28 && call != 0xe) {
	208	PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
	209	#endif
	210	if (biosA0[call])
	211	biosA0[call]();
	212	break;
	213	case 0xb0:
	214	#ifdef PSXBIOS_LOG
	215	if (call != 0x17 && call != 0xb) {
	216	PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
	217	#endif
	218	if (biosB0[call])
	219	biosB0[call]();
	220	break;
	221	case 0xc0:
	222	#ifdef PSXBIOS_LOG
	223	PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
	224	#endif
	225	if (biosC0[call])
	226	biosC0[call]();
	227	break;
	228	}
	229	}
	230	}
	231
	232	void psxExecuteBios() {
	233	while (psxRegs.pc != 0x80030000)
	234	psxCpu->ExecuteBlock();
	235	}
	236