cdrom: change pause timing again
[pcsx_rearmed.git] / libpcsxcore / r3000a.c
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1/***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
19
20/*
21* R3000A CPU functions.
22*/
23
24#include "r3000a.h"
25#include "cdrom.h"
26#include "mdec.h"
27#include "gte.h"
61ad2a61 28#include "psxinterpreter.h"
de74f599 29#include "psxbios.h"
9a0a61d2 30#include "psxevents.h"
905b7c25 31#include "../include/compiler_features.h"
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32
33R3000Acpu *psxCpu = NULL;
41e82ad4 34#ifdef DRC_DISABLE
ef79bbde 35psxRegisters psxRegs;
41e82ad4 36#endif
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37
38int psxInit() {
41e82ad4 39#ifndef DRC_DISABLE
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40 if (Config.Cpu == CPU_INTERPRETER) {
41 psxCpu = &psxInt;
42 } else psxCpu = &psxRec;
43#else
61ad2a61 44 Config.Cpu = CPU_INTERPRETER;
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45 psxCpu = &psxInt;
46#endif
47
48 Log = 0;
49
50 if (psxMemInit() == -1) return -1;
51
52 return psxCpu->Init();
53}
54
55void psxReset() {
14b3bd95 56 boolean introBypassed = FALSE;
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57 psxMemReset();
58
59 memset(&psxRegs, 0, sizeof(psxRegs));
60
61 psxRegs.pc = 0xbfc00000; // Start in bootstrap
62
bc7c5acb 63 psxRegs.CP0.n.SR = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
64 psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
7650b754 65 if (Config.HLE) {
66 psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled
67 psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector
68 }
ef79bbde 69
d5aeda23 70 psxCpu->ApplyConfig();
c24732c0 71 psxCpu->Reset();
72
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73 psxHwReset();
74 psxBiosInit();
75
7b75929b 76 if (!Config.HLE) {
ef79bbde 77 psxExecuteBios();
14b3bd95 78 if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) {
02b1a085 79 introBypassed = BiosBootBypass();
14b3bd95 80 }
7b75929b 81 }
14b3bd95 82 if (Config.HLE || introBypassed)
83 psxBiosSetupBootState();
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84
85#ifdef EMU_LOG
86 EMU_LOG("*BIOS END*\n");
87#endif
88 Log = 0;
89}
90
91void psxShutdown() {
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92 psxBiosShutdown();
93
94 psxCpu->Shutdown();
7a8d521f 95
96 psxMemShutdown();
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97}
98
6d75addf 99// cp0 is passed separately for lightrec to be less messy
bc7c5acb 100void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
905b7c25 101 u32 opcode = intFakeFetch(psxRegs.pc);
943a507a 102
3d1c03e7 103 if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) {
665e364a 104 // "hokuto no ken" / "Crash Bandicot 2" ...
105 // BIOS does not allow to return to GTE instructions
106 // (just skips it, supposedly because it's scheduled already)
62656449 107 // so we execute it here
bc7c5acb 108 psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1);
905b7c25 109 psxRegs.code = opcode;
110 psxCP2[opcode & 0x3f](cp2);
665e364a 111 }
112
ef79bbde 113 // Set the Cause
0b1da491 114 cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause;
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115
116 // Set the EPC & PC
bc7c5acb 117 cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
ef79bbde 118
bc7c5acb 119 if (cp0->n.SR & 0x400000)
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120 psxRegs.pc = 0xbfc00180;
121 else
122 psxRegs.pc = 0x80000080;
123
bc7c5acb 124 // Set the SR
125 cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
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126}
127
128void psxBranchTest() {
129 if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
130 psxRcntUpdate();
131
9a0a61d2 132 irq_test(&psxRegs.CP0);
ef79bbde 133
9a0a61d2 134 if (unlikely(psxRegs.pc == psxRegs.biosBranchCheck))
de74f599 135 psxBiosCheckBranch();
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136}
137
138void psxJumpTest() {
139 if (!Config.HLE && Config.PsxOut) {
140 u32 call = psxRegs.GPR.n.t1 & 0xff;
141 switch (psxRegs.pc & 0x1fffff) {
142 case 0xa0:
143#ifdef PSXBIOS_LOG
144 if (call != 0x28 && call != 0xe) {
145 PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
146#endif
147 if (biosA0[call])
148 biosA0[call]();
149 break;
150 case 0xb0:
151#ifdef PSXBIOS_LOG
152 if (call != 0x17 && call != 0xb) {
153 PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
154#endif
155 if (biosB0[call])
156 biosB0[call]();
157 break;
158 case 0xc0:
159#ifdef PSXBIOS_LOG
160 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
161#endif
162 if (biosC0[call])
163 biosC0[call]();
164 break;
165 }
166 }
167}
168
169void psxExecuteBios() {
7b75929b 170 int i;
da65071f 171 for (i = 0; i < 5000000; i++) {
172 psxCpu->ExecuteBlock(EXEC_CALLER_BOOT);
173 if ((psxRegs.pc & 0xff800000) == 0x80000000)
174 break;
175 }
176 if (psxRegs.pc != 0x80030000)
177 SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
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178}
179
11d23573 180// irq10 stuff, very preliminary
181static int irq10count;
182
183static void psxScheduleIrq10One(u32 cycles_abs) {
184 // schedule relative to frame start
185 u32 c = cycles_abs - rcnts[3].cycleStart;
186 assert((s32)c >= 0);
187 psxRegs.interrupt |= 1 << PSXINT_IRQ10;
188 psxRegs.intCycle[PSXINT_IRQ10].cycle = c;
189 psxRegs.intCycle[PSXINT_IRQ10].sCycle = rcnts[3].cycleStart;
9a0a61d2 190 set_event_raw_abs(PSXINT_IRQ10, cycles_abs);
11d23573 191}
192
193void irq10Interrupt() {
194 u32 prevc = psxRegs.intCycle[PSXINT_IRQ10].sCycle
195 + psxRegs.intCycle[PSXINT_IRQ10].cycle;
196
197 psxHu32ref(0x1070) |= SWAPu32(0x400);
198
199#if 0
200 s32 framec = psxRegs.cycle - rcnts[3].cycleStart;
201 printf("%d:%03d irq10 #%d %3d m=%d,%d\n", frame_counter,
202 (s32)((float)framec / (PSXCLK / 60 / 263.0f)),
203 irq10count, psxRegs.cycle - prevc,
204 (psxRegs.CP0.n.SR & 0x401) != 0x401, !(psxHu32(0x1074) & 0x400));
205#endif
1351a8fb 206 if (--irq10count > 0) {
207 u32 cycles_per_line = Config.PsxType
208 ? PSXCLK / 50 / 314 : PSXCLK / 60 / 263;
209 psxScheduleIrq10One(prevc + cycles_per_line);
210 }
11d23573 211}
212
213void psxScheduleIrq10(int irq_count, int x_cycles, int y) {
214 //printf("%s %d, %d, %d\n", __func__, irq_count, x_cycles, y);
215 u32 cycles_per_frame = Config.PsxType ? PSXCLK / 50 : PSXCLK / 60;
216 u32 cycles = rcnts[3].cycleStart + cycles_per_frame;
217 cycles += y * cycles_per_frame / (Config.PsxType ? 314 : 263);
218 cycles += x_cycles;
219 psxScheduleIrq10One(cycles);
220 irq10count = irq_count;
221}