cdrom: change pause timing again
[pcsx_rearmed.git] / plugins / dfsound / dma.c
CommitLineData
ef79bbde
P
1/***************************************************************************\r
2 dma.c - description\r
3 -------------------\r
4 begin : Wed May 15 2002\r
5 copyright : (C) 2002 by Pete Bernert\r
6 email : BlackDove@addcom.de\r
7 ***************************************************************************/\r
8/***************************************************************************\r
9 * *\r
10 * This program is free software; you can redistribute it and/or modify *\r
11 * it under the terms of the GNU General Public License as published by *\r
12 * the Free Software Foundation; either version 2 of the License, or *\r
13 * (at your option) any later version. See also the license.txt file for *\r
14 * additional informations. *\r
15 * *\r
16 ***************************************************************************/\r
17\r
18#include "stdafx.h"\r
19\r
20#define _IN_DMA\r
21\r
22#include "externals.h"\r
a5ff8be2 23#include "registers.h"\r
ef79bbde 24\r
3c7a8977 25static void set_dma_end(int iSize, unsigned int cycles)\r
26{\r
27 // this must be > psxdma.c dma irq\r
28 // Road Rash also wants a considerable delay, maybe because of fifo?\r
29 cycles += iSize * 20; // maybe\r
30 cycles |= 1; // indicates dma is active\r
31 spu.cycles_dma_end = cycles;\r
32}\r
33\r
ef79bbde
P
34////////////////////////////////////////////////////////////////////////\r
35// READ DMA (many values)\r
36////////////////////////////////////////////////////////////////////////\r
37\r
650adfd2 38void CALLBACK SPUreadDMAMem(unsigned short *pusPSXMem, int iSize,\r
39 unsigned int cycles)\r
ef79bbde 40{\r
a5ff8be2 41 unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
c2eee46b 42 int i, irq_after;\r
ef79bbde 43\r
d358733b 44 do_samples_if_needed(cycles, 1, 2);\r
c2eee46b 45 irq_after = (irq_addr - addr) & 0x7ffff;\r
a5ff8be2 46\r
47 for(i = 0; i < iSize; i++)\r
48 {\r
49 *pusPSXMem++ = *(unsigned short *)(spu.spuMemC + addr);\r
50 addr += 2;\r
51 addr &= 0x7fffe;\r
52 }\r
c2eee46b 53 if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
f926a62f 54 log_unhandled("rdma spu irq: %x/%x-%x\n", irq_addr, spu.spuAddr, addr);\r
25f460ec 55 do_irq_io(irq_after);\r
c2eee46b 56 }\r
a5ff8be2 57 spu.spuAddr = addr;\r
3c7a8977 58 set_dma_end(iSize, cycles);\r
ef79bbde
P
59}\r
60\r
61////////////////////////////////////////////////////////////////////////\r
ef79bbde
P
62// WRITE DMA (many values)\r
63////////////////////////////////////////////////////////////////////////\r
64\r
650adfd2 65void CALLBACK SPUwriteDMAMem(unsigned short *pusPSXMem, int iSize,\r
66 unsigned int cycles)\r
ef79bbde 67{\r
a5ff8be2 68 unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
c2eee46b 69 int i, irq_after;\r
fb552464 70 \r
f926a62f 71 do_samples_if_needed(cycles + iSize*2 * 4, 1, 2);\r
c2eee46b 72 irq_after = (irq_addr - addr) & 0x7ffff;\r
0c1151fe 73 spu.bMemDirty = 1;\r
a5ff8be2 74\r
75 if (addr + iSize*2 < 0x80000)\r
76 {\r
77 memcpy(spu.spuMemC + addr, pusPSXMem, iSize*2);\r
78 addr += iSize*2;\r
79 }\r
80 else\r
81 {\r
a5ff8be2 82 for (i = 0; i < iSize; i++)\r
ef79bbde 83 {\r
a5ff8be2 84 *(unsigned short *)(spu.spuMemC + addr) = *pusPSXMem++;\r
85 addr += 2;\r
86 addr &= 0x7fffe;\r
ef79bbde 87 }\r
a5ff8be2 88 }\r
c2eee46b 89 if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
f926a62f 90 log_unhandled("%u wdma spu irq: %x/%x-%x (%u)\n",\r
91 cycles, irq_addr, spu.spuAddr, addr, irq_after);\r
c2eee46b 92 // this should be consistent with psxdma.c timing\r
93 // might also need more delay like in set_dma_end()\r
f926a62f 94 do_irq_io(irq_after * 4);\r
95 }\r
96 for (i = 0; i < 24; i++) {\r
97 size_t ediff, p = spu.s_chan[i].pCurr - spu.spuMemC;\r
98 if (spu.s_chan[i].ADSRX.State == ADSR_RELEASE && !spu.s_chan[i].ADSRX.EnvelopeVol)\r
99 continue;\r
100 ediff = addr - p;\r
101 if (spu.spuAddr < p && p < spu.spuAddr + iSize * 2) {\r
102 log_unhandled("%u spu ch%02d play %zx dma %x-%x (%zd)\n",\r
103 cycles, i, p, spu.spuAddr, addr, ediff);\r
104 //exit(1);\r
105 }\r
106 // a hack for the super annoying timing issues in The Emperor's New Groove\r
107 // (which is a game bug, but tends to trigger more here)\r
108 if (ediff <= 0x20u) {\r
109 spu.s_chan[i].pCurr += ediff;\r
110 break;\r
111 }\r
c2eee46b 112 }\r
a5ff8be2 113 spu.spuAddr = addr;\r
3c7a8977 114 set_dma_end(iSize, cycles);\r
ef79bbde
P
115}\r
116\r
117////////////////////////////////////////////////////////////////////////\r
c2eee46b 118// vim:shiftwidth=1:expandtab\r